From 949eb228f3f807feb338d29e9c94d97c22fa98b6 Mon Sep 17 00:00:00 2001 From: Ricardo Salveti Date: Wed, 20 Oct 2021 15:12:06 +0300 Subject: arm: spl: prepare for jumping to OPTEE Make sure to (if applicable) flush the D-cache, invalidate I-cache, and disable MMU and caches before jumping to OPTEE. This fixes the SDP->SPL->OPTEE boot flow on iMX6Q and most likely on some other ARM SoCs. Signed-off-by: Ricardo Salveti Co-developed-by: Oleksandr Suvorov Signed-off-by: Oleksandr Suvorov --- include/spl.h | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/spl.h b/include/spl.h index 7ddb2abe0f..0af0ee3003 100644 --- a/include/spl.h +++ b/include/spl.h @@ -468,6 +468,15 @@ int spl_board_boot_device(u32 boot_device); */ void __noreturn jump_to_image_linux(struct spl_image_info *spl_image); +/** + * jump_to_image_linux() - Jump to OP-TEE OS from SPL + * + * This jumps into OP-TEE OS using the information in @spl_image. + * + * @spl_image: Image description to set up + */ +void __noreturn jump_to_image_optee(struct spl_image_info *spl_image); + /** * spl_start_uboot() - Check if SPL should start the kernel or U-Boot * @@ -759,7 +768,7 @@ struct bl_params *bl2_plat_get_bl31_params_v2_default(uintptr_t bl32_entry, * @arg2: device tree address, (ARMv7 standard bootarg #2) * @arg3: non-secure entry address (ARMv7 bootarg #0) */ -void spl_optee_entry(void *arg0, void *arg1, void *arg2, void *arg3); +void __noreturn spl_optee_entry(void *arg0, void *arg1, void *arg2, void *arg3); /** * spl_invoke_opensbi - boot using a RISC-V OpenSBI image -- cgit v1.2.3