From b34f8b5de0fea945c2683e9e64d941c121aa02ad Mon Sep 17 00:00:00 2001 From: Frank Wang Date: Tue, 26 May 2020 11:33:47 +0800 Subject: usb: dwc3: add dis_u2_freeclk_exists_quirk Add a quirk to clear the GUSB2PHYCFG.U2_FREECLK_EXISTS bit, which specifies whether the USB2.0 PHY provides a free-running PHY clock, which is active when the clock control input is active. Refer to commit 27f83eeb6b42("usb: dwc3: add dis_u2_freeclk_exists_quirk") in Linux Rockchip Kernel. Signed-off-by: Frank Wang Reviewed-by: Kever Yang Reviewed-by: Jagan Teki Tested-by: Jagan Teki --- drivers/usb/dwc3/core.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'drivers/usb/dwc3/core.h') diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index 91d028b486..b00e485855 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -162,6 +162,7 @@ /* Global USB2 PHY Configuration Register */ #define DWC3_GUSB2PHYCFG_PHYSOFTRST (1 << 31) +#define DWC3_GUSB2PHYCFG_U2_FREECLK_EXISTS (1 << 30) #define DWC3_GUSB2PHYCFG_SUSPHY (1 << 6) #define DWC3_GUSB2PHYCFG_ENBLSLPM (1 << 8) #define DWC3_GUSB2PHYCFG_PHYIF(n) ((n) << 3) @@ -825,6 +826,7 @@ struct dwc3 { unsigned dis_u2_susphy_quirk:1; unsigned dis_del_phy_power_chg_quirk:1; unsigned dis_enblslpm_quirk:1; + unsigned dis_u2_freeclk_exists_quirk:1; unsigned tx_de_emphasis_quirk:1; unsigned tx_de_emphasis:2; -- cgit v1.2.3