From bbbc1ae9219ae8c8098c0af14060da5cb0d37e53 Mon Sep 17 00:00:00 2001 From: Jonathan Solnit Date: Fri, 24 Feb 2012 11:30:18 +0000 Subject: ARM:OMAP+:MMC: Add parameters to MMC init Add parameters to the OMAP MMC initialization function so the board can mask host capabilities and set the maximum clock frequency. While the OMAP supports a certain set of MMC host capabilities, individual boards may be more restricted and the OMAP may need to be configured to match the board. The PRG_SDMMC1_SPEEDCTRL bit in the OMAP3 is an example. Signed-off-by: Jonathan Solnit --- drivers/mmc/omap_hsmmc.c | 24 ++++++++++++++++++++---- 1 file changed, 20 insertions(+), 4 deletions(-) (limited to 'drivers/mmc') diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c index 2400db2f35..b8ab7bc3de 100644 --- a/drivers/mmc/omap_hsmmc.c +++ b/drivers/mmc/omap_hsmmc.c @@ -80,6 +80,11 @@ unsigned char mmc_board_init(struct mmc *mmc) writel(readl(&t2_base->devconf1) | MMCSDIO2ADPCLKISEL, &t2_base->devconf1); + /* Change from default of 52MHz to 26MHz if necessary */ + if (!(mmc->host_caps & MMC_MODE_HS_52MHz)) + writel(readl(&t2_base->ctl_prog_io1) & ~CTLPROGIO1SPEEDCTRL, + &t2_base->ctl_prog_io1); + writel(readl(&prcm_base->fclken1_core) | EN_MMC1 | EN_MMC2 | EN_MMC3, &prcm_base->fclken1_core); @@ -463,7 +468,7 @@ static void mmc_set_ios(struct mmc *mmc) writel(readl(&mmc_base->sysctl) | CEN_ENABLE, &mmc_base->sysctl); } -int omap_mmc_init(int dev_index) +int omap_mmc_init(int dev_index, uint host_caps_mask, uint f_max) { struct mmc *mmc; @@ -494,11 +499,22 @@ int omap_mmc_init(int dev_index) return 1; } mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195; - mmc->host_caps = MMC_MODE_4BIT | MMC_MODE_HS_52MHz | MMC_MODE_HS | - MMC_MODE_HC; + mmc->host_caps = (MMC_MODE_4BIT | MMC_MODE_HS_52MHz | MMC_MODE_HS | + MMC_MODE_HC) & ~host_caps_mask; mmc->f_min = 400000; - mmc->f_max = 52000000; + + if (f_max != 0) + mmc->f_max = f_max; + else { + if (mmc->host_caps & MMC_MODE_HS) { + if (mmc->host_caps & MMC_MODE_HS_52MHz) + mmc->f_max = 52000000; + else + mmc->f_max = 26000000; + } else + mmc->f_max = 20000000; + } mmc->b_max = 0; -- cgit v1.2.3 From 002a2c0c66d2e1757b89ad6824b4a472dcef1076 Mon Sep 17 00:00:00 2001 From: SRICHARAN R Date: Mon, 12 Mar 2012 02:25:42 +0000 Subject: OMAP4/5: Make the sysctrl structure common Make the sysctrl structure common, so that it can be used in generic functions across socs. Also change the base address of the system control module, to include all the registers and not simply the io regs. Signed-off-by: R Sricharan --- arch/arm/cpu/armv7/omap4/hwinit.c | 4 ++-- arch/arm/cpu/armv7/omap5/hwinit.c | 4 ++-- arch/arm/include/asm/arch-omap4/omap.h | 10 ++++++---- arch/arm/include/asm/arch-omap5/omap.h | 13 +++++++------ drivers/mmc/omap_hsmmc.c | 4 ++-- 5 files changed, 19 insertions(+), 16 deletions(-) (limited to 'drivers/mmc') diff --git a/arch/arm/cpu/armv7/omap4/hwinit.c b/arch/arm/cpu/armv7/omap4/hwinit.c index afa5484120..187e93887b 100644 --- a/arch/arm/cpu/armv7/omap4/hwinit.c +++ b/arch/arm/cpu/armv7/omap4/hwinit.c @@ -59,8 +59,8 @@ void do_io_settings(void) u32 lpddr2io; struct control_lpddr2io_regs *lpddr2io_regs = (struct control_lpddr2io_regs *)LPDDR2_IO_REGS_BASE; - struct omap4_sys_ctrl_regs *const ctrl = - (struct omap4_sys_ctrl_regs *)SYSCTRL_GENERAL_CORE_BASE; + struct omap_sys_ctrl_regs *const ctrl = + (struct omap_sys_ctrl_regs *)SYSCTRL_GENERAL_CORE_BASE; u32 omap4_rev = omap_revision(); diff --git a/arch/arm/cpu/armv7/omap5/hwinit.c b/arch/arm/cpu/armv7/omap5/hwinit.c index 84b3830b7a..7da7075e1d 100644 --- a/arch/arm/cpu/armv7/omap5/hwinit.c +++ b/arch/arm/cpu/armv7/omap5/hwinit.c @@ -58,8 +58,8 @@ const struct gpio_bank *const omap_gpio_bank = gpio_bank_54xx; void do_io_settings(void) { u32 io_settings = 0, mask = 0; - struct omap5_sys_ctrl_regs *ioregs_base = - (struct omap5_sys_ctrl_regs *) OMAP5_IOREGS_BASE; + struct omap_sys_ctrl_regs *ioregs_base = + (struct omap_sys_ctrl_regs *) SYSCTRL_GENERAL_CORE_BASE; /* Impedance settings EMMC, C2C 1,2, hsi2 */ mask = (ds_mask << 2) | (ds_mask << 8) | diff --git a/arch/arm/include/asm/arch-omap4/omap.h b/arch/arm/include/asm/arch-omap4/omap.h index 416c6de314..5fd692fe13 100644 --- a/arch/arm/include/asm/arch-omap4/omap.h +++ b/arch/arm/include/asm/arch-omap4/omap.h @@ -139,18 +139,20 @@ struct s32ktimer { unsigned int s32k_cr; /* 0x10 */ }; -struct omap4_sys_ctrl_regs { +struct omap_sys_ctrl_regs { unsigned int pad1[129]; unsigned int control_id_code; /* 0x4A002204 */ unsigned int pad11[22]; unsigned int control_std_fuse_opp_bgap; /* 0x4a002260 */ - unsigned int pad2[47]; + unsigned int pad2[24]; /* 0x4a002264 */ + unsigned int control_status; /* 0x4a0022c4 */ + unsigned int pad3[22]; /* 0x4a0022c8 */ unsigned int control_ldosram_iva_voltage_ctrl; /* 0x4A002320 */ unsigned int control_ldosram_mpu_voltage_ctrl; /* 0x4A002324 */ unsigned int control_ldosram_core_voltage_ctrl; /* 0x4A002328 */ - unsigned int pad3[260277]; + unsigned int pad4[260277]; unsigned int control_pbiaslite; /* 0x4A100600 */ - unsigned int pad4[63]; + unsigned int pad5[63]; unsigned int control_efuse_1; /* 0x4A100700 */ unsigned int control_efuse_2; /* 0x4A100704 */ }; diff --git a/arch/arm/include/asm/arch-omap5/omap.h b/arch/arm/include/asm/arch-omap5/omap.h index 10a973c1ed..7e17c76166 100644 --- a/arch/arm/include/asm/arch-omap5/omap.h +++ b/arch/arm/include/asm/arch-omap5/omap.h @@ -136,9 +136,10 @@ struct s32ktimer { unsigned int s32k_cr; /* 0x10 */ }; -#define OMAP5_IOREGS_BASE 0x4A002DA0 - -struct omap5_sys_ctrl_regs { +struct omap_sys_ctrl_regs { + u32 pad0[77]; /* 0x4A002000 */ + u32 control_status; /* 0x4A002134 */ + u32 pad1[794]; /* 0x4A002138 */ u32 control_paconf_global; /* 0x4A002DA0 */ u32 control_paconf_mode; /* 0x4A002DA4 */ u32 control_smart1io_padconf_0; /* 0x4A002DA8 */ @@ -149,7 +150,7 @@ struct omap5_sys_ctrl_regs { u32 control_smart2io_padconf_2; /* 0x4A002DBC */ u32 control_smart3io_padconf_0; /* 0x4A002DC0 */ u32 control_smart3io_padconf_1; /* 0x4A002DC4 */ - u32 pad1[14]; + u32 pad2[14]; u32 control_pbias; /* 0x4A002E00 */ u32 control_i2c_0; /* 0x4A002E04 */ u32 control_camera_rx; /* 0x4A002E08 */ @@ -160,7 +161,7 @@ struct omap5_sys_ctrl_regs { u32 control_usb2phycore; /* 0x4A002E1C */ u32 control_hdmi_1; /*0x4A002E20*/ u32 control_hsi; /*0x4A002E24*/ - u32 pad2[2]; + u32 pad3[2]; u32 control_ddr3ch1_0; /*0x4A002E30*/ u32 control_ddr3ch2_0; /*0x4A002E34*/ u32 control_ddrch1_0; /*0x4A002E38*/ @@ -183,7 +184,7 @@ struct omap5_sys_ctrl_regs { u32 control_srcomp_east_side; /*0x4A002E7C*/ u32 control_srcomp_west_side; /*0x4A002E80*/ u32 control_srcomp_code_latch; /*0x4A002E84*/ - u32 pad3[3680198]; + u32 pad4[3680198]; u32 control_smart1nopmio_padconf_0; /* 0x4AE0CDA0 */ u32 control_smart1nopmio_padconf_1; /* 0x4AE0CDA4 */ u32 control_padconf_mode; /* 0x4AE0CDA8 */ diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c index b8ab7bc3de..f421ff9eed 100644 --- a/drivers/mmc/omap_hsmmc.c +++ b/drivers/mmc/omap_hsmmc.c @@ -45,8 +45,8 @@ static struct mmc hsmmc_dev[2]; static void omap4_vmmc_pbias_config(struct mmc *mmc) { u32 value = 0; - struct omap4_sys_ctrl_regs *const ctrl = - (struct omap4_sys_ctrl_regs *)SYSCTRL_GENERAL_CORE_BASE; + struct omap_sys_ctrl_regs *const ctrl = + (struct omap_sys_ctrl_regs *) SYSCTRL_GENERAL_CORE_BASE; value = readl(&ctrl->control_pbiaslite); -- cgit v1.2.3 From dd23e59d595f02f6f79b003c372b22b467a005f2 Mon Sep 17 00:00:00 2001 From: Balaji T K Date: Mon, 12 Mar 2012 02:25:49 +0000 Subject: omap5: pbias ldo9 turn on Add omap5 pbias configuration for mmc1/sd lines and set voltage for sd data i/o lines Signed-off-by: Balaji T K --- arch/arm/include/asm/arch-omap5/omap.h | 7 ++++--- drivers/mmc/omap_hsmmc.c | 33 +++++++++++++++++++++++++++++++++ drivers/power/twl6035.c | 25 +++++++++++++++++++++++++ include/twl6035.h | 1 + 4 files changed, 63 insertions(+), 3 deletions(-) (limited to 'drivers/mmc') diff --git a/arch/arm/include/asm/arch-omap5/omap.h b/arch/arm/include/asm/arch-omap5/omap.h index 2725392969..d672b6f9d9 100644 --- a/arch/arm/include/asm/arch-omap5/omap.h +++ b/arch/arm/include/asm/arch-omap5/omap.h @@ -125,9 +125,10 @@ /* CONTROL_EFUSE_2 */ #define CONTROL_EFUSE_2_NMOS_PMOS_PTV_CODE_1 0x00ffc000 -#define MMC1_PWRDNZ (1 << 26) -#define MMC1_PBIASLITE_PWRDNZ (1 << 22) -#define MMC1_PBIASLITE_VMODE (1 << 21) +#define SDCARD_PWRDNZ (1 << 26) +#define SDCARD_BIAS_HIZ_MODE (1 << 25) +#define SDCARD_BIAS_PWRDNZ (1 << 22) +#define SDCARD_PBIASLITE_VMODE (1 << 21) #ifndef __ASSEMBLY__ diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c index f421ff9eed..e3670d4ad4 100644 --- a/drivers/mmc/omap_hsmmc.c +++ b/drivers/mmc/omap_hsmmc.c @@ -29,6 +29,7 @@ #include #include #include +#include #include #include #include @@ -60,6 +61,34 @@ static void omap4_vmmc_pbias_config(struct mmc *mmc) } #endif +#if defined(CONFIG_OMAP54XX) && defined(CONFIG_TWL6035_POWER) +static void omap5_pbias_config(struct mmc *mmc) +{ + u32 value = 0; + struct omap_sys_ctrl_regs *const ctrl = + (struct omap_sys_ctrl_regs *) SYSCTRL_GENERAL_CORE_BASE; + + value = readl(&ctrl->control_pbias); + value &= ~(SDCARD_PWRDNZ | SDCARD_BIAS_PWRDNZ); + value |= SDCARD_BIAS_HIZ_MODE; + writel(value, &ctrl->control_pbias); + + twl6035_mmc1_poweron_ldo(); + + value = readl(&ctrl->control_pbias); + value &= ~SDCARD_BIAS_HIZ_MODE; + value |= SDCARD_PBIASLITE_VMODE | SDCARD_PWRDNZ | SDCARD_BIAS_PWRDNZ; + writel(value, &ctrl->control_pbias); + + value = readl(&ctrl->control_pbias); + if (value & (1 << 23)) { + value &= ~(SDCARD_PWRDNZ | SDCARD_BIAS_PWRDNZ); + value |= SDCARD_BIAS_HIZ_MODE; + writel(value, &ctrl->control_pbias); + } +} +#endif + unsigned char mmc_board_init(struct mmc *mmc) { #if defined(CONFIG_TWL4030_POWER) @@ -99,6 +128,10 @@ unsigned char mmc_board_init(struct mmc *mmc) if (mmc->block_dev.dev == 0) omap4_vmmc_pbias_config(mmc); #endif +#if defined(CONFIG_OMAP54XX) && defined(CONFIG_TWL6035_POWER) + if (mmc->block_dev.dev == 0) + omap5_pbias_config(mmc); +#endif return 0; } diff --git a/drivers/power/twl6035.c b/drivers/power/twl6035.c index d75212c964..624c09e85d 100644 --- a/drivers/power/twl6035.c +++ b/drivers/power/twl6035.c @@ -34,7 +34,32 @@ int twl6035_i2c_read_u8(u8 chip_no, u8 *val, u8 reg) return i2c_read(chip_no, reg, 1, val, 1); } +/* To align with i2c mw/mr address, reg, val command syntax */ +static inline int palmas_write_u8(u8 chip_no, u8 reg, u8 val) +{ + return i2c_write(chip_no, reg, 1, &val, 1); +} + +static inline int palmas_read_u8(u8 chip_no, u8 reg, u8 *val) +{ + return i2c_read(chip_no, reg, 1, val, 1); +} + void twl6035_init_settings(void) { return; } + +void twl6035_mmc1_poweron_ldo(void) +{ + u8 val = 0; + + /* set LDO9 TWL6035 to 3V */ + val = 0x2b; /* (3 -.9)*28 +1 */ + palmas_write_u8(0x48, LDO9_VOLTAGE, val); + + /* TURN ON LDO9 */ + val = LDO_ON | LDO_MODE_SLEEP | LDO_MODE_ACTIVE; + palmas_write_u8(0x48, LDO9_CTRL, val); + return; +} diff --git a/include/twl6035.h b/include/twl6035.h index 1e133175d7..e21ddbaf22 100644 --- a/include/twl6035.h +++ b/include/twl6035.h @@ -39,3 +39,4 @@ int twl6035_i2c_write_u8(u8 chip_no, u8 val, u8 reg); int twl6035_i2c_read_u8(u8 chip_no, u8 *val, u8 reg); void twl6035_init_settings(void); +void twl6035_mmc1_poweron_ldo(void); -- cgit v1.2.3 From c7527b70f96791c1ee746c870f4e728ed73f2bb9 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Tue, 1 May 2012 11:09:52 +0000 Subject: i.MX28: Check if WP detection is implemented at all If the WP function is NULL, simply assume the card is always RW. Signed-off-by: Marek Vasut Cc: Stefano Babic Cc: Wolfgang Denk Cc: Detlev Zundel Cc: Fabio Estevam Acked-by: Stefano Babic --- drivers/mmc/mxsmmc.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'drivers/mmc') diff --git a/drivers/mmc/mxsmmc.c b/drivers/mmc/mxsmmc.c index 35c6bdabb0..c7200ee71a 100644 --- a/drivers/mmc/mxsmmc.c +++ b/drivers/mmc/mxsmmc.c @@ -133,7 +133,8 @@ mxsmmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) /* READ or WRITE */ if (data->flags & MMC_DATA_READ) { ctrl0 |= SSP_CTRL0_READ; - } else if (priv->mmc_is_wp(mmc->block_dev.dev)) { + } else if (priv->mmc_is_wp && + priv->mmc_is_wp(mmc->block_dev.dev)) { printf("MMC%d: Can not write a locked card!\n", mmc->block_dev.dev); return UNUSABLE_ERR; -- cgit v1.2.3