From 9ac4ffbde1a5015c9929ee8578d3811b716e2fd3 Mon Sep 17 00:00:00 2001
From: York Sun <yorksun@freescale.com>
Date: Mon, 30 Sep 2013 14:20:51 -0700
Subject: Driver/DDR: Add Freescale DDR driver for ARM

Make PowerPC specific code conditional so ARM SoCs can reuse
this driver. Add DDR3 driver for ARM.

Signed-off-by: York Sun <yorksun@freescale.com>
---
 drivers/ddr/fsl/util.c | 4 ++++
 1 file changed, 4 insertions(+)

(limited to 'drivers/ddr/fsl/util.c')

diff --git a/drivers/ddr/fsl/util.c b/drivers/ddr/fsl/util.c
index 5d6b362510..0658261d8d 100644
--- a/drivers/ddr/fsl/util.c
+++ b/drivers/ddr/fsl/util.c
@@ -7,7 +7,9 @@
  */
 
 #include <common.h>
+#ifdef CONFIG_PPC
 #include <asm/fsl_law.h>
+#endif
 #include <div64.h>
 
 #include <fsl_ddr.h>
@@ -79,6 +81,7 @@ unsigned int mclk_to_picos(unsigned int mclk)
 	return get_memory_clk_period_ps() * mclk;
 }
 
+#ifdef CONFIG_PPC
 void
 __fsl_ddr_set_lawbar(const common_timing_params_t *memctl_common_params,
 			   unsigned int law_memctl,
@@ -113,6 +116,7 @@ __attribute__((weak, alias("__fsl_ddr_set_lawbar"))) void
 fsl_ddr_set_lawbar(const common_timing_params_t *memctl_common_params,
 			 unsigned int memctl_interleaved,
 			 unsigned int ctrl_num);
+#endif
 
 void fsl_ddr_set_intl3r(const unsigned int granule_size)
 {
-- 
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