From db5741f7a85ec3ee79b64496172afaa7dc2cb225 Mon Sep 17 00:00:00 2001 From: Ley Foon Tan Date: Fri, 8 Nov 2019 10:38:20 +0800 Subject: arm: socfpga: Convert system manager from struct to defines Convert system manager for Gen5, Arria 10 and Stratix 10 from struct to defines. Change to get system manager base address from DT node instead of using #define. Signed-off-by: Ley Foon Tan Reviewed-by: Simon Goldschmidt --- drivers/ddr/altera/sdram_gen5.c | 12 ++++++------ drivers/ddr/altera/sdram_s10.c | 6 ++---- 2 files changed, 8 insertions(+), 10 deletions(-) (limited to 'drivers/ddr/altera') diff --git a/drivers/ddr/altera/sdram_gen5.c b/drivers/ddr/altera/sdram_gen5.c index 8c8ea19eb9..435f42bc0a 100644 --- a/drivers/ddr/altera/sdram_gen5.c +++ b/drivers/ddr/altera/sdram_gen5.c @@ -40,9 +40,6 @@ struct sdram_prot_rule { u32 hi_prot_id; }; -static struct socfpga_system_manager *sysmgr_regs = - (struct socfpga_system_manager *)SOCFPGA_SYSMGR_ADDRESS; - static unsigned long sdram_calculate_size(struct socfpga_sdr_ctrl *sdr_ctrl); /** @@ -455,12 +452,14 @@ int sdram_mmr_init_full(struct socfpga_sdr_ctrl *sdr_ctrl, SDR_CTRLGRP_DRAMADDRW_ROWBITS_LSB; int ret; - writel(rows, &sysmgr_regs->iswgrp_handoff[4]); + writel(rows, + socfpga_get_sysmgr_addr() + SYSMGR_ISWGRP_HANDOFF_OFFSET(4)); sdr_load_regs(sdr_ctrl, cfg); /* saving this value to SYSMGR.ISWGRP.HANDOFF.FPGA2SDR */ - writel(cfg->fpgaport_rst, &sysmgr_regs->iswgrp_handoff[3]); + writel(cfg->fpgaport_rst, + socfpga_get_sysmgr_addr() + SYSMGR_ISWGRP_HANDOFF_OFFSET(3)); /* only enable if the FPGA is programmed */ if (fpgamgr_test_fpga_ready()) { @@ -516,7 +515,8 @@ static unsigned long sdram_calculate_size(struct socfpga_sdr_ctrl *sdr_ctrl) * since the FB specifies we modify ROWBITs to work around SDRAM * controller issue. */ - row = readl(&sysmgr_regs->iswgrp_handoff[4]); + row = readl(socfpga_get_sysmgr_addr() + + SYSMGR_ISWGRP_HANDOFF_OFFSET(4)); if (row == 0) row = rowbits; /* diff --git a/drivers/ddr/altera/sdram_s10.c b/drivers/ddr/altera/sdram_s10.c index 82d9a13efa..5cf7d97592 100644 --- a/drivers/ddr/altera/sdram_s10.c +++ b/drivers/ddr/altera/sdram_s10.c @@ -33,9 +33,6 @@ struct altera_sdram_platdata { DECLARE_GLOBAL_DATA_PTR; -static const struct socfpga_system_manager *sysmgr_regs = - (void *)SOCFPGA_SYSMGR_ADDRESS; - #define DDR_CONFIG(A, B, C, R) (((A) << 24) | ((B) << 16) | ((C) << 8) | (R)) #define PGTABLE_OFF 0x4000 @@ -151,7 +148,8 @@ static int emif_reset(struct altera_sdram_platdata *plat) static int poll_hmc_clock_status(void) { - return wait_for_bit_le32(&sysmgr_regs->hmc_clk, + return wait_for_bit_le32((const void *)(socfpga_get_sysmgr_addr() + + SYSMGR_S10_HMC_CLK), SYSMGR_HMC_CLK_STATUS_MSK, true, 1000, false); } -- cgit v1.2.3