From a3ab2ae7f6c8724152f05144946a76b727fb1c7e Mon Sep 17 00:00:00 2001 From: Daniel Schwierzeck Date: Tue, 12 Jan 2016 21:48:26 +0100 Subject: MIPS: sync processor and register definitions with linux-4.4 Update definitions for processor, registers as well as assemby macros. Signed-off-by: Daniel Schwierzeck --- arch/mips/lib/cache.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/mips/lib/cache.c') diff --git a/arch/mips/lib/cache.c b/arch/mips/lib/cache.c index e245614d16..bf8ff598ac 100644 --- a/arch/mips/lib/cache.c +++ b/arch/mips/lib/cache.c @@ -27,7 +27,7 @@ static inline unsigned long icache_line_size(void) { unsigned long conf1, il; conf1 = read_c0_config1(); - il = (conf1 & MIPS_CONF1_IL) >> MIPS_CONF1_IL_SHIFT; + il = (conf1 & MIPS_CONF1_IL) >> MIPS_CONF1_IL_SHF; if (!il) return 0; return 2 << il; @@ -37,7 +37,7 @@ static inline unsigned long dcache_line_size(void) { unsigned long conf1, dl; conf1 = read_c0_config1(); - dl = (conf1 & MIPS_CONF1_DL) >> MIPS_CONF1_DL_SHIFT; + dl = (conf1 & MIPS_CONF1_DL) >> MIPS_CONF1_DL_SHF; if (!dl) return 0; return 2 << dl; -- cgit v1.2.3