From c72f4d4c2ebb3be9797ef6cd7dcbc2124c825f7a Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Thu, 22 Sep 2016 07:42:19 +0900 Subject: ARM: uniphier: add PLL init code for LD11 SoC - Initialize PLLs (SPL initializes only DPLL to save the precious SPL memory footprint) - Adjust CPLL/MPLL to the final tape-out frequency - Set the Cortex-A53 clock to the maximum frequency since it is running at 500MHz (SPLL/4) on startup Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/init/init-ld11.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'arch/arm/mach-uniphier/init/init-ld11.c') diff --git a/arch/arm/mach-uniphier/init/init-ld11.c b/arch/arm/mach-uniphier/init/init-ld11.c index 758df8d269..e324c94700 100644 --- a/arch/arm/mach-uniphier/init/init-ld11.c +++ b/arch/arm/mach-uniphier/init/init-ld11.c @@ -31,12 +31,14 @@ int uniphier_ld11_init(const struct uniphier_board_data *bd) led_puts("L2"); - led_puts("L3"); - #ifdef CONFIG_SPL_SERIAL_SUPPORT preloader_console_init(); #endif + led_puts("L3"); + + uniphier_ld11_dpll_init(bd); + led_puts("L4"); { -- cgit v1.2.3