From 4ddd541d6ceabcf4aeb553373f9ab501a44ed90d Mon Sep 17 00:00:00 2001 From: Ley Foon Tan Date: Wed, 26 Apr 2017 02:44:35 +0800 Subject: arm: socfpga: Restructure system manager Restructure system manager in the preparation to support A10. No functional change. Change uint32_t to u32. Signed-off-by: Ley Foon Tan --- arch/arm/mach-socfpga/system_manager.c | 85 ---------------------------------- 1 file changed, 85 deletions(-) delete mode 100644 arch/arm/mach-socfpga/system_manager.c (limited to 'arch/arm/mach-socfpga/system_manager.c') diff --git a/arch/arm/mach-socfpga/system_manager.c b/arch/arm/mach-socfpga/system_manager.c deleted file mode 100644 index 75a65f3e62..0000000000 --- a/arch/arm/mach-socfpga/system_manager.c +++ /dev/null @@ -1,85 +0,0 @@ -/* - * Copyright (C) 2013 Altera Corporation - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include -#include -#include - -DECLARE_GLOBAL_DATA_PTR; - -static struct socfpga_system_manager *sysmgr_regs = - (struct socfpga_system_manager *)SOCFPGA_SYSMGR_ADDRESS; - -/* - * Populate the value for SYSMGR.FPGAINTF.MODULE based on pinmux setting. - * The value is not wrote to SYSMGR.FPGAINTF.MODULE but - * CONFIG_SYSMGR_ISWGRP_HANDOFF. - */ -static void populate_sysmgr_fpgaintf_module(void) -{ - uint32_t handoff_val = 0; - - /* ISWGRP_HANDOFF_FPGAINTF */ - writel(0, &sysmgr_regs->iswgrp_handoff[2]); - - /* Enable the signal for those HPS peripherals that use FPGA. */ - if (readl(&sysmgr_regs->nandusefpga) == SYSMGR_FPGAINTF_USEFPGA) - handoff_val |= SYSMGR_FPGAINTF_NAND; - if (readl(&sysmgr_regs->rgmii1usefpga) == SYSMGR_FPGAINTF_USEFPGA) - handoff_val |= SYSMGR_FPGAINTF_EMAC1; - if (readl(&sysmgr_regs->sdmmcusefpga) == SYSMGR_FPGAINTF_USEFPGA) - handoff_val |= SYSMGR_FPGAINTF_SDMMC; - if (readl(&sysmgr_regs->rgmii0usefpga) == SYSMGR_FPGAINTF_USEFPGA) - handoff_val |= SYSMGR_FPGAINTF_EMAC0; - if (readl(&sysmgr_regs->spim0usefpga) == SYSMGR_FPGAINTF_USEFPGA) - handoff_val |= SYSMGR_FPGAINTF_SPIM0; - if (readl(&sysmgr_regs->spim1usefpga) == SYSMGR_FPGAINTF_USEFPGA) - handoff_val |= SYSMGR_FPGAINTF_SPIM1; - - /* populate (not writing) the value for SYSMGR.FPGAINTF.MODULE - based on pinmux setting */ - setbits_le32(&sysmgr_regs->iswgrp_handoff[2], handoff_val); - - handoff_val = readl(&sysmgr_regs->iswgrp_handoff[2]); - if (fpgamgr_test_fpga_ready()) { - /* Enable the required signals only */ - writel(handoff_val, &sysmgr_regs->fpgaintfgrp_module); - } -} - -/* - * Configure all the pin muxes - */ -void sysmgr_pinmux_init(void) -{ - uint32_t regs = (uint32_t)&sysmgr_regs->emacio[0]; - const u8 *sys_mgr_init_table; - unsigned int len; - int i; - - sysmgr_get_pinmux_table(&sys_mgr_init_table, &len); - - for (i = 0; i < len; i++) { - writel(sys_mgr_init_table[i], regs); - regs += sizeof(regs); - } - - populate_sysmgr_fpgaintf_module(); -} - -/* - * This bit allows the bootrom to configure the IOs after a warm reset. - */ -void sysmgr_config_warmrstcfgio(int enable) -{ - if (enable) - setbits_le32(&sysmgr_regs->romcodegrp_ctrl, - SYSMGR_ROMCODEGRP_CTRL_WARMRSTCFGIO); - else - clrbits_le32(&sysmgr_regs->romcodegrp_ctrl, - SYSMGR_ROMCODEGRP_CTRL_WARMRSTCFGIO); -} -- cgit v1.2.3