From 40109f4d7ed114cd473e5528b7b0a9a04be9207e Mon Sep 17 00:00:00 2001 From: Lokesh Vutla Date: Tue, 31 Dec 2019 15:49:55 +0530 Subject: arm: mach-k3: Enable WA for R5F deadlock On K3 devices there are 2 conditions where R5F can deadlock: 1.When software is performing series of store operations to cacheable write back/write allocate memory region and later on software execute barrier operation (DSB or DMB). R5F may hang at the barrier instruction. 2.When software is performing a mix of load and store operations within a tight loop and store operations are all writing to cacheable write back/write allocates memory regions, R5F may hang at one of the load instruction. To avoid the above two conditions disable linefill optimization inside Cortex R5F which will make R5F to only issue up to 2 cache line fills at any point of time. Signed-off-by: Lokesh Vutla --- arch/arm/mach-k3/am6_init.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/mach-k3/am6_init.c') diff --git a/arch/arm/mach-k3/am6_init.c b/arch/arm/mach-k3/am6_init.c index 99edcd9a24..a78ffbb674 100644 --- a/arch/arm/mach-k3/am6_init.c +++ b/arch/arm/mach-k3/am6_init.c @@ -82,6 +82,7 @@ void board_init_f(ulong dummy) ctrl_mmr_unlock(); #ifdef CONFIG_CPU_V7R + disable_linefill_optimization(); setup_k3_mpu_regions(); #endif -- cgit v1.2.3