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path: root/drivers/spi/stm32_qspi.c
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* spi: stm32_qspi: Add WATCHDOG_RESET in _stm32_qspi_read_fifo()Patrice Chotard2021-03-111-0/+2
| | | | | | | | | | | | | | | In case of reading large area and memory-map mode is misconfigured (memory-map size declared lower than the real size of the memory chip) watchdog can be triggered. Add WATCHDOG_RESET() in _stm32_qspi_read_fifo to fix it. Issue reproduced with stm32mp157c-ev1 board and memory map size set to 1, with following command: sf read 0xC0000000 0 0x4000000 Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
* spi: stm32_qspi: migrate trace to dev and log macroPatrick Delaunay2021-01-131-21/+25
| | | | | | | | | | Change debug/pr_* to log_* or dev_* macro and define LOG_CATEGORY. Remove the "%s:" __func__ header as it is managed by dev macro (dev->name is displayed) or log macro (CONFIG_LOGF_FUNC). Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
* dm: treewide: Rename ..._platdata variables to just ..._platSimon Glass2020-12-131-1/+1
| | | | | | | Try to maintain some consistency between these variables by using _plat as a suffix for them. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: treewide: Rename 'platdata' variables to just 'plat'Simon Glass2020-12-131-1/+1
| | | | | | | | | | We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: treewide: Rename auto_alloc_size members to be shorterSimon Glass2020-12-131-1/+1
| | | | | | | | | | | | This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
* mtd: spi-mem: Drop dm.h header fileSimon Glass2020-08-031-0/+2
| | | | | | | This header file should not be included in other header files. Remove it and use a forward declaration instead. Signed-off-by: Simon Glass <sjg@chromium.org>
* common: Drop linux/bitops.h from common headerSimon Glass2020-05-181-0/+1
| | | | | | Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
* common: Drop linux/delay.h from common headerSimon Glass2020-05-181-0/+1
| | | | | | Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
* common: Drop log.h from common headerSimon Glass2020-05-181-0/+1
| | | | | | Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: core: Create a new header file for 'compat' featuresSimon Glass2020-02-051-0/+1
| | | | | | | | | | | | At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
* spi: stm32_qspi: Remove "st, stm32-qspi" compatible stringPatrice Chotard2019-07-221-1/+0
| | | | | | "st,stm32-qspi" is no more used, remove it. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
* spi: stm32_qspi: avoid warnings when building with W=1 optionPatrick Delaunay2019-07-121-11/+13
| | | | | | | | | | | This patch solves warnings detected by setting W=1 when building. Warnings type detected: - [-Wtype-limits] - [-Wsign-compare] Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
* spi: stm32_qspi: move to exec_opChristophe Kerello2019-04-121-381/+244
| | | | | | | | | | | | | | | | | | | | We are facing issues in the driver since SPI NOR framework has moved on SPI MEM framework, and SPI NAND framework is not running properly with the current driver. To be able to solve issues met on SPI NOR Flashes and to be able to support SPI NAND Flashes, the driver has been reworked. We are now using exec_op ops instead of using xfer ops. Thanks to this rework, the driver has been successfully tested with: - mx66l51235l SPI NOR Flash on stm32f746 SOC - n25q128a SPI NOR Flash on stm32f769 SOC - mx66l51235l SPI NOR Flash on stm32mp1 SOC - mt29f2g01abagd SPI NAND Flash on stm32mp1 SOC Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Tested-by: Patrick DELAUNAY <patrick.delaunay@st.com> Reviewed-by: Patrick DELAUNAY <patrick.delaunay@st.com>
* mtd: spi: Switch to new SPI NOR frameworkVignesh R2019-02-071-2/+2
| | | | | | | | | | | | | Switch spi_flash_* interfaces to call into new SPI NOR framework via MTD layer. Fix up sf_dataflash to work in legacy way. And update sandbox to use new interfaces/definitions Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
* spi: stm32_qspi: rework mode managementChristophe Kerello2018-07-231-14/+14
| | | | | | | This patch solves quad read issue with Macronix/Micron spi nor. Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
* spi: stm32_qspi: assign functional operation mode in _stm32_qspi_gen_ccrChristophe Kerello2018-07-231-9/+8
| | | | | | | | This patch assigns the functional operation mode in _stm32_qspi_gen_ccr function. Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
* spi: stm32_qspi: Add reset supportPatrice Chotard2018-05-161-0/+15
| | | | | | | | | In some situation, QSPI controller is already configured by an early boot stage, adding reset support will insure that QSPI controller is started from a pristine state. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
* spi: stm32_qspi: Use dev_read_xxx APIPatrice Chotard2018-05-161-11/+6
| | | | | | | Use dev_read_xxx() instead of old manner fdt_xxx() API Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
* spi: stm32_qspi: Add chip select managementChristophe Kerello2018-05-161-0/+15
| | | | | | | | | Quad-SPI interface is able to manage 2 spi nor devices. FSEL bit selects the flash memory to be addressed in single flash mode. Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
* spi: stm32_qspi: Add st, stm32f469-qspi compatible stringChristophe Kerello2018-05-161-0/+1
| | | | | | | | | Add "st,stm32f469-qspi" compatible which is used on kernel side. This will be necessary when DT will be synchronised from kernel. Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
* spi: stm32_qspi: Align reg-names with kernel 4.12 RC1Christophe Kerello2018-05-161-2/+2
| | | | | | | | | | Align qspi bindings following kernel dt-bindings Documentation/devicetree/bindings/mtd/stm32-quadspi.txt from kernel v4.12-rc1. Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
* spi: stm32_qspi: Sort include files alphabeticallyPatrice Chotard2018-05-161-3/+3
| | | | | | | Sort include files by alphabetical order Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
* spi: stm32_qspi: Solve issue detected by checkpatchPatrick Delaunay2018-05-161-13/+18
| | | | | | | | | Fix parameters function alingemnt Fix variable declaration Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
* spi: stm32_qspi: Remove CONFIG_CLK flagPatrice Chotard2018-05-161-4/+2
| | | | | | | | As all platforms which uses this driver have CONFIG_CLK flag enable in their defconfig, we can remove it from driver code. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
* SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini2018-05-071-2/+1
| | | | | | | | | | | | | | | | | | | | When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
* board: stm32: switch to DM STM32 timerPatrice Chotard2018-03-131-1/+0
| | | | | | | | | | | | Use available DM stm32_timer driver instead of dedicated mach-stm32/stm32fx/timer.c. Remove all defines or files previously used for timer usage in arch/arm/include/asm/arch-stm32fx and in arch/arm/mach-stm32/stm32fx Enable DM STM32_TIMER for STM32F4/F7 and H7. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
* spi: stm32_qspi: add clk_get_rate() supportPatrice Chotard2017-07-261-1/+9
| | | | | | | | | Replace proprietary clock_get() by clk_get_rate() The stm32_qspi is now "generic" and can be used by other STM32 SoCs. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Acked-by: Vikas MANOCHA <vikas.manocha@st.com>
* stm32f7: use clock driver to enable qspi controller clockVikas Manocha2017-05-081-1/+15
| | | | | Signed-off-by: Vikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
* dm: core: Replace of_offset with accessorSimon Glass2017-02-081-1/+1
| | | | | | | | | At present devices use a simple integer offset to record the device tree node associated with the device. In preparation for supporting a live device tree, which uses a node pointer instead, refactor existing code to access this field through an inline function. Signed-off-by: Simon Glass <sjg@chromium.org>
* ARM: SPI: stm32: add stm32f746 qspi driverMichael Kurz2017-01-281-0/+628
This patch adds support for the QSPI IP found in stm32f7 devices. Signed-off-by: Michael Kurz <michi.kurz@gmail.com>
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