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wait 200us to solve USB init issue on device mode
(ums and stm32prog commands)
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
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vdda1v1 and vdda1v8 are used by the PLL.
Both need to be enabled before starting the PLL.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
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Move supply vdda1v1 and vdda1v8 in usbphyc node and
no more in port
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
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Parameter added for port 1, for example:
&usbh_ehci {
phys = <&usbphyc_port0>;
phy-names = "usb";
vbus-supply = <&vbus_sw>;
status = "okay";
};
&usbotg_hs {
pinctrl-names = "default";
pinctrl-0 = <&usbotg_hs_pins_a>;
phys = <&usbphyc_port1 0>;
phy-names = "usb2-phy";
status = "okay";
};
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
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Remove unused field index in struct stm32_usbphyc_phy.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
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Signed-off-by: Tom Rini <trini@konsulko.com>
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This patch adds phy tranceiver driver for STM32 USB PHY
Controller (usbphyc) that provides dual port High-Speed
phy for OTG (single port) and EHCI/OHCI host controller
(two ports).
One port of the phy is shared between the two USB controllers
through a UTMI+ switch.
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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