aboutsummaryrefslogtreecommitdiff
path: root/drivers/ddr/marvell/axp
Commit message (Collapse)AuthorAgeFilesLines
* arm: Partial cleanup and audit usage of <config.h>Tom Rini2023-12-211-0/+2
| | | | | | | | | | | We need to include <config.h> directly when a file needs to have something such as CFG_SYS_SDRAM_SIZE referenced as this file is not automatically globally included and is most commonly indirectly included via common.h. Remove most cases of arm including config.h directly, but add it where needed. This includes a few board-specific fixes. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
* global: Remove undef CONFIG_... for unused valuesTom Rini2022-12-231-2/+0
| | | | | | | We have a number of places that undef CONFIG_... while we never reference CONFIG_... in the first place. Remove these lines. Signed-off-by: Tom Rini <trini@konsulko.com>
* global: Move remaining CONFIG_SYS_SDRAM_* to CFG_SYS_SDRAM_*Tom Rini2022-12-051-2/+2
| | | | | | | | | | The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_SDRAM namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* db-mv784mp-gp: Rename CONFIG_DB_784MP_GP to CONFIG_TARGET_DB_MV784MP_GPTom Rini2022-04-012-2/+2
| | | | | | | | | The value CONFIG_DB_784MP_GP is only used in the DDR code to refer to CONFIG_TARGET_DB_MV784MP_GP so just use that second value directly. Cc: Stefan Roese <sr@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Stefan Roese <sr@denx.de>
* arm: mvebu: axp: ddr: Switch to using DM I2C APIStefan Roese2021-12-193-8/+26
| | | | | | | | No functional change intended. This patch switches from the legacy I2C API to the DM I2C API, so that this code can be used with DM I2C enabled. Signed-off-by: Stefan Roese <sr@denx.de>
* arm: mvebu: axp: Remove unreferenced ddr3_get_eprom_fabric() functionStefan Roese2021-12-193-26/+0
| | | | | | This function is not referenced in mainline U-Boot. Let's remove now. Signed-off-by: Stefan Roese <sr@denx.de>
* WS cleanup: remove SPACE(s) followed by TABWolfgang Denk2021-09-301-1/+1
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* mvebe: Migrate CONFIG_DDR_LOG_LEVEL to KconfigTom Rini2021-08-311-4/+0
| | | | | | Move this specific option to Kconfig. Signed-off-by: Tom Rini <trini@konsulko.com>
* mvebu: ddr: Rename CONFIG_DDR_FIXED_SIZE to CONFIG_SYS_SDRAM_SIZETom Rini2021-08-311-2/+2
| | | | | | | | | | | | We have a number of CONFIG symbols to express the fixed size of system memory. For now, rename CONFIG_DDR_FIXED_SIZE to CONFIG_SYS_SDRAM_SIZE and adjust usage to match that CONFIG_SYS_SDRAM_SIZE expects the entire size rather than MiB. Cc: Marek Behún <marek.behun@nic.cz> Cc: Stefan Roese <sr@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Marek Behún <marek.behun@nic.cz>
* ddr: marvell: axp: fix array types have different bounds warningMarek Behún2021-03-122-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The arrays `pbs_dq_mapping`, `div_ratio1to1` and `div_ratio2to1` have different bounds declared in header files where these variables are also defined from the ones declared in source files. This causes the compiler to complain (when building with LTO): ddr3_sdram.c:24:12: warning: type of ‘pbs_dq_mapping’ does not match original declaration [-Wlto-type-mismatch] ddr3_patterns_64bit.h:911:5: note: array types have different bounds ddr3_patterns_64bit.h:911:5: note: ‘pbs_dq_mapping’ was previously declared here ddr3_dfs.c:45:11: warning: type of ‘div_ratio1to1’ does not match original declaration [-Wlto-type-mismatch] ddr3_axp_vars.h:167:4: note: array types have different bounds ddr3_axp_vars.h:167:4: note: ‘div_ratio1to1’ was previously declared here ddr3_dfs.c:46:11: warning: type of ‘div_ratio2to1’ does not match original declaration [-Wlto-type-mismatch] ddr3_axp_vars.h:196:4: note: array types have different bounds ddr3_axp_vars.h:196:4: note: ‘div_ratio2to1’ was previously declared here CI managed to trigger this as an error when compiling with LTO for AXP. Fix this by using values from the header files, which seem to be the correct ones. Signed-off-by: Marek Behún <marek.behun@nic.cz>
* ddr: marvell: axp: align signature of mv_xor_mem_init() with a38xMarek Behún2021-03-122-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In arch/arm/mach-mvebu/dram.c we always include axp's xor.h for common XOR definitions, regardless whether we compile for axp or a38x. But the declaration of this function has a different signature in axp's xor.h from the one used in a38x' implementation - one parameter is u64 instead of u32. This can result in wrong argument's being passed to that function on a38x with no one the wiser. I discovered this when building U-Boot for Turris Omnia with LTO. The compiler complains about the different signatures being thrown into the same linking process: axp/xor.h:67:5: warning: type of ‘mv_xor_mem_init’ does not match original declaration [-Wlto-type-mismatch] 67 | int mv_xor_mem_init(u32 chan, u32 start_ptr, u32 block_size, | ^ a38x/xor.c:165:5: note: type mismatch in parameter 3 165 | int mv_xor_mem_init(u32 chan, u32 start_ptr, unsigned long long | ^ a38x/xor.c:165:5: note: type ‘long long unsigned int’ should match type ‘u32’ Fix this by changing the type of the block_size argument in the axp's implementation and header file to the one used in a38x (and upstream mv-ddr-marvell). Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
* common: Drop linux/delay.h from common headerSimon Glass2020-05-185-0/+5
| | | | | | Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
* common: Drop log.h from common headerSimon Glass2020-05-186-0/+6
| | | | | | Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
* arm: mvebu: drivers/ddr: remove redundant assignmentHeinrich Schuchardt2020-04-141-4/+0
| | | | | | | | The value of local variable ecc is immediately overwritten. So we can remove the first assignment. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Stefan Roese <sr@denx.de>
* arm: mvebu: Add Marvell's integrated CPUsChris Packham2019-04-121-0/+4
| | | | | | | | | | | | Marvell's switch chips with integrated CPUs (collectively referred to as MSYS) share common ancestry with the Armada SoCs. Some of the IP blocks (e.g. xor) are located at different addresses and DFX server exists as a separate target on the MBUS (on Armada-38x it's just part of the core complex registers). Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
* SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini2018-05-0721-43/+21
| | | | | | | | | | | | | | | | | | | | When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
* treewide: remove unneeded semicolonsMasahiro Yamada2017-06-161-1/+1
| | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* Fix spelling of "occurred".Vagrant Cascadian2016-05-021-1/+1
| | | | | Signed-off-by: Vagrant Cascadian <vagrant@debian.org> Reviewed-by: Simon Glass <sjg@chromium.org>
* Use correct spelling of "U-Boot"Bin Meng2016-02-061-1/+1
| | | | | | | | | | Correct spelling of "U-Boot" shall be used in all written text (documentation, comments in source files etc.). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
* mvebu: axp: Rename MV_DDR_32BIT to CONFIG_DDR_32BITPhil Sutter2016-01-142-11/+11
| | | | | | | | | This should make it clear that this symbol is meant to be defined by board headers. Signed-off-by: Phil Sutter <phil@nwl.cc> Acked-by: Stefan Roese <sr@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
* axp: Fix debugging support in DDR3 write levelingPhil Sutter2016-01-141-2/+2
| | | | | | | | | | If MV_DEBUG_WL is defined, DEBUG_WL_S and DEBUG_WL_D macros are missing. In addition to that, get rid of debug output printing non-existent counter variable. Signed-off-by: Phil Sutter <phil@nwl.cc> Acked-by: Stefan Roese <sr@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
* arm: mvebu: Make ECC support configurable on Armada XPStefan Roese2016-01-142-0/+8
| | | | | | | | | | | Currently, ECC support is enabled for all Armada XP boards. So the DDR3 driver tries to configure the controller with ECC support, even on boards without ECC. This patch makes this ECC optional which now can be configured on a board-per-board basis. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Phil Sutter <phil@nwl.cc>
* arm: mvebu: Add complete SDRAM ECC scrubbingStefan Roese2015-08-172-2/+2
| | | | | | | | | | | | This patch introduces the SDRAM scrubbing for ECC enabled board to fill/initialize the ECC bytes. This is done via the XOR engine to speed up the process. The scrubbing is a 2-stage process: 1) SPL scrubs the area 0 - 0x100.0000 (16MiB) for the main U-Boot 2) U-Boot scrubs the remaining SDRAM area(s) Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
* arm: mvebu: sdram: Enable ECC support on Armada XPStefan Roese2015-08-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is tested on the DB-MV784MP-GP eval board. To really enable ECC support on this board the I2C EEPROM needs to get changed. As it saves the enabling of ECC support internally. For this the following commands can be used to enable ECC support on this board: Its recommended for first save (print) the value(s) in this EEPROM address: => i2c md 4e 0.1 2 0000: 05 00 .. To enable ECC support you need to set bit 1 in the 2nd byte: Marvell>> i2c mw 4e 1.1 02 Marvell>> i2c md 4e 0.1 2 0000: 05 02 .. To disable ECC support again, please use this command: Marvell>> i2c mw 4e 1.1 00 Marvell>> i2c md 4e 0.1 2 0000: 05 00 .. On other AXP boards, simply plugging an ECC DIMM should be enough to enable ECC support. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
* arm: mvebu: drivers/ddr: Move Armada XP DDR init code into new directoryStefan Roese2015-07-2321-0/+15419
With the upcoming addition of the Armada 38x DDR support, which is not compatible to the Armada XP DDR init code, we need to introduce a new directory infrastructure. To support multiple Marvell DDR controller. This will be the new structure: drivers/ddr/marvell/axp Supporting Armada XP (AXP) devices (and perhaps Armada 370) drivers/ddr/marvell/a38x Supporting Armada 38x devices (and perhaps Armada 39x) Signed-off-by: Stefan Roese <sr@denx.de>
generated by cgit v1.2.3 (git 2.39.1) at 2025-05-21 00:39:23 +0000