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-rw-r--r--tools/binman/binman.rst4
-rw-r--r--tools/binman/entries.rst14
-rw-r--r--tools/binman/etype/mkimage.py24
-rw-r--r--tools/binman/etype/rockchip_tpl.py20
-rw-r--r--tools/binman/ftest.py18
-rw-r--r--tools/binman/missing-blob-help5
-rw-r--r--tools/binman/test/277_rockchip_tpl.dts16
-rw-r--r--tools/binman/test/278_mkimage_missing_multiple.dts19
-rw-r--r--tools/rkcommon.c5
9 files changed, 120 insertions, 5 deletions
diff --git a/tools/binman/binman.rst b/tools/binman/binman.rst
index e65fbff783..7fc0c7fe03 100644
--- a/tools/binman/binman.rst
+++ b/tools/binman/binman.rst
@@ -406,9 +406,9 @@ system-library directory, replace the last line with:
Running binman
--------------
-Type::
+Type:
-.. code-block: bash
+.. code-block:: bash
make NO_PYTHON=1 PREFIX=/ install
binman build -b <board_name>
diff --git a/tools/binman/entries.rst b/tools/binman/entries.rst
index 9a52b225a9..b71af801fd 100644
--- a/tools/binman/entries.rst
+++ b/tools/binman/entries.rst
@@ -1391,6 +1391,20 @@ For example, this creates an image with a pre-load header and a binary::
+.. _etype_rockchip_tpl:
+
+Entry: rockchip-tpl: Rockchip TPL binary
+----------------------------------------
+
+Properties / Entry arguments:
+ - rockchip-tpl-path: Filename of file to read into the entry,
+ typically <soc>_ddr_<version>.bin
+
+This entry holds an external TPL binary used by some Rockchip SoCs
+instead of normal U-Boot TPL, typically to initialize DRAM.
+
+
+
.. _etype_scp:
Entry: scp: System Control Processor (SCP) firmware blob
diff --git a/tools/binman/etype/mkimage.py b/tools/binman/etype/mkimage.py
index 27a0c4bd7c..e028c44070 100644
--- a/tools/binman/etype/mkimage.py
+++ b/tools/binman/etype/mkimage.py
@@ -156,7 +156,8 @@ class Entry_mkimage(Entry):
for entry in self._mkimage_entries.values():
if not entry.ObtainContents(fake_size=fake_size):
return False
- fnames.append(tools.get_input_filename(entry.GetDefaultFilename()))
+ if entry._pathname:
+ fnames.append(entry._pathname)
input_fname = ":".join(fnames)
else:
data, input_fname, uniq = self.collect_contents_to_file(
@@ -171,6 +172,13 @@ class Entry_mkimage(Entry):
outfile = self._filename if self._filename else 'mkimage-out.%s' % uniq
output_fname = tools.get_output_filename(outfile)
+ missing_list = []
+ self.CheckMissing(missing_list)
+ self.missing = bool(missing_list)
+ if self.missing:
+ self.SetContents(b'')
+ return self.allow_missing
+
args = ['-d', input_fname]
if self._data_to_imagename:
args += ['-n', input_fname]
@@ -216,6 +224,20 @@ class Entry_mkimage(Entry):
if self._imagename:
self._imagename.SetAllowFakeBlob(allow_fake)
+ def CheckMissing(self, missing_list):
+ """Check if any entries in this section have missing external blobs
+
+ If there are missing (non-optional) blobs, the entries are added to the
+ list
+
+ Args:
+ missing_list: List of Entry objects to be added to
+ """
+ for entry in self._mkimage_entries.values():
+ entry.CheckMissing(missing_list)
+ if self._imagename:
+ self._imagename.CheckMissing(missing_list)
+
def CheckFakedBlobs(self, faked_blobs_list):
"""Check if any entries in this section have faked external blobs
diff --git a/tools/binman/etype/rockchip_tpl.py b/tools/binman/etype/rockchip_tpl.py
new file mode 100644
index 0000000000..74f58ba857
--- /dev/null
+++ b/tools/binman/etype/rockchip_tpl.py
@@ -0,0 +1,20 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Entry-type module for Rockchip TPL binary
+#
+
+from binman.etype.blob_named_by_arg import Entry_blob_named_by_arg
+
+class Entry_rockchip_tpl(Entry_blob_named_by_arg):
+ """Rockchip TPL binary
+
+ Properties / Entry arguments:
+ - rockchip-tpl-path: Filename of file to read into the entry,
+ typically <soc>_ddr_<version>.bin
+
+ This entry holds an external TPL binary used by some Rockchip SoCs
+ instead of normal U-Boot TPL, typically to initialize DRAM.
+ """
+ def __init__(self, section, etype, node):
+ super().__init__(section, etype, node, 'rockchip-tpl')
+ self.external = True
diff --git a/tools/binman/ftest.py b/tools/binman/ftest.py
index f1e14c6b3d..d455ea02ea 100644
--- a/tools/binman/ftest.py
+++ b/tools/binman/ftest.py
@@ -90,6 +90,7 @@ TEE_OS_DATA = b'this is some tee OS data'
ATF_BL2U_DATA = b'bl2u'
OPENSBI_DATA = b'opensbi'
SCP_DATA = b'scp'
+ROCKCHIP_TPL_DATA = b'rockchip-tpl'
TEST_FDT1_DATA = b'fdt1'
TEST_FDT2_DATA = b'test-fdt2'
ENV_DATA = b'var1=1\nvar2="2"'
@@ -205,6 +206,7 @@ class TestFunctional(unittest.TestCase):
TestFunctional._MakeInputFile('bl2u.bin', ATF_BL2U_DATA)
TestFunctional._MakeInputFile('fw_dynamic.bin', OPENSBI_DATA)
TestFunctional._MakeInputFile('scp.bin', SCP_DATA)
+ TestFunctional._MakeInputFile('rockchip-tpl.bin', ROCKCHIP_TPL_DATA)
# Add a few .dtb files for testing
TestFunctional._MakeInputFile('%s/test-fdt1.dtb' % TEST_FDT_SUBDIR,
@@ -6565,6 +6567,22 @@ fdt fdtmap Extract the devicetree blob from the fdtmap
err = stderr.getvalue()
self.assertRegex(err, "Image 'image'.*missing bintools.*: openssl")
+ def testPackRockchipTpl(self):
+ """Test that an image with a Rockchip TPL binary can be created"""
+ data = self._DoReadFile('277_rockchip_tpl.dts')
+ self.assertEqual(ROCKCHIP_TPL_DATA, data[:len(ROCKCHIP_TPL_DATA)])
+
+ def testMkimageMissingBlobMultiple(self):
+ """Test missing blob with mkimage entry and multiple-data-files"""
+ with test_util.capture_sys_output() as (stdout, stderr):
+ self._DoTestFile('278_mkimage_missing_multiple.dts', allow_missing=True)
+ err = stderr.getvalue()
+ self.assertIn("is missing external blobs and is non-functional", err)
+
+ with self.assertRaises(ValueError) as e:
+ self._DoTestFile('278_mkimage_missing_multiple.dts', allow_missing=False)
+ self.assertIn("not found in input path", str(e.exception))
+
if __name__ == "__main__":
unittest.main()
diff --git a/tools/binman/missing-blob-help b/tools/binman/missing-blob-help
index 4448ac9311..f3a44d08ac 100644
--- a/tools/binman/missing-blob-help
+++ b/tools/binman/missing-blob-help
@@ -34,6 +34,11 @@ If CONFIG_WDT_K3_RTI_LOAD_FW is enabled, a firmware image is needed for
the R5F core(s) to trigger the system reset. One possible source is
https://github.com/siemens/k3-rti-wdt.
+rockchip-tpl:
+An external TPL is required to initialize DRAM. Get the external TPL
+binary and build with ROCKCHIP_TPL=/path/to/ddr.bin. One possible source
+for the external TPL binary is https://github.com/rockchip-linux/rkbin.
+
tee-os:
See the documentation for your board. You may need to build Open Portable
Trusted Execution Environment (OP-TEE) with TEE=/path/to/tee.bin
diff --git a/tools/binman/test/277_rockchip_tpl.dts b/tools/binman/test/277_rockchip_tpl.dts
new file mode 100644
index 0000000000..269f56e254
--- /dev/null
+++ b/tools/binman/test/277_rockchip_tpl.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+/dts-v1/;
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ binman {
+ size = <16>;
+
+ rockchip-tpl {
+ filename = "rockchip-tpl.bin";
+ };
+ };
+};
diff --git a/tools/binman/test/278_mkimage_missing_multiple.dts b/tools/binman/test/278_mkimage_missing_multiple.dts
new file mode 100644
index 0000000000..f84aea49ea
--- /dev/null
+++ b/tools/binman/test/278_mkimage_missing_multiple.dts
@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+/dts-v1/;
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ binman {
+ mkimage {
+ args = "-n test -T script";
+ multiple-data-files;
+
+ blob-ext {
+ filename = "missing.bin";
+ };
+ };
+ };
+};
diff --git a/tools/rkcommon.c b/tools/rkcommon.c
index 1f1eaa1675..96efc1192c 100644
--- a/tools/rkcommon.c
+++ b/tools/rkcommon.c
@@ -129,12 +129,13 @@ static struct spl_info spl_infos[] = {
{ "rk322x", "RK32", 0x8000 - 0x1000, false, RK_HEADER_V1 },
{ "rk3288", "RK32", 0x8000, false, RK_HEADER_V1 },
{ "rk3308", "RK33", 0x40000 - 0x1000, false, RK_HEADER_V1 },
- { "rk3328", "RK32", 0x8000 - 0x1000, false, RK_HEADER_V1 },
+ { "rk3328", "RK32", 0x8000 - 0x800, false, RK_HEADER_V1 },
{ "rk3368", "RK33", 0x8000 - 0x1000, false, RK_HEADER_V1 },
{ "rk3399", "RK33", 0x30000 - 0x2000, false, RK_HEADER_V1 },
{ "rv1108", "RK11", 0x1800, false, RK_HEADER_V1 },
{ "rv1126", "110B", 0x10000 - 0x1000, false, RK_HEADER_V1 },
- { "rk3568", "RK35", 0x14000 - 0x1000, false, RK_HEADER_V2 },
+ { "rk3568", "RK35", 0x10000 - 0x1000, false, RK_HEADER_V2 },
+ { "rk3588", "RK35", 0x100000 - 0x1000, false, RK_HEADER_V2 },
};
/**
generated by cgit v1.2.3 (git 2.39.1) at 2025-05-28 10:43:27 +0000