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-rw-r--r--include/blk.h8
-rw-r--r--include/configs/apalis_imx6.h10
-rw-r--r--include/configs/colibri-imx6ull.h10
-rw-r--r--include/configs/colibri_imx6.h10
-rw-r--r--include/configs/colibri_imx7.h10
-rw-r--r--include/configs/dh_imx6.h3
-rw-r--r--include/configs/imx8mm-mx8menlo.h2
-rw-r--r--include/configs/imx8mp_evk.h6
-rw-r--r--include/configs/imx8mp_icore_mx8mp.h64
-rw-r--r--include/configs/km/km-powerpc.h3
-rw-r--r--include/configs/kmcent2.h3
-rw-r--r--include/configs/kontron-sl-mx6ul.h10
-rw-r--r--include/configs/kontron-sl-mx8mm.h16
-rw-r--r--include/configs/nitrogen6x.h2
-rw-r--r--include/configs/qemu-arm.h12
-rw-r--r--include/configs/tbs2910.h4
-rw-r--r--include/configs/verdin-imx8mm.h5
-rw-r--r--include/configs/verdin-imx8mp.h10
-rw-r--r--include/dt-bindings/clock/imx6sl-clock.h10
-rw-r--r--include/dt-bindings/clock/imx6sll-clock.h16
-rw-r--r--include/dt-bindings/clock/imx7ulp-clock.h170
-rw-r--r--include/fsl_csu.h4
-rw-r--r--include/linux/mtd/spi-nor.h5
-rw-r--r--include/net.h2
-rw-r--r--include/phy.h2
-rw-r--r--include/sdhci.h1
26 files changed, 200 insertions, 198 deletions
diff --git a/include/blk.h b/include/blk.h
index 8806c382d4..d3ab9a10b9 100644
--- a/include/blk.h
+++ b/include/blk.h
@@ -119,7 +119,7 @@ int blkcache_init(void);
* @param start - starting block number
* @param blkcnt - number of blocks to read
* @param blksz - size in bytes of each block
- * @param buf - buffer to contain cached data
+ * @param buffer - buffer to contain cached data
*
* Return: - 1 if block returned from cache, 0 otherwise.
*/
@@ -136,7 +136,7 @@ int blkcache_read(int iftype, int dev,
* @param start - starting block number
* @param blkcnt - number of blocks available
* @param blksz - size in bytes of each block
- * @param buf - buffer containing data to cache
+ * @param buffer - buffer containing data to cache
*
*/
void blkcache_fill(int iftype, int dev,
@@ -250,7 +250,7 @@ struct blk_ops {
* The MMC standard provides for two boot partitions (numbered 1 and 2),
* rpmb (3), and up to 4 addition general-purpose partitions (4-7).
*
- * @desc: Block device to update
+ * @dev: Block device to update
* @hwpart: Hardware partition number to select. 0 means the raw
* device, 1 is the first partition, 2 is the second, etc.
* @return 0 if OK, -ve on error
@@ -642,6 +642,7 @@ int blk_print_part_devnum(enum uclass_id uclass_id, int devnum);
*
* @uclass_id: Block device type
* @devnum: Device number
+ * @start: Start block number to read (0=first)
* @blkcnt: Number of blocks to read
* @buffer: Address to write data to
* Return: number of blocks read, or -ve error number on error
@@ -654,6 +655,7 @@ ulong blk_read_devnum(enum uclass_id uclass_id, int devnum, lbaint_t start,
*
* @uclass_id: Block device type
* @devnum: Device number
+ * @start: Start block number to write (0=first)
* @blkcnt: Number of blocks to write
* @buffer: Address to read data from
* Return: number of blocks written, or -ve error number on error
diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h
index 4922b06330..8f33894347 100644
--- a/include/configs/apalis_imx6.h
+++ b/include/configs/apalis_imx6.h
@@ -70,11 +70,11 @@
#define MEM_LAYOUT_ENV_SETTINGS \
"bootm_size=0x20000000\0" \
- "fdt_addr_r=0x12100000\0" \
- "kernel_addr_r=0x11000000\0" \
- "pxefile_addr_r=0x17100000\0" \
- "ramdisk_addr_r=0x12200000\0" \
- "scriptaddr=0x17000000\0"
+ "fdt_addr_r=0x18200000\0" \
+ "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
+ "pxefile_addr_r=0x18300000\0" \
+ "ramdisk_addr_r=0x18400000\0" \
+ "scriptaddr=0x18280000\0"
#define CONFIG_EXTRA_ENV_SETTINGS \
BOOTENV \
diff --git a/include/configs/colibri-imx6ull.h b/include/configs/colibri-imx6ull.h
index 04cde9530a..79b1284cc7 100644
--- a/include/configs/colibri-imx6ull.h
+++ b/include/configs/colibri-imx6ull.h
@@ -43,11 +43,11 @@
#define MEM_LAYOUT_ENV_SETTINGS \
"bootm_size=0x10000000\0" \
- "fdt_addr_r=0x82100000\0" \
- "kernel_addr_r=0x81000000\0" \
- "pxefile_addr_r=0x87100000\0" \
- "ramdisk_addr_r=0x82200000\0" \
- "scriptaddr=0x87000000\0"
+ "fdt_addr_r=0x88200000\0" \
+ "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
+ "pxefile_addr_r=0x88300000\0" \
+ "ramdisk_addr_r=0x88400000\0" \
+ "scriptaddr=0x88280000\0"
#define UBI_BOOTCMD \
"ubiargs=ubi.mtd=ubi root=ubi0:rootfs rw rootfstype=ubifs " \
diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h
index 3c220e0d6e..d8b8736623 100644
--- a/include/configs/colibri_imx6.h
+++ b/include/configs/colibri_imx6.h
@@ -66,11 +66,11 @@
#define MEM_LAYOUT_ENV_SETTINGS \
"bootm_size=0x10000000\0" \
- "fdt_addr_r=0x12100000\0" \
- "kernel_addr_r=0x11000000\0" \
- "pxefile_addr_r=0x17100000\0" \
- "ramdisk_addr_r=0x12200000\0" \
- "scriptaddr=0x17000000\0"
+ "fdt_addr_r=0x18200000\0" \
+ "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
+ "pxefile_addr_r=0x18300000\0" \
+ "ramdisk_addr_r=0x18400000\0" \
+ "scriptaddr=0x18280000\0"
#define CONFIG_EXTRA_ENV_SETTINGS \
BOOTENV \
diff --git a/include/configs/colibri_imx7.h b/include/configs/colibri_imx7.h
index 9543e0233e..b8d0dc959a 100644
--- a/include/configs/colibri_imx7.h
+++ b/include/configs/colibri_imx7.h
@@ -83,11 +83,11 @@
#define MEM_LAYOUT_ENV_SETTINGS \
"bootm_size=0x10000000\0" \
- "fdt_addr_r=0x82000000\0" \
- "kernel_addr_r=0x81000000\0" \
- "pxefile_addr_r=0x87100000\0" \
- "ramdisk_addr_r=0x82100000\0" \
- "scriptaddr=0x87000000\0"
+ "fdt_addr_r=0x88200000\0" \
+ "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
+ "pxefile_addr_r=0x88300000\0" \
+ "ramdisk_addr_r=0x88400000\0" \
+ "scriptaddr=0x88280000\0"
#define UBI_BOOTCMD \
"ubiargs=ubi.mtd=ubi root=ubi0:rootfs rootfstype=ubifs " \
diff --git a/include/configs/dh_imx6.h b/include/configs/dh_imx6.h
index 0f7e1c5c45..2040deb2b8 100644
--- a/include/configs/dh_imx6.h
+++ b/include/configs/dh_imx6.h
@@ -60,8 +60,7 @@
"fdtfile=imx6q-dhcom-pdk2.dtb\0"\
"update_sf=" /* Erase SPI NOR and install U-Boot from SD */ \
"load mmc 0:1 ${loadaddr} /boot/u-boot-with-spl.imx && "\
- "sf probe && sf erase 0x0 0x100000 && " \
- "sf write ${loadaddr} 0x400 ${filesize}\0" \
+ "sf probe && sf update ${loadaddr} 0x400 ${filesize}\0" \
BOOTENV
#define BOOT_TARGET_DEVICES(func) \
diff --git a/include/configs/imx8mm-mx8menlo.h b/include/configs/imx8mm-mx8menlo.h
index 530ecd1d46..938c5406b8 100644
--- a/include/configs/imx8mm-mx8menlo.h
+++ b/include/configs/imx8mm-mx8menlo.h
@@ -25,7 +25,7 @@
"fi ; " \
"boot\0" \
"boot_file=fitImage\0" \
- "console=ttymxc1\0" \
+ "console=ttymxc0\0" \
"fdt_addr=0x43000000\0" \
"initrd_addr=0x43800000\0" \
"kernel_image=fitImage\0"
diff --git a/include/configs/imx8mp_evk.h b/include/configs/imx8mp_evk.h
index 388f3bc9ff..140eba3d1c 100644
--- a/include/configs/imx8mp_evk.h
+++ b/include/configs/imx8mp_evk.h
@@ -55,11 +55,9 @@
#define CONFIG_SYS_INIT_RAM_SIZE 0x80000
-/* Totally 6GB DDR */
+/* Totally 2GB DDR */
#define CONFIG_SYS_SDRAM_BASE 0x40000000
#define PHYS_SDRAM 0x40000000
-#define PHYS_SDRAM_SIZE 0xC0000000 /* 3 GB */
-#define PHYS_SDRAM_2 0x100000000
-#define PHYS_SDRAM_2_SIZE 0xC0000000 /* 3 GB */
+#define PHYS_SDRAM_SIZE 0x80000000
#endif
diff --git a/include/configs/imx8mp_icore_mx8mp.h b/include/configs/imx8mp_icore_mx8mp.h
new file mode 100644
index 0000000000..28d44163e4
--- /dev/null
+++ b/include/configs/imx8mp_icore_mx8mp.h
@@ -0,0 +1,64 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (c) 2020 Engicam srl
+ * Copyright (c) 2022 Amarula Solutions(India)
+ */
+
+#ifndef __IMX8MP_ICORE_MX8MP_H
+#define __IMX8MP_ICORE_MX8MP_H
+
+#include <linux/sizes.h>
+#include <linux/stringify.h>
+#include <asm/arch/imx-regs.h>
+
+#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
+#define CONFIG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
+
+#ifdef CONFIG_SPL_BUILD
+/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
+
+#define CONFIG_POWER_PCA9450
+
+#endif
+
+#if defined(CONFIG_CMD_NET)
+#define CONFIG_FEC_MXC_PHYADDR 1
+
+#define DWC_NET_PHYADDR 1
+
+#define PHY_ANEG_TIMEOUT 20000
+
+#endif
+
+#define BOOT_TARGET_DEVICES(func) \
+ func(MMC, mmc, 1) \
+ func(MMC, mmc, 2)
+
+#include <config_distro_bootcmd.h>
+
+/* Initial environment variables */
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ BOOTENV \
+ "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
+ "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
+ "image=Image\0" \
+ "console=ttymxc1,115200 earlycon=ec_imx6q,0x30890000,115200\0" \
+ "fdt_addr_r=0x43000000\0" \
+ "boot_fdt=try\0" \
+ "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
+ "initrd_addr=0x43800000\0" \
+ "bootm_size=0x10000000\0" \
+ "mmcpart=1\0" \
+ "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \
+
+/* Link Definitions */
+
+#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
+#define CONFIG_SYS_INIT_RAM_SIZE 0x80000
+
+/* Totally 2GB DDR */
+#define CONFIG_SYS_SDRAM_BASE 0x40000000
+#define PHYS_SDRAM 0x40000000
+#define PHYS_SDRAM_SIZE 0x80000000
+
+#endif /* __IMX8MP_ICORE_MX8MP_H */
diff --git a/include/configs/km/km-powerpc.h b/include/configs/km/km-powerpc.h
index 20a36fbe11..424caa0df9 100644
--- a/include/configs/km/km-powerpc.h
+++ b/include/configs/km/km-powerpc.h
@@ -21,11 +21,8 @@
* @CONFIG_KM_RESERVED_PRAM: reserved pram for special purpose
* @CONFIG_KM_PHRAM: address for /var
* @CONFIG_KM_PNVRAM: address for PNVRAM (for the application)
- * @CONFIG_KM_ROOTFSSIZE: address for rootfilesystem in RAM
*/
-/* size of rootfs in RAM */
-#define CONFIG_KM_ROOTFSSIZE 0x0
/* set the default PRAM value to at least PNVRAM + PHRAM when pram env variable
* is not valid yet, which is the case for when u-boot copies itself to RAM */
#define CONFIG_PRAM ((CONFIG_KM_PNVRAM + CONFIG_KM_PHRAM)>>10)
diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h
index 0d470c4b4a..1b1900179e 100644
--- a/include/configs/kmcent2.h
+++ b/include/configs/kmcent2.h
@@ -179,11 +179,8 @@
* @CONFIG_KM_RESERVED_PRAM: reserved pram for special purpose
* @CONFIG_KM_PHRAM: address for /var
* @CONFIG_KM_PNVRAM: address for PNVRAM (for the application)
- * @CONFIG_KM_ROOTFSSIZE: address for rootfilesystem in RAM
*/
-/* size of rootfs in RAM */
-#define CONFIG_KM_ROOTFSSIZE 0x0
/* set the default PRAM value to at least PNVRAM + PHRAM when pram env variable
* is not valid yet, which is the case for when u-boot copies itself to RAM
*/
diff --git a/include/configs/kontron-sl-mx6ul.h b/include/configs/kontron-sl-mx6ul.h
index 7aac5d3f5a..f0586f7f72 100644
--- a/include/configs/kontron-sl-mx6ul.h
+++ b/include/configs/kontron-sl-mx6ul.h
@@ -49,14 +49,6 @@
#define CONFIG_SYS_FSL_USDHC_NUM 2
#endif
-#define CONFIG_EXTRA_ENV_SETTINGS \
- "kernel_addr_r=0x82000000\0" \
- "ramdisk_addr_r=0x88080000\0" \
- "pxefile_addr_r=0x80100000\0" \
- "scriptaddr=0x80100000\0" \
- "bootdelay=3\0" \
- "ethact=" CONFIG_ETHPRIME "\0" \
- "hostname=" CONFIG_HOSTNAME "\0" \
- BOOTENV
+#define CONFIG_EXTRA_ENV_SETTINGS BOOTENV
#endif /* __KONTRON_MX6UL_CONFIG_H */
diff --git a/include/configs/kontron-sl-mx8mm.h b/include/configs/kontron-sl-mx8mm.h
index 622ab59762..a2aedefcec 100644
--- a/include/configs/kontron-sl-mx8mm.h
+++ b/include/configs/kontron-sl-mx8mm.h
@@ -50,20 +50,6 @@
#define CONFIG_MALLOC_F_ADDR 0x930000
#endif
-#define ENV_MEM_LAYOUT_SETTINGS \
- "loadaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
- "kernel_addr_r=0x42000000\0" \
- "fdt_addr_r=0x48000000\0" \
- "fdtoverlay_addr_r=0x49000000\0" \
- "ramdisk_addr_r=0x48080000\0" \
- "scriptaddr=0x40000000\0"\
- "pxefile_addr_r=0x40100000\0"
-
-#define CONFIG_EXTRA_ENV_SETTINGS \
- "dfu_alt_info=sf 0:0=flash-bin raw 0x400 0x1f0000\0" \
- "bootdelay=3\0" \
- "hostname=" CONFIG_HOSTNAME "\0" \
- ENV_MEM_LAYOUT_SETTINGS \
- BOOTENV
+#define CONFIG_EXTRA_ENV_SETTINGS BOOTENV
#endif /* __KONTRON_MX8MM_CONFIG_H */
diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h
index 2007b48868..26e6de2d2c 100644
--- a/include/configs/nitrogen6x.h
+++ b/include/configs/nitrogen6x.h
@@ -76,7 +76,7 @@
"fdt_high=0xffffffff\0" \
"initrd_high=0xffffffff\0" \
"fdt_addr_r=0x18000000\0" \
- "fdtfile=" __stringify(CONFIG_DEFAULT_DEVICE_TREE) ".dtb\0" \
+ "fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
"kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
"pxefile_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
"scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
diff --git a/include/configs/qemu-arm.h b/include/configs/qemu-arm.h
index dd2faebbbb..535762ecb2 100644
--- a/include/configs/qemu-arm.h
+++ b/include/configs/qemu-arm.h
@@ -21,6 +21,17 @@
EFI_GUID(0x058b7d83, 0x50d5, 0x4c47, 0xa1, 0x95, \
0x60, 0xd8, 0x6a, 0xd3, 0x41, 0xc4)
+/* Try files from QEMU's -kernel/-initrd, through the QEMU firmware device. */
+#define BOOTENV_DEV_QFW(devtypeu, devtypel, instance) \
+ "bootcmd_qfw= " \
+ "if qfw load $kernel_addr_r $ramdisk_addr_r; then " \
+ " booti $kernel_addr_r $ramdisk_addr_r:$filesize $fdtcontroladdr; " \
+ " if test $? -eq 1; then " \
+ " bootz $kernel_addr_r $ramdisk_addr_r:$filesize $fdtcontroladdr; " \
+ " fi ; " \
+ "fi\0"
+#define BOOTENV_DEV_NAME_QFW(devtypeu, devtypel, instance) "qfw "
+
/* For timer, QEMU emulates an ARMv7/ARMv8 architected timer */
/* Environment options */
@@ -56,6 +67,7 @@
#endif
#define BOOT_TARGET_DEVICES(func) \
+ func(QFW, qfw, na) \
BOOT_TARGET_USB(func) \
BOOT_TARGET_SCSI(func) \
BOOT_TARGET_VIRTIO(func) \
diff --git a/include/configs/tbs2910.h b/include/configs/tbs2910.h
index c93df00d58..7f197851d0 100644
--- a/include/configs/tbs2910.h
+++ b/include/configs/tbs2910.h
@@ -61,10 +61,6 @@
"pxefile_addr_r=0x10100000\0" \
"ramdisk_addr_r=0x18080000\0" \
"scriptaddr=0x10000000\0" \
- "set_con_serial=setenv stdout serial; " \
- "setenv stderr serial\0" \
- "set_con_hdmi=setenv stdout serial,vidconsole; " \
- "setenv stderr serial,vidconsole\0" \
"stderr=serial,vidconsole\0" \
"stdin=serial,usbkbd\0" \
"stdout=serial,vidconsole\0"
diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h
index 4d20b86591..1de00234f0 100644
--- a/include/configs/verdin-imx8mm.h
+++ b/include/configs/verdin-imx8mm.h
@@ -23,7 +23,7 @@
"fdt_addr_r=0x50200000\0" \
"kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
"kernel_comp_addr_r=0x40200000\0" \
- "kernel_comp_size=0x08080000\0" \
+ "kernel_comp_size=0x08000000\0" \
"ramdisk_addr_r=0x50300000\0" \
"scriptaddr=0x50280000\0"
@@ -67,9 +67,6 @@
#define PHYS_SDRAM 0x40000000
#define PHYS_SDRAM_SIZE SZ_2G /* 2GB DDR */
-/* ENET */
-#define CONFIG_FEC_MXC_PHYADDR 7
-
/* USB Configs */
#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
diff --git a/include/configs/verdin-imx8mp.h b/include/configs/verdin-imx8mp.h
index 9b8db223bb..ce72798514 100644
--- a/include/configs/verdin-imx8mp.h
+++ b/include/configs/verdin-imx8mp.h
@@ -25,19 +25,11 @@
#define CONFIG_SYS_I2C
#endif /* CONFIG_SPL_BUILD */
-/* ENET Config */
-/* ENET1 */
-#if defined(CONFIG_CMD_NET)
-#define CONFIG_FEC_MXC_PHYADDR 7
-
-#define PHY_ANEG_TIMEOUT 20000
-#endif /* CONFIG_CMD_NET */
-
#define MEM_LAYOUT_ENV_SETTINGS \
"fdt_addr_r=0x50200000\0" \
"kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
"kernel_comp_addr_r=0x40200000\0" \
- "kernel_comp_size=0x08080000\0" \
+ "kernel_comp_size=0x08000000\0" \
"ramdisk_addr_r=0x50300000\0" \
"scriptaddr=0x50280000\0"
diff --git a/include/dt-bindings/clock/imx6sl-clock.h b/include/dt-bindings/clock/imx6sl-clock.h
index e14573e293..31364d2caa 100644
--- a/include/dt-bindings/clock/imx6sl-clock.h
+++ b/include/dt-bindings/clock/imx6sl-clock.h
@@ -1,10 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright 2013 Freescale Semiconductor, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
*/
#ifndef __DT_BINDINGS_CLOCK_IMX6SL_H
@@ -175,6 +171,8 @@
#define IMX6SL_CLK_SSI2_IPG 162
#define IMX6SL_CLK_SSI3_IPG 163
#define IMX6SL_CLK_SPDIF_GCLK 164
-#define IMX6SL_CLK_END 165
+#define IMX6SL_CLK_MMDC_P0_IPG 165
+#define IMX6SL_CLK_MMDC_P1_IPG 166
+#define IMX6SL_CLK_END 167
#endif /* __DT_BINDINGS_CLOCK_IMX6SL_H */
diff --git a/include/dt-bindings/clock/imx6sll-clock.h b/include/dt-bindings/clock/imx6sll-clock.h
index 39c25671d6..494fd0c37f 100644
--- a/include/dt-bindings/clock/imx6sll-clock.h
+++ b/include/dt-bindings/clock/imx6sll-clock.h
@@ -1,9 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) 2016 Freescale Semiconductor, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
+ * Copyright 2017-2018 NXP.
*
*/
@@ -199,6 +197,14 @@
#define IMX6SLL_CLK_EXTERN_AUDIO_PODF 171
#define IMX6SLL_CLK_EXTERN_AUDIO 172
-#define IMX6SLL_CLK_END 173
+#define IMX6SLL_CLK_GPIO1 173
+#define IMX6SLL_CLK_GPIO2 174
+#define IMX6SLL_CLK_GPIO3 175
+#define IMX6SLL_CLK_GPIO4 176
+#define IMX6SLL_CLK_GPIO5 177
+#define IMX6SLL_CLK_GPIO6 178
+#define IMX6SLL_CLK_MMDC_P1_IPG 179
+
+#define IMX6SLL_CLK_END 180
#endif /* __DT_BINDINGS_CLOCK_IMX6SLL_H */
diff --git a/include/dt-bindings/clock/imx7ulp-clock.h b/include/dt-bindings/clock/imx7ulp-clock.h
index 0a955df4ad..b58370d146 100644
--- a/include/dt-bindings/clock/imx7ulp-clock.h
+++ b/include/dt-bindings/clock/imx7ulp-clock.h
@@ -1,21 +1,19 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2016 Freescale Semiconductor, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
+ * Copyright 2017~2018 NXP
*
*/
#ifndef __DT_BINDINGS_CLOCK_IMX7ULP_H
#define __DT_BINDINGS_CLOCK_IMX7ULP_H
+/* SCG1 */
+
#define IMX7ULP_CLK_DUMMY 0
-#define IMX7ULP_CLK_CKIL 1
-#define IMX7ULP_CLK_OSC 2
+#define IMX7ULP_CLK_ROSC 1
+#define IMX7ULP_CLK_SOSC 2
#define IMX7ULP_CLK_FIRC 3
-
-/* SCG1 */
#define IMX7ULP_CLK_SPLL_PRE_SEL 4
#define IMX7ULP_CLK_SPLL_PRE_DIV 5
#define IMX7ULP_CLK_SPLL 6
@@ -51,111 +49,71 @@
#define IMX7ULP_CLK_NIC1_DIV 36
#define IMX7ULP_CLK_NIC1_BUS_DIV 37
#define IMX7ULP_CLK_NIC1_EXT_DIV 38
+/* IMX7ULP_CLK_MIPI_PLL is unsupported and shouldn't be used in DT */
+#define IMX7ULP_CLK_MIPI_PLL 39
+#define IMX7ULP_CLK_SIRC 40
+#define IMX7ULP_CLK_SOSC_BUS_CLK 41
+#define IMX7ULP_CLK_FIRC_BUS_CLK 42
+#define IMX7ULP_CLK_SPLL_BUS_CLK 43
+#define IMX7ULP_CLK_HSRUN_SYS_SEL 44
+#define IMX7ULP_CLK_HSRUN_CORE_DIV 45
-/* PCG2 */
-#define IMX7ULP_CLK_DMA1 39
-#define IMX7ULP_CLK_RGPIO2P1 40
-#define IMX7ULP_CLK_FLEXBUS 41
-#define IMX7ULP_CLK_SEMA42_1 42
-#define IMX7ULP_CLK_DMA_MUX1 43
-#define IMX7ULP_CLK_SNVS 44
-#define IMX7ULP_CLK_CAAM 45
-#define IMX7ULP_CLK_LPTPM4 46
-#define IMX7ULP_CLK_LPTPM5 47
-#define IMX7ULP_CLK_LPIT1 48
-#define IMX7ULP_CLK_LPSPI2 49
-#define IMX7ULP_CLK_LPSPI3 50
-#define IMX7ULP_CLK_LPI2C4 51
-#define IMX7ULP_CLK_LPI2C5 52
-#define IMX7ULP_CLK_LPUART4 53
-#define IMX7ULP_CLK_LPUART5 54
-#define IMX7ULP_CLK_FLEXIO1 55
-#define IMX7ULP_CLK_USB0 56
-#define IMX7ULP_CLK_USB1 57
-#define IMX7ULP_CLK_USB_PHY 58
-#define IMX7ULP_CLK_USB_PL301 59
-#define IMX7ULP_CLK_USDHC0 60
-#define IMX7ULP_CLK_USDHC1 61
-#define IMX7ULP_CLK_WDG1 62
-#define IMX7ULP_CLK_WDG2 63
-
-/* PCG3 */
-#define IMX7ULP_CLK_LPTPM6 64
-#define IMX7ULP_CLK_LPTPM7 65
-#define IMX7ULP_CLK_LPI2C6 66
-#define IMX7ULP_CLK_LPI2C7 67
-#define IMX7ULP_CLK_LPUART6 68
-#define IMX7ULP_CLK_LPUART7 69
-#define IMX7ULP_CLK_VIU 70
-#define IMX7ULP_CLK_DSI 71
-#define IMX7ULP_CLK_LCDIF 72
-#define IMX7ULP_CLK_MMDC 73
-#define IMX7ULP_CLK_PCTLC 74
-#define IMX7ULP_CLK_PCTLD 75
-#define IMX7ULP_CLK_PCTLE 76
-#define IMX7ULP_CLK_PCTLF 77
-#define IMX7ULP_CLK_GPU3D 78
-#define IMX7ULP_CLK_GPU2D 79
-
-#define IMX7ULP_CLK_MIPI_PLL 80
-#define IMX7ULP_CLK_SIRC 81
+#define IMX7ULP_CLK_CORE 46
+#define IMX7ULP_CLK_HSRUN_CORE 47
-#define IMX7ULP_CLK_SCG1_CLKOUT 82
+#define IMX7ULP_CLK_SCG1_END 48
-#define IMX7ULP_CLK_END 83
+/* PCC2 */
+#define IMX7ULP_CLK_DMA1 0
+#define IMX7ULP_CLK_RGPIO2P1 1
+#define IMX7ULP_CLK_FLEXBUS 2
+#define IMX7ULP_CLK_SEMA42_1 3
+#define IMX7ULP_CLK_DMA_MUX1 4
+#define IMX7ULP_CLK_CAAM 6
+#define IMX7ULP_CLK_LPTPM4 7
+#define IMX7ULP_CLK_LPTPM5 8
+#define IMX7ULP_CLK_LPIT1 9
+#define IMX7ULP_CLK_LPSPI2 10
+#define IMX7ULP_CLK_LPSPI3 11
+#define IMX7ULP_CLK_LPI2C4 12
+#define IMX7ULP_CLK_LPI2C5 13
+#define IMX7ULP_CLK_LPUART4 14
+#define IMX7ULP_CLK_LPUART5 15
+#define IMX7ULP_CLK_FLEXIO1 16
+#define IMX7ULP_CLK_USB0 17
+#define IMX7ULP_CLK_USB1 18
+#define IMX7ULP_CLK_USB_PHY 19
+#define IMX7ULP_CLK_USB_PL301 20
+#define IMX7ULP_CLK_USDHC0 21
+#define IMX7ULP_CLK_USDHC1 22
+#define IMX7ULP_CLK_WDG1 23
+#define IMX7ULP_CLK_WDG2 24
-/*cm4 clocks*/
-#define IMX7ULP_CM4_CLK_DUMMY 0
-#define IMX7ULP_CM4_CLK_CKIL 1
-#define IMX7ULP_CM4_CLK_OSC 2
-#define IMX7ULP_CM4_CLK_FIRC 3
-#define IMX7ULP_CM4_CLK_SIRC 4
+#define IMX7ULP_CLK_PCC2_END 25
-/* SCG0 */
-#define IMX7ULP_CM4_CLK_SPLL_VCO_PRE_SEL 5
-#define IMX7ULP_CM4_CLK_SPLL_VCO_PRE_DIV 6
-#define IMX7ULP_CM4_CLK_SPLL 7
-#define IMX7ULP_CM4_CLK_SPLL_VCO 8
-#define IMX7ULP_CM4_CLK_SPLL_VCO_POST_DIV1 9
-#define IMX7ULP_CM4_CLK_SPLL_VCO_POST_DIV2 10
-#define IMX7ULP_CM4_CLK_SPLL_PFD0 11
-#define IMX7ULP_CM4_CLK_SPLL_PFD1 12
-#define IMX7ULP_CM4_CLK_SPLL_PFD2 13
-#define IMX7ULP_CM4_CLK_SPLL_PFD3 14
-#define IMX7ULP_CM4_CLK_SPLL_PFD_SEL 15
-#define IMX7ULP_CM4_CLK_SPLL_PFD 16
-#define IMX7ULP_CM4_CLK_SPLL_SEL 17
-#define IMX7ULP_CM4_CLK_APLL_VCO_PRE_SEL 18
-#define IMX7ULP_CM4_CLK_APLL_VCO_PRE_DIV 19
-#define IMX7ULP_CM4_CLK_APLL 20
-#define IMX7ULP_CM4_CLK_APLL_VCO 21
-#define IMX7ULP_CM4_CLK_APLL_VCO_POST_DIV1 22
-#define IMX7ULP_CM4_CLK_APLL_VCO_POST_DIV2 23
-#define IMX7ULP_CM4_CLK_APLL_PFD0 24
-#define IMX7ULP_CM4_CLK_APLL_PFD1 25
-#define IMX7ULP_CM4_CLK_APLL_PFD2 26
-#define IMX7ULP_CM4_CLK_APLL_PFD3 27
-#define IMX7ULP_CM4_CLK_APLL_PFD_SEL 28
-#define IMX7ULP_CM4_CLK_APLL_PFD 29
-#define IMX7ULP_CM4_CLK_APLL_SEL 30
-#define IMX7ULP_CM4_CLK_APLL_PFD0_PRE_DIV 31
-#define IMX7ULP_CM4_CLK_SYS_SEL 32
-#define IMX7ULP_CM4_CLK_CORE_DIV 33
-#define IMX7ULP_CM4_CLK_BUS_DIV 34
-#define IMX7ULP_CM4_CLK_PLAT_DIV 35
-#define IMX7ULP_CM4_CLK_SLOW_DIV 36
+/* PCC3 */
+#define IMX7ULP_CLK_LPTPM6 0
+#define IMX7ULP_CLK_LPTPM7 1
+#define IMX7ULP_CLK_LPI2C6 2
+#define IMX7ULP_CLK_LPI2C7 3
+#define IMX7ULP_CLK_LPUART6 4
+#define IMX7ULP_CLK_LPUART7 5
+#define IMX7ULP_CLK_VIU 6
+#define IMX7ULP_CLK_DSI 7
+#define IMX7ULP_CLK_LCDIF 8
+#define IMX7ULP_CLK_MMDC 9
+#define IMX7ULP_CLK_PCTLC 10
+#define IMX7ULP_CLK_PCTLD 11
+#define IMX7ULP_CLK_PCTLE 12
+#define IMX7ULP_CLK_PCTLF 13
+#define IMX7ULP_CLK_GPU3D 14
+#define IMX7ULP_CLK_GPU2D 15
-#define IMX7ULP_CM4_CLK_SAI0_SEL 37
-#define IMX7ULP_CM4_CLK_SAI0_DIV 38
-#define IMX7ULP_CM4_CLK_SAI0_ROOT 39
-#define IMX7ULP_CM4_CLK_SAI0_IPG 40
-#define IMX7ULP_CM4_CLK_SAI1_SEL 41
-#define IMX7ULP_CM4_CLK_SAI1_DIV 42
-#define IMX7ULP_CM4_CLK_SAI1_ROOT 43
-#define IMX7ULP_CM4_CLK_SAI1_IPG 44
+#define IMX7ULP_CLK_PCC3_END 16
-#define IMX7ULP_CLK_SCG0_CLKOUT 45
+/* SMC1 */
+#define IMX7ULP_CLK_ARM 0
-#define IMX7ULP_CM4_CLK_END 46
+#define IMX7ULP_CLK_SMC1_END 1
#endif /* __DT_BINDINGS_CLOCK_IMX7ULP_H */
diff --git a/include/fsl_csu.h b/include/fsl_csu.h
index 0e59ac3c32..40c2968797 100644
--- a/include/fsl_csu.h
+++ b/include/fsl_csu.h
@@ -24,8 +24,8 @@ enum csu_cslx_access {
};
struct csu_ns_dev {
- unsigned long ind;
- uint32_t val;
+ u8 ind;
+ u8 val;
};
void enable_layerscape_ns_access(void);
diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
index 638d807ee5..30f15452aa 100644
--- a/include/linux/mtd/spi-nor.h
+++ b/include/linux/mtd/spi-nor.h
@@ -494,6 +494,10 @@ struct spi_flash {
* @rdsr_dummy dummy cycles needed for Read Status Register command.
* @rdsr_addr_nbytes: dummy address bytes needed for Read Status Register
* command.
+ * @addr_mode_nbytes: number of address bytes of current address mode. Useful
+ * when the flash operates with 4B opcodes but needs the
+ * internal address mode for opcodes that don't have a 4B
+ * opcode correspondent.
* @bank_read_cmd: Bank read cmd
* @bank_write_cmd: Bank write cmd
* @bank_curr: Current flash bank
@@ -540,6 +544,7 @@ struct spi_nor {
u8 program_opcode;
u8 rdsr_dummy;
u8 rdsr_addr_nbytes;
+ u8 addr_mode_nbytes;
#ifdef CONFIG_SPI_FLASH_BAR
u8 bank_read_cmd;
u8 bank_write_cmd;
diff --git a/include/net.h b/include/net.h
index c06b577808..32364ed0ce 100644
--- a/include/net.h
+++ b/include/net.h
@@ -560,7 +560,7 @@ extern int net_restart_wrap; /* Tried all network devices */
enum proto_t {
BOOTP, RARP, ARP, TFTPGET, DHCP, PING, DNS, NFS, CDP, NETCONS, SNTP,
- TFTPSRV, TFTPPUT, LINKLOCAL, FASTBOOT, WOL, UDP
+ TFTPSRV, TFTPPUT, LINKLOCAL, FASTBOOT, WOL, UDP, NCSI
};
extern char net_boot_file_name[1024];/* Boot File name */
diff --git a/include/phy.h b/include/phy.h
index ad2096ca84..0737c4e8f9 100644
--- a/include/phy.h
+++ b/include/phy.h
@@ -412,6 +412,8 @@ static inline bool phy_interface_is_sgmii(struct phy_device *phydev)
phydev->interface <= PHY_INTERFACE_MODE_QSGMII;
}
+bool phy_interface_is_ncsi(void);
+
/* PHY UIDs for various PHYs that are referenced in external code */
#define PHY_UID_CS4340 0x13e51002
#define PHY_UID_CS4223 0x03e57003
diff --git a/include/sdhci.h b/include/sdhci.h
index 88f1917480..24b4599b85 100644
--- a/include/sdhci.h
+++ b/include/sdhci.h
@@ -247,6 +247,7 @@
#define SDHCI_QUIRK_WAIT_SEND_CMD (1 << 6)
#define SDHCI_QUIRK_USE_WIDE8 (1 << 8)
#define SDHCI_QUIRK_NO_1_8_V (1 << 9)
+#define SDHCI_QUIRK_SUPPORT_SINGLE (1 << 10)
/* to make gcc happy */
struct sdhci_host;