diff options
Diffstat (limited to 'include')
64 files changed, 757 insertions, 116 deletions
diff --git a/include/blk.h b/include/blk.h index d3ab9a10b9..e854166edb 100644 --- a/include/blk.h +++ b/include/blk.h @@ -274,6 +274,43 @@ unsigned long blk_derase(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt); /** + * blk_read() - Read from a block device + * + * @dev: Device to read from + * @start: Start block for the read + * @blkcnt: Number of blocks to read + * @buf: Place to put the data + * @return number of blocks read (which may be less than @blkcnt), + * or -ve on error. This never returns 0 unless @blkcnt is 0 + */ +long blk_read(struct udevice *dev, lbaint_t start, lbaint_t blkcnt, + void *buffer); + +/** + * blk_write() - Write to a block device + * + * @dev: Device to write to + * @start: Start block for the write + * @blkcnt: Number of blocks to write + * @buf: Data to write + * @return number of blocks written (which may be less than @blkcnt), + * or -ve on error. This never returns 0 unless @blkcnt is 0 + */ +long blk_write(struct udevice *dev, lbaint_t start, lbaint_t blkcnt, + const void *buffer); + +/** + * blk_erase() - Erase part of a block device + * + * @dev: Device to erase + * @start: Start block for the erase + * @blkcnt: Number of blocks to erase + * @return number of blocks erased (which may be less than @blkcnt), + * or -ve on error. This never returns 0 unless @blkcnt is 0 + */ +long blk_erase(struct udevice *dev, lbaint_t start, lbaint_t blkcnt); + +/** * blk_find_device() - Find a block device * * This function does not activate the device. The device will be returned @@ -428,7 +465,7 @@ const char *blk_get_devtype(struct udevice *dev); /** * blk_get_by_device() - Get the block device descriptor for the given device - * @dev: Instance of a storage device + * @dev: Instance of a storage device (the parent of the block device) * * Return: With block device descriptor on success , NULL if there is no such * block device. diff --git a/include/bloblist.h b/include/bloblist.h index 9684bfd5f4..2a2f1700eb 100644 --- a/include/bloblist.h +++ b/include/bloblist.h @@ -112,6 +112,7 @@ enum bloblist_tag_t { */ BLOBLISTT_PROJECT_AREA = 0x8000, BLOBLISTT_U_BOOT_SPL_HANDOFF = 0x8000, /* Hand-off info from SPL */ + BLOBLISTT_VBE = 0x8001, /* VBE per-phase state */ /* * Vendor-specific tags are permitted here. Projects can be open source diff --git a/include/bootflow.h b/include/bootflow.h index 6aa3d1fff8..32dbbbbe26 100644 --- a/include/bootflow.h +++ b/include/bootflow.h @@ -145,6 +145,18 @@ struct bootflow_iter { }; /** + * bootflow_init() - Set up a bootflow struct + * + * The bootflow is zeroed and set to state BOOTFLOWST_BASE + * + * @bflow: Struct to set up + * @bootdev: Bootdev to use + * @meth: Bootmeth to use + */ +void bootflow_init(struct bootflow *bflow, struct udevice *bootdev, + struct udevice *meth); + +/** * bootflow_iter_init() - Reset a bootflow iterator * * This sets everything to the starting point, ready for use. diff --git a/include/bootstage.h b/include/bootstage.h index 7088d0b875..685939ccff 100644 --- a/include/bootstage.h +++ b/include/bootstage.h @@ -166,6 +166,8 @@ enum bootstage_id { BOOTSTAGE_ID_NAND_FIT_READ_OK, BOOTSTAGE_ID_FIT_LOADABLE_START = 160, /* for Loadable Images */ + + BOOTSTAGE_ID_FIT_SPL_START = 170, /* for SPL Images */ /* * These boot stages are new, higher level, and not directly related * to the old boot progress numbers. They are useful for recording diff --git a/include/configs/MCR3000.h b/include/configs/MCR3000.h index 9d0683829e..1826a6fece 100644 --- a/include/configs/MCR3000.h +++ b/include/configs/MCR3000.h @@ -68,7 +68,7 @@ #define CONFIG_SYS_SDRAM_BASE 0x00000000 /* FLASH organization */ -#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_FLASH_BASE CONFIG_TEXT_BASE /* * For booting Linux, the board info and command line data diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index c2f4f2bee2..edf9b34f61 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -256,15 +256,15 @@ "netdev=" CONFIG_NETDEV "\0" \ "uboot=" CONFIG_UBOOTPATH "\0" \ "tftpflash=tftp $loadaddr $uboot;" \ - "protect off " __stringify(CONFIG_SYS_TEXT_BASE) \ + "protect off " __stringify(CONFIG_TEXT_BASE) \ " +$filesize; " \ - "erase " __stringify(CONFIG_SYS_TEXT_BASE) \ + "erase " __stringify(CONFIG_TEXT_BASE) \ " +$filesize; " \ - "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE) \ + "cp.b $loadaddr " __stringify(CONFIG_TEXT_BASE) \ " $filesize; " \ - "protect on " __stringify(CONFIG_SYS_TEXT_BASE) \ + "protect on " __stringify(CONFIG_TEXT_BASE) \ " +$filesize; " \ - "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE) \ + "cmp.b $loadaddr " __stringify(CONFIG_TEXT_BASE) \ " $filesize\0" \ "fdtaddr=780000\0" \ "fdtfile=" CONFIG_FDTFILE "\0" \ diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index eb7a835179..095193153a 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -367,15 +367,15 @@ "netdev=eth0\0" \ "uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \ "tftpflash=tftpboot $loadaddr $uboot; " \ - "protect off " __stringify(CONFIG_SYS_TEXT_BASE) \ + "protect off " __stringify(CONFIG_TEXT_BASE) \ " +$filesize; " \ - "erase " __stringify(CONFIG_SYS_TEXT_BASE) \ + "erase " __stringify(CONFIG_TEXT_BASE) \ " +$filesize; " \ - "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE) \ + "cp.b $loadaddr " __stringify(CONFIG_TEXT_BASE) \ " $filesize; " \ - "protect on " __stringify(CONFIG_SYS_TEXT_BASE) \ + "protect on " __stringify(CONFIG_TEXT_BASE) \ " +$filesize; " \ - "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE) \ + "cmp.b $loadaddr " __stringify(CONFIG_TEXT_BASE) \ " $filesize\0" \ "consoledev=ttyS1\0" \ "ramdiskaddr=2000000\0" \ diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 925720d234..0ac7f161bc 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -12,13 +12,13 @@ #define __CONFIG_H #ifdef CONFIG_RAMBOOT_PBL -#define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE +#define CONFIG_RAMBOOT_TEXT_BASE CONFIG_TEXT_BASE #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc #endif #ifdef CONFIG_SRIO_PCIE_BOOT_SLAVE /* Set 1M boot space */ -#define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR (CONFIG_SYS_TEXT_BASE & 0xfff00000) +#define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR (CONFIG_TEXT_BASE & 0xfff00000) #define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS \ (0x300000000ull | CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR) #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc @@ -347,7 +347,7 @@ "bank_intlv=cs0_cs1\0" \ "netdev=eth0\0" \ "uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \ - "ubootaddr=" __stringify(CONFIG_SYS_TEXT_BASE) "\0" \ + "ubootaddr=" __stringify(CONFIG_TEXT_BASE) "\0" \ "tftpflash=tftpboot $loadaddr $uboot && " \ "protect off $ubootaddr +$filesize && " \ "erase $ubootaddr +$filesize && " \ diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index e0aa2b9598..14f0ce60e2 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -86,7 +86,7 @@ #define CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR_PHYS \ (0x300000000ull | CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR) /* Set 1M boot space for PCIe boot */ -#define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR (CONFIG_SYS_TEXT_BASE & 0xfff00000) +#define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR (CONFIG_TEXT_BASE & 0xfff00000) #define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS \ (0x300000000ull | CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR) #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc @@ -469,7 +469,7 @@ "hwconfig=fsl_ddr:ctlr_intlv=cacheline," \ "usb1:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) "\0" \ "uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \ - "ubootaddr=" __stringify(CONFIG_SYS_TEXT_BASE) "\0" \ + "ubootaddr=" __stringify(CONFIG_TEXT_BASE) "\0" \ "bootargs=root=/dev/ram rw console=ttyS0,115200\0" \ "netdev=eth0\0" \ "tftpflash=tftpboot $loadaddr $uboot && " \ diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 918aabcbb5..fad9594cb7 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -465,7 +465,7 @@ "usb2:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) "\0"\ "netdev=eth0\0" \ "uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \ - "ubootaddr=" __stringify(CONFIG_SYS_TEXT_BASE) "\0" \ + "ubootaddr=" __stringify(CONFIG_TEXT_BASE) "\0" \ "tftpflash=tftpboot $loadaddr $uboot && " \ "protect off $ubootaddr +$filesize && " \ "erase $ubootaddr +$filesize && " \ diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index e852fc4cdc..285e5fcd2d 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -55,7 +55,7 @@ #define CONFIG_SRIO_PCIE_BOOT_MASTER #ifdef CONFIG_SRIO_PCIE_BOOT_SLAVE /* Set 1M boot space */ -#define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR (CONFIG_SYS_TEXT_BASE & 0xfff00000) +#define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR (CONFIG_TEXT_BASE & 0xfff00000) #define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS \ (0x300000000ull | CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR) #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc @@ -466,7 +466,7 @@ "usb1:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) "\0"\ "netdev=eth0\0" \ "uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \ - "ubootaddr=" __stringify(CONFIG_SYS_TEXT_BASE) "\0" \ + "ubootaddr=" __stringify(CONFIG_TEXT_BASE) "\0" \ "tftpflash=tftpboot $loadaddr $uboot && " \ "protect off $ubootaddr +$filesize && " \ "erase $ubootaddr +$filesize && " \ diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 68cf13581a..7fe499bb80 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -50,7 +50,7 @@ #define CONFIG_SRIO_PCIE_BOOT_MASTER #ifdef CONFIG_SRIO_PCIE_BOOT_SLAVE /* Set 1M boot space */ -#define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR (CONFIG_SYS_TEXT_BASE & 0xfff00000) +#define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR (CONFIG_TEXT_BASE & 0xfff00000) #define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS \ (0x300000000ull | CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR) #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc @@ -421,7 +421,7 @@ "usb1:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) "\0"\ "netdev=eth0\0" \ "uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \ - "ubootaddr=" __stringify(CONFIG_SYS_TEXT_BASE) "\0" \ + "ubootaddr=" __stringify(CONFIG_TEXT_BASE) "\0" \ "tftpflash=tftpboot $loadaddr $uboot && " \ "protect off $ubootaddr +$filesize && " \ "erase $ubootaddr +$filesize && " \ diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index bba82f1e0c..0dde24eff6 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -16,7 +16,7 @@ #ifdef CONFIG_RAMBOOT_PBL #ifndef CONFIG_SDCARD -#define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE +#define CONFIG_RAMBOOT_TEXT_BASE CONFIG_TEXT_BASE #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc #else #define RESET_VECTOR_OFFSET 0x27FFC @@ -419,7 +419,7 @@ "usb1:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) "\0"\ "netdev=eth0\0" \ "uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \ - "ubootaddr=" __stringify(CONFIG_SYS_TEXT_BASE) "\0" \ + "ubootaddr=" __stringify(CONFIG_TEXT_BASE) "\0" \ "tftpflash=tftpboot $loadaddr $uboot && " \ "protect off $ubootaddr +$filesize && " \ "erase $ubootaddr +$filesize && " \ diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h index 2dc6bd2f2c..9cfae04218 100644 --- a/include/configs/am3517_evm.h +++ b/include/configs/am3517_evm.h @@ -27,7 +27,7 @@ #define CONFIG_SYS_NAND_ECCBYTES 13 #define CONFIG_SYS_NAND_MAX_OOBFREE 2 #define CONFIG_SYS_NAND_MAX_ECCPOS 56 -#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE /* NAND block size is 128 KiB. Synchronize these values with * corresponding Device Tree entries in Linux: * MLO(SPL) 4 * NAND_BLOCK_SIZE = 512 KiB @ 0x000000 diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h index ef9335c523..ca5815fe36 100644 --- a/include/configs/at91sam9260ek.h +++ b/include/configs/at91sam9260ek.h @@ -17,7 +17,7 @@ #include <asm/hardware.h> /* - * Warning: changing CONFIG_SYS_TEXT_BASE requires + * Warning: changing CONFIG_TEXT_BASE requires * adapting the initial boot program. * Since the linker has to swallow that define, we must use a pure * hex number here! diff --git a/include/configs/baltos.h b/include/configs/baltos.h index 266b2ae04b..f4161d7a6d 100644 --- a/include/configs/baltos.h +++ b/include/configs/baltos.h @@ -205,7 +205,7 @@ #define CONFIG_SYS_NAND_ECCSIZE 512 #define CONFIG_SYS_NAND_ECCBYTES 14 -#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE #endif #endif diff --git a/include/configs/bcmstb.h b/include/configs/bcmstb.h index 134a3ec289..5aa720da3d 100644 --- a/include/configs/bcmstb.h +++ b/include/configs/bcmstb.h @@ -65,7 +65,7 @@ extern phys_addr_t prior_stage_fdt_address; * : [~500 KiB in size, stripped] * 0xc000 0000 Top of RAM * - * Setting gd->relocaddr to CONFIG_SYS_TEXT_BASE in dram_init_banksize + * Setting gd->relocaddr to CONFIG_TEXT_BASE in dram_init_banksize * prevents U-Boot from relocating itself when it is run as an ELF * program by the prior stage bootloader. * diff --git a/include/configs/cobra5272.h b/include/configs/cobra5272.h index ba0662f1f4..898ca968c9 100644 --- a/include/configs/cobra5272.h +++ b/include/configs/cobra5272.h @@ -65,7 +65,7 @@ * * Setting #if 0: u-boot will start from flash and relocate itself to RAM * - * Please do not forget to modify the setting of CONFIG_SYS_TEXT_BASE + * Please do not forget to modify the setting of CONFIG_TEXT_BASE * in board/cobra5272/config.mk accordingly (#if 0: 0xffe00000; #if 1: 0x20000) * * --- diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h new file mode 100644 index 0000000000..434da31444 --- /dev/null +++ b/include/configs/corenet_ds.h @@ -0,0 +1,365 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2009-2012 Freescale Semiconductor, Inc. + * Copyright 2020-2021 NXP + */ + +/* + * Corenet DS style board configuration file + */ +#ifndef __CONFIG_H +#define __CONFIG_H + +#include <linux/stringify.h> + +#include "../board/freescale/common/ics307_clk.h" + +#ifdef CONFIG_RAMBOOT_PBL +#define CONFIG_RAMBOOT_TEXT_BASE CONFIG_TEXT_BASE +#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc +#endif + +#ifdef CONFIG_SRIO_PCIE_BOOT_SLAVE +/* Set 1M boot space */ +#define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR (CONFIG_TEXT_BASE & 0xfff00000) +#define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS \ + (0x300000000ull | CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR) +#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc +#endif + +/* High Level Configuration Options */ + +#ifndef CONFIG_RESET_VECTOR_ADDRESS +#define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc +#endif + +#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS + +/* + * These can be toggled for performance analysis, otherwise use default. + */ +#define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E +#ifdef CONFIG_DDR_ECC +#define CONFIG_MEM_INIT_VALUE 0xdeadbeef +#endif + +#define CONFIG_POST CONFIG_SYS_POST_MEMORY /* test POST memory test */ + +/* + * Config the L3 Cache as L3 SRAM + */ +#define CONFIG_SYS_INIT_L3_ADDR CONFIG_RAMBOOT_TEXT_BASE +#ifdef CONFIG_PHYS_64BIT +#define CONFIG_SYS_INIT_L3_ADDR_PHYS (0xf00000000ull | CONFIG_RAMBOOT_TEXT_BASE) +#else +#define CONFIG_SYS_INIT_L3_ADDR_PHYS CONFIG_SYS_INIT_L3_ADDR +#endif +#define CONFIG_SYS_L3_SIZE (1024 << 10) +#define CONFIG_SYS_INIT_L3_END (CONFIG_SYS_INIT_L3_ADDR + CONFIG_SYS_L3_SIZE) + +#ifdef CONFIG_PHYS_64BIT +#define CONFIG_SYS_DCSRBAR 0xf0000000 +#define CONFIG_SYS_DCSRBAR_PHYS 0xf00000000ull +#endif + +/* + * DDR Setup + */ +#define CONFIG_VERY_BIG_RAM +#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 +#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE + +#define SPD_EEPROM_ADDRESS1 0x51 +#define SPD_EEPROM_ADDRESS2 0x52 +#define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1 /* for p3041/p5010 */ +#define CONFIG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */ + +/* + * Local Bus Definitions + */ + +/* Set the local bus clock 1/8 of platform clock */ +#define CONFIG_SYS_LBC_LCRR LCRR_CLKDIV_8 + +#define CONFIG_SYS_FLASH_BASE 0xe0000000 /* Start of PromJet */ +#ifdef CONFIG_PHYS_64BIT +#define CONFIG_SYS_FLASH_BASE_PHYS 0xfe0000000ull +#else +#define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE +#endif + +#define PIXIS_BASE 0xffdf0000 /* PIXIS registers */ +#ifdef CONFIG_PHYS_64BIT +#define PIXIS_BASE_PHYS 0xfffdf0000ull +#else +#define PIXIS_BASE_PHYS PIXIS_BASE +#endif + +#define PIXIS_LBMAP_SWITCH 7 +#define PIXIS_LBMAP_MASK 0xf0 +#define PIXIS_LBMAP_SHIFT 4 +#define PIXIS_LBMAP_ALTBANK 0x40 + +#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ + +/* Nand Flash */ +#ifdef CONFIG_NAND_FSL_ELBC +#define CONFIG_SYS_NAND_BASE 0xffa00000 +#ifdef CONFIG_PHYS_64BIT +#define CONFIG_SYS_NAND_BASE_PHYS 0xfffa00000ull +#else +#define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE +#endif + +#define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND_BASE} +#define CONFIG_SYS_MAX_NAND_DEVICE 1 + +/* NAND flash config */ +#define CONFIG_SYS_NAND_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \ + | (2<<BR_DECC_SHIFT) /* Use HW ECC */ \ + | BR_PS_8 /* Port Size = 8 bit */ \ + | BR_MS_FCM /* MSEL = FCM */ \ + | BR_V) /* valid */ +#define CONFIG_SYS_NAND_OR_PRELIM (0xFFFC0000 /* length 256K */ \ + | OR_FCM_PGS /* Large Page*/ \ + | OR_FCM_CSCT \ + | OR_FCM_CST \ + | OR_FCM_CHT \ + | OR_FCM_SCY_1 \ + | OR_FCM_TRLX \ + | OR_FCM_EHTR) +#endif /* CONFIG_NAND_FSL_ELBC */ + +#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000, CONFIG_SYS_FLASH_BASE_PHYS} + +#define CONFIG_HWCONFIG + +/* define to use L1 as initial stack */ +#define CONFIG_L1_INIT_RAM +#define CONFIG_SYS_INIT_RAM_LOCK +#define CONFIG_SYS_INIT_RAM_ADDR 0xfdd00000 /* Initial L1 address */ +#ifdef CONFIG_PHYS_64BIT +#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0xf +#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW CONFIG_SYS_INIT_RAM_ADDR +/* The assembler doesn't like typecast */ +#define CONFIG_SYS_INIT_RAM_ADDR_PHYS \ + ((CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH * 1ull << 32) | \ + CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW) +#else +#define CONFIG_SYS_INIT_RAM_ADDR_PHYS CONFIG_SYS_INIT_RAM_ADDR /* Initial L1 address */ +#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0 +#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW CONFIG_SYS_INIT_RAM_ADDR_PHYS +#endif +#define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 /* Size of used area in RAM */ + +#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) + +#define CONFIG_SYS_MONITOR_LEN (768 * 1024) + +/* Serial Port - controlled on board with jumper J8 + * open - index 2 + * shorted - index 1 + */ +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE 1 +#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0)/2) + +#define CONFIG_SYS_BAUDRATE_TABLE \ + {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200} + +#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x11C500) +#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x11C600) +#define CONFIG_SYS_NS16550_COM3 (CONFIG_SYS_CCSRBAR+0x11D500) +#define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600) + +/* I2C */ + +/* + * RapidIO + */ +#define CONFIG_SYS_SRIO1_MEM_VIRT 0xa0000000 +#ifdef CONFIG_PHYS_64BIT +#define CONFIG_SYS_SRIO1_MEM_PHYS 0xc20000000ull +#else +#define CONFIG_SYS_SRIO1_MEM_PHYS 0xa0000000 +#endif +#define CONFIG_SYS_SRIO1_MEM_SIZE 0x10000000 /* 256M */ + +#define CONFIG_SYS_SRIO2_MEM_VIRT 0xb0000000 +#ifdef CONFIG_PHYS_64BIT +#define CONFIG_SYS_SRIO2_MEM_PHYS 0xc30000000ull +#else +#define CONFIG_SYS_SRIO2_MEM_PHYS 0xb0000000 +#endif +#define CONFIG_SYS_SRIO2_MEM_SIZE 0x10000000 /* 256M */ + +/* + * for slave u-boot IMAGE instored in master memory space, + * PHYS must be aligned based on the SIZE + */ +#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS 0xfef200000ull +#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS1 0xfff00000ull +#define CONFIG_SRIO_PCIE_BOOT_IMAGE_SIZE 0x100000 /* 1M */ +#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS2 0x3fff00000ull +/* + * for slave UCODE and ENV instored in master memory space, + * PHYS must be aligned based on the SIZE + */ +#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_PHYS 0xfef100000ull +#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_BUS 0x3ffe00000ull +#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_SIZE 0x40000 /* 256K */ + +/* slave core release by master*/ +#define CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET 0xe00e4 +#define CONFIG_SRIO_PCIE_BOOT_RELEASE_MASK 0x00000001 /* release core 0 */ + +/* + * SRIO_PCIE_BOOT - SLAVE + */ +#ifdef CONFIG_SRIO_PCIE_BOOT_SLAVE +#define CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR 0xFFE00000 +#define CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR_PHYS \ + (0x300000000ull | CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR) +#endif + +/* + * eSPI - Enhanced SPI + */ + +/* + * General PCI + * Memory space is mapped 1-1, but I/O space must start from 0. + */ + +/* controller 1, direct to uli, tgtid 3, Base address 20000 */ +#define CONFIG_SYS_PCIE1_MEM_VIRT 0x80000000 +#define CONFIG_SYS_PCIE1_MEM_PHYS 0xc00000000ull +#define CONFIG_SYS_PCIE1_IO_VIRT 0xf8000000 +#define CONFIG_SYS_PCIE1_IO_PHYS 0xff8000000ull + +/* controller 2, Slot 2, tgtid 2, Base address 201000 */ +#define CONFIG_SYS_PCIE2_MEM_VIRT 0xa0000000 +#define CONFIG_SYS_PCIE2_MEM_PHYS 0xc20000000ull +#define CONFIG_SYS_PCIE2_IO_VIRT 0xf8010000 +#define CONFIG_SYS_PCIE2_IO_PHYS 0xff8010000ull + +/* controller 3, Slot 1, tgtid 1, Base address 202000 */ +#define CONFIG_SYS_PCIE3_MEM_VIRT 0xc0000000 +#define CONFIG_SYS_PCIE3_MEM_PHYS 0xc40000000ull +#define CONFIG_SYS_PCIE3_IO_VIRT 0xf8020000 +#define CONFIG_SYS_PCIE3_IO_PHYS 0xff8020000ull + +/* controller 4, Base address 203000 */ +#define CONFIG_SYS_PCIE4_MEM_PHYS 0xc60000000ull +#define CONFIG_SYS_PCIE4_IO_PHYS 0xff8030000ull + +/* Qman/Bman */ +#define CONFIG_SYS_BMAN_NUM_PORTALS 10 +#define CONFIG_SYS_BMAN_MEM_BASE 0xf4000000 +#ifdef CONFIG_PHYS_64BIT +#define CONFIG_SYS_BMAN_MEM_PHYS 0xff4000000ull +#else +#define CONFIG_SYS_BMAN_MEM_PHYS CONFIG_SYS_BMAN_MEM_BASE +#endif +#define CONFIG_SYS_BMAN_MEM_SIZE 0x00200000 +#define CONFIG_SYS_BMAN_SP_CENA_SIZE 0x4000 +#define CONFIG_SYS_BMAN_SP_CINH_SIZE 0x1000 +#define CONFIG_SYS_BMAN_CENA_BASE CONFIG_SYS_BMAN_MEM_BASE +#define CONFIG_SYS_BMAN_CENA_SIZE (CONFIG_SYS_BMAN_MEM_SIZE >> 1) +#define CONFIG_SYS_BMAN_CINH_BASE (CONFIG_SYS_BMAN_MEM_BASE + \ + CONFIG_SYS_BMAN_CENA_SIZE) +#define CONFIG_SYS_BMAN_CINH_SIZE (CONFIG_SYS_BMAN_MEM_SIZE >> 1) +#define CONFIG_SYS_BMAN_SWP_ISDR_REG 0xE08 +#define CONFIG_SYS_QMAN_NUM_PORTALS 10 +#define CONFIG_SYS_QMAN_MEM_BASE 0xf4200000 +#ifdef CONFIG_PHYS_64BIT +#define CONFIG_SYS_QMAN_MEM_PHYS 0xff4200000ull +#else +#define CONFIG_SYS_QMAN_MEM_PHYS CONFIG_SYS_QMAN_MEM_BASE +#endif +#define CONFIG_SYS_QMAN_MEM_SIZE 0x00200000 +#define CONFIG_SYS_QMAN_SP_CENA_SIZE 0x4000 +#define CONFIG_SYS_QMAN_SP_CINH_SIZE 0x1000 +#define CONFIG_SYS_QMAN_CENA_BASE CONFIG_SYS_QMAN_MEM_BASE +#define CONFIG_SYS_QMAN_CENA_SIZE (CONFIG_SYS_QMAN_MEM_SIZE >> 1) +#define CONFIG_SYS_QMAN_CINH_BASE (CONFIG_SYS_QMAN_MEM_BASE + \ + CONFIG_SYS_QMAN_CENA_SIZE) +#define CONFIG_SYS_QMAN_CINH_SIZE (CONFIG_SYS_QMAN_MEM_SIZE >> 1) +#define CONFIG_SYS_QMAN_SWP_ISDR_REG 0xE08 + +#define CONFIG_SYS_DPAA_FMAN +#define CONFIG_SYS_DPAA_PME + +#ifdef CONFIG_FMAN_ENET +#define CONFIG_SYS_FM1_DTSEC1_PHY_ADDR 0x1c +#define CONFIG_SYS_FM1_DTSEC2_PHY_ADDR 0x1d +#define CONFIG_SYS_FM1_DTSEC3_PHY_ADDR 0x1e +#define CONFIG_SYS_FM1_DTSEC4_PHY_ADDR 0x1f +#define CONFIG_SYS_FM1_10GEC1_PHY_ADDR 4 + +#define CONFIG_SYS_FM2_DTSEC1_PHY_ADDR 0x1c +#define CONFIG_SYS_FM2_DTSEC2_PHY_ADDR 0x1d +#define CONFIG_SYS_FM2_DTSEC3_PHY_ADDR 0x1e +#define CONFIG_SYS_FM2_DTSEC4_PHY_ADDR 0x1f +#define CONFIG_SYS_FM2_10GEC1_PHY_ADDR 0 + +#define CONFIG_SYS_TBIPA_VALUE 8 +#endif + +/* + * Environment + */ +#define CONFIG_LOADS_ECHO /* echo on for serial download */ +#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */ + +#ifdef CONFIG_MMC +#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR +#endif + +/* + * Miscellaneous configurable options + */ + +/* + * For booting Linux, the board info and command line data + * have to be in the first 64 MB of memory, since this is + * the maximum mapped by the Linux kernel during initialization. + */ +#define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial Memory map for Linux*/ + +/* + * Environment Configuration + */ +#define CONFIG_ROOTPATH "/opt/nfsroot" +#define CONFIG_UBOOTPATH u-boot.bin /* U-Boot image on TFTP server */ + +#ifdef CONFIG_TARGET_P4080DS +#define __USB_PHY_TYPE ulpi +#else +#define __USB_PHY_TYPE utmi +#endif + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "hwconfig=fsl_ddr:ctlr_intlv=cacheline," \ + "bank_intlv=cs0_cs1;" \ + "usb1:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) ";"\ + "usb2:dr_mode=peripheral,phy_type=" __stringify(__USB_PHY_TYPE) "\0"\ + "netdev=eth0\0" \ + "uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \ + "ubootaddr=" __stringify(CONFIG_TEXT_BASE) "\0" \ + "tftpflash=tftpboot $loadaddr $uboot && " \ + "protect off $ubootaddr +$filesize && " \ + "erase $ubootaddr +$filesize && " \ + "cp.b $loadaddr $ubootaddr $filesize && " \ + "protect on $ubootaddr +$filesize && " \ + "cmp.b $loadaddr $ubootaddr $filesize\0" \ + "consoledev=ttyS0\0" \ + "ramdiskaddr=2000000\0" \ + "ramdiskfile=p4080ds/ramdisk.uboot\0" \ + "fdtaddr=1e00000\0" \ + "fdtfile=p4080ds/p4080ds.dtb\0" \ + "bdev=sda3\0" + +#include <asm/fsl_secure_boot.h> + +#endif /* __CONFIG_H */ diff --git a/include/configs/corvus.h b/include/configs/corvus.h index 698da6b6da..5e43c21774 100644 --- a/include/configs/corvus.h +++ b/include/configs/corvus.h @@ -17,7 +17,7 @@ #include <linux/sizes.h> /* - * Warning: changing CONFIG_SYS_TEXT_BASE requires + * Warning: changing CONFIG_TEXT_BASE requires * adapting the initial boot program. * Since the linker has to swallow that define, we must use a pure * hex number here! @@ -56,8 +56,8 @@ /* Defines for SPL */ #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000 -#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE +#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE #define CONFIG_SYS_NAND_ECCSIZE 256 #define CONFIG_SYS_NAND_ECCBYTES 3 diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h index 7916ca8a6c..66fb25bc02 100644 --- a/include/configs/devkit3250.h +++ b/include/configs/devkit3250.h @@ -79,11 +79,11 @@ * U-Boot Commands */ -/* U-Boot will be 0x60000 bytes, loaded and run at CONFIG_SYS_TEXT_BASE */ +/* U-Boot will be 0x60000 bytes, loaded and run at CONFIG_TEXT_BASE */ #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x60000 -#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE +#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE /* See common/spl/spl.c spl_set_header_raw_uboot() */ #define CONFIG_SYS_MONITOR_LEN CONFIG_SYS_NAND_U_BOOT_SIZE diff --git a/include/configs/evb_ast2500.h b/include/configs/evb_ast2500.h index b109a15183..cd6cb062ec 100644 --- a/include/configs/evb_ast2500.h +++ b/include/configs/evb_ast2500.h @@ -11,7 +11,7 @@ #include <configs/aspeed-common.h> -#define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_UBOOT_BASE CONFIG_TEXT_BASE /* Misc */ #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/evb_ast2600.h b/include/configs/evb_ast2600.h index 3c2155da46..ecd05fe15c 100644 --- a/include/configs/evb_ast2600.h +++ b/include/configs/evb_ast2600.h @@ -8,7 +8,7 @@ #include <configs/aspeed-common.h> -#define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_UBOOT_BASE CONFIG_TEXT_BASE /* Misc */ #define STR_HELPER(s) #s diff --git a/include/configs/gardena-smart-gateway-at91sam.h b/include/configs/gardena-smart-gateway-at91sam.h index 331e9ca8ba..635d0f01b2 100644 --- a/include/configs/gardena-smart-gateway-at91sam.h +++ b/include/configs/gardena-smart-gateway-at91sam.h @@ -42,7 +42,7 @@ #define CONFIG_SYS_MCKR_CSS 0x1302 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0xa0000 -#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE +#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE #endif diff --git a/include/configs/gardena-smart-gateway-mt7688.h b/include/configs/gardena-smart-gateway-mt7688.h index d21a9b9383..5f33470dfc 100644 --- a/include/configs/gardena-smart-gateway-mt7688.h +++ b/include/configs/gardena-smart-gateway-mt7688.h @@ -16,7 +16,7 @@ /* SPL */ -#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_UBOOT_START CONFIG_TEXT_BASE /* Dummy value */ #define CONFIG_SYS_UBOOT_BASE 0 diff --git a/include/configs/hikey.h b/include/configs/hikey.h index 5be6eb4e76..18c1e83aeb 100644 --- a/include/configs/hikey.h +++ b/include/configs/hikey.h @@ -17,7 +17,7 @@ /* Physical Memory Map */ -/* CONFIG_SYS_TEXT_BASE needs to align with where ATF loads bl33.bin */ +/* CONFIG_TEXT_BASE needs to align with where ATF loads bl33.bin */ #define PHYS_SDRAM_1 0x00000000 diff --git a/include/configs/hikey960.h b/include/configs/hikey960.h index ad070439d0..bdc9c479c2 100644 --- a/include/configs/hikey960.h +++ b/include/configs/hikey960.h @@ -11,7 +11,7 @@ /* Physical Memory Map */ -/* CONFIG_SYS_TEXT_BASE needs to align with where ATF loads bl33.bin */ +/* CONFIG_TEXT_BASE needs to align with where ATF loads bl33.bin */ #define PHYS_SDRAM_1 0x00000000 #define PHYS_SDRAM_1_SIZE 0xC0000000 diff --git a/include/configs/imx6-engicam.h b/include/configs/imx6-engicam.h index a2d5080a10..fa73cabda3 100644 --- a/include/configs/imx6-engicam.h +++ b/include/configs/imx6-engicam.h @@ -128,7 +128,7 @@ #ifdef CONFIG_NAND_MXS # define CONFIG_SYS_MAX_NAND_DEVICE 1 # define CONFIG_SYS_NAND_BASE 0x40000000 -# define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE +# define CONFIG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE /* MTD device */ #endif diff --git a/include/configs/imx6_logic.h b/include/configs/imx6_logic.h index 2913549c88..9ab3f8abef 100644 --- a/include/configs/imx6_logic.h +++ b/include/configs/imx6_logic.h @@ -118,7 +118,7 @@ /* NAND stuff */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x40000000 -#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE /* USB Configs */ #ifdef CONFIG_CMD_USB diff --git a/include/configs/kontron-sl-mx6ul.h b/include/configs/kontron-sl-mx6ul.h index f0586f7f72..3bf7970ea8 100644 --- a/include/configs/kontron-sl-mx6ul.h +++ b/include/configs/kontron-sl-mx6ul.h @@ -22,7 +22,7 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_UBOOT_BASE CONFIG_TEXT_BASE /* Board and environment settings */ #define CONFIG_MXC_UART_BASE UART4_BASE diff --git a/include/configs/linkit-smart-7688.h b/include/configs/linkit-smart-7688.h index 2e077dd516..a65decd3fd 100644 --- a/include/configs/linkit-smart-7688.h +++ b/include/configs/linkit-smart-7688.h @@ -16,7 +16,7 @@ /* SPL */ -#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_UBOOT_START CONFIG_TEXT_BASE /* Dummy value */ #define CONFIG_SYS_UBOOT_BASE 0 diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index d383b6c655..37b8cd7e69 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -16,8 +16,8 @@ #ifdef CONFIG_NAND_BOOT #define CONFIG_SYS_NAND_U_BOOT_SIZE (400 << 10) -#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE +#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN 0x80000 #endif diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index 1fb1d05eba..9f146c4305 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -62,8 +62,8 @@ /* NAND SPL */ #ifdef CONFIG_NAND_BOOT -#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE +#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE #ifdef CONFIG_NXP_ESBC #define CONFIG_U_BOOT_HDR_SIZE (16 << 10) @@ -93,7 +93,7 @@ * CONFIG_SYS_FLASH_BASE has the final address (core view) * CONFIG_SYS_FLASH_BASE_PHYS has the final address (IFC view) * CONFIG_SYS_FLASH_BASE_PHYS_EARLY has the temporary IFC address - * CONFIG_SYS_TEXT_BASE is linked to 0x60000000 for booting + * CONFIG_TEXT_BASE is linked to 0x60000000 for booting */ #define CONFIG_SYS_FLASH_BASE 0x60000000 #define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index e5fb111f1b..26ce93a699 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -66,8 +66,8 @@ /* NAND SPL */ #ifdef CONFIG_NAND_BOOT -#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE +#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN 0xa0000 #endif diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h index 1f54e51645..b411efd832 100644 --- a/include/configs/ls1046aqds.h +++ b/include/configs/ls1046aqds.h @@ -36,7 +36,7 @@ * CONFIG_SYS_FLASH_BASE has the final address (core view) * CONFIG_SYS_FLASH_BASE_PHYS has the final address (IFC view) * CONFIG_SYS_FLASH_BASE_PHYS_EARLY has the temporary IFC address - * CONFIG_SYS_TEXT_BASE is linked to 0x60000000 for booting + * CONFIG_TEXT_BASE is linked to 0x60000000 for booting */ #define CONFIG_SYS_FLASH_BASE 0x60000000 #define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h index 21afe80e70..7d76170bf7 100644 --- a/include/configs/ls1088a_common.h +++ b/include/configs/ls1088a_common.h @@ -69,7 +69,7 @@ * CONFIG_SYS_FLASH_BASE has the final address (core view) * CONFIG_SYS_FLASH_BASE_PHYS has the final address (IFC view) * CONFIG_SYS_FLASH_BASE_PHYS_EARLY has the temporary IFC address - * CONFIG_SYS_TEXT_BASE is linked to 0x30000000 for booting + * CONFIG_TEXT_BASE is linked to 0x30000000 for booting */ #define CONFIG_SYS_FLASH_BASE 0x580000000ULL diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index e170b5aa2c..dc43ecbd18 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -61,7 +61,7 @@ * CONFIG_SYS_FLASH_BASE has the final address (core view) * CONFIG_SYS_FLASH_BASE_PHYS has the final address (IFC view) * CONFIG_SYS_FLASH_BASE_PHYS_EARLY has the temporary IFC address - * CONFIG_SYS_TEXT_BASE is linked to 0x30000000 for booting + * CONFIG_TEXT_BASE is linked to 0x30000000 for booting */ #define CONFIG_SYS_FLASH_BASE 0x580000000ULL diff --git a/include/configs/meesc.h b/include/configs/meesc.h index 6b2296788d..cffcd9dd2f 100644 --- a/include/configs/meesc.h +++ b/include/configs/meesc.h @@ -21,7 +21,7 @@ #include <asm/hardware.h> /* - * Warning: changing CONFIG_SYS_TEXT_BASE requires + * Warning: changing CONFIG_TEXT_BASE requires * adapting the initial boot program. * Since the linker has to swallow that define, we must use a pure * hex number here! diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h index dfae8cea7b..139b5bca10 100644 --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h @@ -95,6 +95,6 @@ /* SPL part */ -#define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_UBOOT_BASE CONFIG_TEXT_BASE #endif /* __CONFIG_H */ diff --git a/include/configs/mt7620.h b/include/configs/mt7620.h index 049d9a1b55..c6bee5f140 100644 --- a/include/configs/mt7620.h +++ b/include/configs/mt7620.h @@ -16,7 +16,7 @@ /* SPL */ -#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_UBOOT_START CONFIG_TEXT_BASE /* Dummy value */ #define CONFIG_SYS_UBOOT_BASE 0 diff --git a/include/configs/mt7622.h b/include/configs/mt7622.h index 78d79b7780..f995399367 100644 --- a/include/configs/mt7622.h +++ b/include/configs/mt7622.h @@ -14,10 +14,10 @@ #define CONFIG_SYS_NONCACHED_MEMORY SZ_1M /* Uboot definition */ -#define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_UBOOT_BASE CONFIG_TEXT_BASE /* SPL -> Uboot */ -#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_UBOOT_START CONFIG_TEXT_BASE /* DRAM */ #define CONFIG_SYS_SDRAM_BASE 0x40000000 diff --git a/include/configs/mt7628.h b/include/configs/mt7628.h index 3680c0fe44..317d1d2b0f 100644 --- a/include/configs/mt7628.h +++ b/include/configs/mt7628.h @@ -28,7 +28,7 @@ /* SPL */ -#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_UBOOT_START CONFIG_TEXT_BASE /* Dummy value */ #define CONFIG_SYS_UBOOT_BASE 0 diff --git a/include/configs/mt7981.h b/include/configs/mt7981.h index 01ad309608..1f81b0b4f8 100644 --- a/include/configs/mt7981.h +++ b/include/configs/mt7981.h @@ -14,10 +14,10 @@ #define CONFIG_SYS_NONCACHED_MEMORY SZ_1M /* Uboot definition */ -#define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_UBOOT_BASE CONFIG_TEXT_BASE /* SPL -> Uboot */ -#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_UBOOT_START CONFIG_TEXT_BASE /* DRAM */ #define CONFIG_SYS_SDRAM_BASE 0x40000000 diff --git a/include/configs/mt7986.h b/include/configs/mt7986.h index ccdd6abdb1..00e1c57ae8 100644 --- a/include/configs/mt7986.h +++ b/include/configs/mt7986.h @@ -14,10 +14,10 @@ #define CONFIG_SYS_NONCACHED_MEMORY SZ_1M /* Uboot definition */ -#define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_UBOOT_BASE CONFIG_TEXT_BASE /* SPL -> Uboot */ -#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_UBOOT_START CONFIG_TEXT_BASE /* DRAM */ #define CONFIG_SYS_SDRAM_BASE 0x40000000 diff --git a/include/configs/mt8512.h b/include/configs/mt8512.h index 964c957813..5ff5541c50 100644 --- a/include/configs/mt8512.h +++ b/include/configs/mt8512.h @@ -14,7 +14,7 @@ #define CONFIG_SYS_NONCACHED_MEMORY SZ_1M /* Uboot definition */ -#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_UBOOT_START CONFIG_TEXT_BASE #define ENV_BOOT_READ_IMAGE \ "boot_rd_img=mmc dev 0" \ diff --git a/include/configs/mv-common.h b/include/configs/mv-common.h index 384a8f7d1d..20e00ec722 100644 --- a/include/configs/mv-common.h +++ b/include/configs/mv-common.h @@ -23,7 +23,7 @@ */ /* - * Custom CONFIG_SYS_TEXT_BASE can be done in <board>.h + * Custom CONFIG_TEXT_BASE can be done in <board>.h */ /* additions for new ARM relocation support */ diff --git a/include/configs/octeontx2_common.h b/include/configs/octeontx2_common.h index 2c430e8d37..25116c5ed2 100644 --- a/include/configs/octeontx2_common.h +++ b/include/configs/octeontx2_common.h @@ -10,7 +10,7 @@ /** Maximum size of image supported for bootm (and bootable FIT images) */ /** Memory base address */ -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_SDRAM_BASE CONFIG_TEXT_BASE /** Stack starting address */ diff --git a/include/configs/octeontx_common.h b/include/configs/octeontx_common.h index e7a6bd41db..373eb9119c 100644 --- a/include/configs/octeontx_common.h +++ b/include/configs/octeontx_common.h @@ -36,7 +36,7 @@ /** Maximum size of image supported for bootm (and bootable FIT images) */ /** Memory base address */ -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_SDRAM_BASE CONFIG_TEXT_BASE /** Stack starting address */ diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index d201c72a6c..543a16f1d1 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -87,8 +87,8 @@ #ifdef CONFIG_SDCARD #define CONFIG_SYS_MMC_U_BOOT_SIZE (768 << 10) -#define CONFIG_SYS_MMC_U_BOOT_DST CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_MMC_U_BOOT_START CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_MMC_U_BOOT_DST CONFIG_TEXT_BASE +#define CONFIG_SYS_MMC_U_BOOT_START CONFIG_TEXT_BASE #ifdef CONFIG_FSL_PREPBL_ESDHC_BOOT_SECTOR #define CONFIG_SYS_MMC_U_BOOT_OFFS (CONFIG_SPL_PAD_TO - CONFIG_FSL_PREPBL_ESDHC_BOOT_SECTOR_DATA*512) #else @@ -96,8 +96,8 @@ #endif #elif defined(CONFIG_SPIFLASH) #define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10) -#define CONFIG_SYS_SPI_FLASH_U_BOOT_DST CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_SPI_FLASH_U_BOOT_START CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_SPI_FLASH_U_BOOT_DST CONFIG_TEXT_BASE +#define CONFIG_SYS_SPI_FLASH_U_BOOT_START CONFIG_TEXT_BASE #define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS CONFIG_SPL_PAD_TO #elif defined(CONFIG_MTD_RAW_NAND) #ifdef CONFIG_TPL_BUILD @@ -456,11 +456,11 @@ "loadaddr=1000000\0" \ "bootfile=uImage\0" \ "tftpflash=tftpboot $loadaddr $uboot; " \ - "protect off " __stringify(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ - "erase " __stringify(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ - "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE) " $filesize; " \ - "protect on " __stringify(CONFIG_SYS_TEXT_BASE) " +$filesize; " \ - "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE) " $filesize\0" \ + "protect off " __stringify(CONFIG_TEXT_BASE) " +$filesize; " \ + "erase " __stringify(CONFIG_TEXT_BASE) " +$filesize; " \ + "cp.b $loadaddr " __stringify(CONFIG_TEXT_BASE) " $filesize; " \ + "protect on " __stringify(CONFIG_TEXT_BASE) " +$filesize; " \ + "cmp.b $loadaddr " __stringify(CONFIG_TEXT_BASE) " $filesize\0" \ "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0" \ "consoledev=ttyS0\0" \ "ramdiskaddr=2000000\0" \ diff --git a/include/configs/rpi.h b/include/configs/rpi.h index 4f5025d0da..cd8fe8b518 100644 --- a/include/configs/rpi.h +++ b/include/configs/rpi.h @@ -24,7 +24,7 @@ /* Memory layout */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_UBOOT_BASE CONFIG_TEXT_BASE /* * The board really has 256M. However, the VC (VideoCore co-processor) shares * the RAM, and uses a configurable portion at the top. We tell U-Boot that a diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h index fcb0fd5cec..5759794b14 100644 --- a/include/configs/siemens-am33x-common.h +++ b/include/configs/siemens-am33x-common.h @@ -63,7 +63,7 @@ #define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * \ CONFIG_SYS_NAND_ECCSTEPS) -#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE /* * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h index 1a3ac817fb..802ed07b9e 100644 --- a/include/configs/smartweb.h +++ b/include/configs/smartweb.h @@ -30,7 +30,7 @@ #include <linux/sizes.h> /* - * Warning: changing CONFIG_SYS_TEXT_BASE requires adapting the initial boot + * Warning: changing CONFIG_TEXT_BASE requires adapting the initial boot * program. Since the linker has to swallow that define, we must use a pure * hex number here! */ @@ -96,8 +96,8 @@ #define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14) #define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K -#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE +#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE #define CONFIG_SYS_NAND_SIZE (SZ_256M) #define CONFIG_SYS_NAND_ECCSIZE 256 diff --git a/include/configs/taurus.h b/include/configs/taurus.h index 4758e23f55..a29652dd56 100644 --- a/include/configs/taurus.h +++ b/include/configs/taurus.h @@ -22,7 +22,7 @@ #include <linux/sizes.h> /* - * Warning: changing CONFIG_SYS_TEXT_BASE requires + * Warning: changing CONFIG_TEXT_BASE requires * adapting the initial boot program. * Since the linker has to swallow that define, we must use a pure * hex number here! @@ -130,8 +130,8 @@ #define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14) #define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K -#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE +#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE #define CONFIG_SYS_NAND_SIZE (256 * SZ_1M) #define CONFIG_SYS_NAND_ECCSIZE 256 diff --git a/include/configs/ti_armv7_common.h b/include/configs/ti_armv7_common.h index 2d1f0372ae..05536c3eed 100644 --- a/include/configs/ti_armv7_common.h +++ b/include/configs/ti_armv7_common.h @@ -123,7 +123,7 @@ /* General parts of the framework, required. */ #ifdef CONFIG_MTD_RAW_NAND -#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE #endif #endif /* !CONFIG_NOR_BOOT */ diff --git a/include/configs/vocore2.h b/include/configs/vocore2.h index 6a7a0832c9..b2572caaf2 100644 --- a/include/configs/vocore2.h +++ b/include/configs/vocore2.h @@ -16,7 +16,7 @@ /* SPL */ -#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_UBOOT_START CONFIG_TEXT_BASE /* Dummy value */ #define CONFIG_SYS_UBOOT_BASE 0 diff --git a/include/configs/work_92105.h b/include/configs/work_92105.h index 8d1eee2fca..f53ea3ccd2 100644 --- a/include/configs/work_92105.h +++ b/include/configs/work_92105.h @@ -63,10 +63,10 @@ /* Use the framework and generic lib */ /* SPL will use serial */ /* SPL will load U-Boot from NAND offset 0x40000 */ -/* U-Boot will be 0x40000 bytes, loaded and run at CONFIG_SYS_TEXT_BASE */ +/* U-Boot will be 0x40000 bytes, loaded and run at CONFIG_TEXT_BASE */ #define CONFIG_SYS_MONITOR_LEN 0x40000 /* actually, MAX size */ -#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE +#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE /* * Include SoC specific configuration diff --git a/include/image.h b/include/image.h index d7d6a3fe5b..65d0d4f438 100644 --- a/include/image.h +++ b/include/image.h @@ -58,6 +58,7 @@ enum ih_category { IH_COMP, IH_OS, IH_TYPE, + IH_PHASE, IH_COUNT, }; @@ -184,8 +185,7 @@ enum { * New IDs *MUST* be appended at the end of the list and *NEVER* * inserted for backward compatibility. */ - -enum { +enum image_type_t { IH_TYPE_INVALID = 0, /* Invalid Image */ IH_TYPE_STANDALONE, /* Standalone Program */ IH_TYPE_KERNEL, /* OS Kernel Image */ @@ -252,6 +252,59 @@ enum { IH_COMP_COUNT, }; +/** + * Phases - images intended for particular U-Boot phases (SPL, etc.) + * + * @IH_PHASE_NONE: No phase information, can be loaded by any phase + * @IH_PHASE_U_BOOT: Only for U-Boot proper + * @IH_PHASE_SPL: Only for SPL + */ +enum image_phase_t { + IH_PHASE_NONE = 0, + IH_PHASE_U_BOOT, + IH_PHASE_SPL, + + IH_PHASE_COUNT, +}; + +#define IMAGE_PHASE_SHIFT 8 +#define IMAGE_PHASE_MASK (0xff << IMAGE_PHASE_SHIFT) +#define IMAGE_TYPE_MASK 0xff + +/** + * image_ph() - build a composite value combining and type + * + * @phase: Image phase value + * @type: Image type value + * Returns: Composite value containing both + */ +static inline int image_ph(enum image_phase_t phase, enum image_type_t type) +{ + return type | (phase << IMAGE_PHASE_SHIFT); +} + +/** + * image_ph_phase() - obtain the phase from a composite phase/type value + * + * @image_ph_type: Composite value to convert + * Returns: Phase value taken from the composite value + */ +static inline int image_ph_phase(int image_ph_type) +{ + return (image_ph_type & IMAGE_PHASE_MASK) >> IMAGE_PHASE_SHIFT; +} + +/** + * image_ph_type() - obtain the type from a composite phase/type value + * + * @image_ph_type: Composite value to convert + * Returns: Type value taken from the composite value + */ +static inline int image_ph_type(int image_ph_type) +{ + return image_ph_type & IMAGE_TYPE_MASK; +} + #define LZ4F_MAGIC 0x184D2204 /* LZ4 Magic Number */ #define IH_MAGIC 0x27051956 /* Image Magic Number */ #define IH_NMLEN 32 /* Image Name Length */ @@ -438,6 +491,22 @@ const char *genimg_get_os_short_name(uint8_t comp); const char *genimg_get_arch_name(uint8_t arch); /** + * genimg_get_phase_name() - Get the friendly name for a phase + * + * @phase: Phase value to look up + * Returns: Friendly name for the phase (e.g. "U-Boot phase") + */ +const char *genimg_get_phase_name(enum image_phase_t phase); + +/** + * genimg_get_phase_id() - Convert a phase name to an ID + * + * @name: Name to convert (e.g. "u-boot") + * Returns: ID for that phase (e.g. IH_PHASE_U_BOOT) + */ +int genimg_get_phase_id(const char *name); + +/** * genimg_get_arch_short_name() - get the short name for an architecture * * @param arch Architecture type (IH_ARCH_...) @@ -622,9 +691,10 @@ int boot_get_fdt_fit(struct bootm_headers *images, ulong addr, * name (e.g. "conf-1") or NULL to use the default. On * exit points to the selected configuration name. * @param arch Expected architecture (IH_ARCH_...) - * @param image_type Required image type (IH_TYPE_...). If this is + * @param image_ph_type Required image type (IH_TYPE_...). If this is * IH_TYPE_KERNEL then we allow IH_TYPE_KERNEL_NOLOAD - * also. + * also. If a phase is required, this is included also, + * see image_phase_and_type() * @param bootstage_id ID of starting bootstage to use for progress updates. * This will be added to the BOOTSTAGE_SUB values when * calling bootstage_mark() @@ -635,7 +705,7 @@ int boot_get_fdt_fit(struct bootm_headers *images, ulong addr, */ int fit_image_load(struct bootm_headers *images, ulong addr, const char **fit_unamep, const char **fit_uname_configp, - int arch, int image_type, int bootstage_id, + int arch, int image_ph_type, int bootstage_id, enum fit_load_op load_op, ulong *datap, ulong *lenp); /** @@ -955,6 +1025,7 @@ int booti_setup(ulong image, ulong *relocated_addr, ulong *size, #define FIT_FPGA_PROP "fpga" #define FIT_FIRMWARE_PROP "firmware" #define FIT_STANDALONE_PROP "standalone" +#define FIT_PHASE_PROP "phase" #define FIT_MAX_HASH_LEN HASH_MAX_DIGEST_SIZE @@ -1206,6 +1277,47 @@ int fit_image_check_comp(const void *fit, int noffset, uint8_t comp); */ int fit_check_format(const void *fit, ulong size); +/** + * fit_conf_find_compat() - find most compatible configuration + * @fit: pointer to the FIT format image header + * @fdt: pointer to the device tree to compare against + * + * Attempts to find the configuration whose fdt is the most compatible with the + * passed in device tree + * + * Example:: + * + * / o image-tree + * |-o images + * | |-o fdt-1 + * | |-o fdt-2 + * | + * |-o configurations + * |-o config-1 + * | |-fdt = fdt-1 + * | + * |-o config-2 + * |-fdt = fdt-2 + * + * / o U-Boot fdt + * |-compatible = "foo,bar", "bim,bam" + * + * / o kernel fdt1 + * |-compatible = "foo,bar", + * + * / o kernel fdt2 + * |-compatible = "bim,bam", "baz,biz" + * + * Configuration 1 would be picked because the first string in U-Boot's + * compatible list, "foo,bar", matches a compatible string in the root of fdt1. + * "bim,bam" in fdt2 matches the second string which isn't as good as fdt1. + * + * As an optimization, the compatible property from the FDT's root node can be + * copied into the configuration node in the FIT image. This is required to + * match configurations with compressed FDTs. + * + * Returns: offset to the configuration to use if one was found, -1 otherwise + */ int fit_conf_find_compat(const void *fit, const void *fdt); /** @@ -1238,14 +1350,15 @@ int fit_conf_get_prop_node_index(const void *fit, int noffset, * @fit: FIT to check * @noffset: Offset of conf@xxx node to check * @prop_name: Property to read from the conf node + * @phase: Image phase to use, IH_PHASE_NONE for any * * The conf- nodes contain references to other nodes, using properties * like 'kernel = "kernel"'. Given such a property name (e.g. "kernel"), * return the offset of the node referred to (e.g. offset of node * "/images/kernel". */ -int fit_conf_get_prop_node(const void *fit, int noffset, - const char *prop_name); +int fit_conf_get_prop_node(const void *fit, int noffset, const char *prop_name, + enum image_phase_t phase); int fit_check_ramdisk(const void *fit, int os_noffset, uint8_t arch, int verify); diff --git a/include/part.h b/include/part.h index 6f604e7315..807370d942 100644 --- a/include/part.h +++ b/include/part.h @@ -313,12 +313,42 @@ struct udevice; */ int part_create_block_devices(struct udevice *blk_dev); -unsigned long dev_read(struct udevice *dev, lbaint_t start, - lbaint_t blkcnt, void *buffer); -unsigned long dev_write(struct udevice *dev, lbaint_t start, - lbaint_t blkcnt, const void *buffer); -unsigned long dev_erase(struct udevice *dev, lbaint_t start, - lbaint_t blkcnt); +/** + * disk_blk_read() - read blocks from a disk partition + * + * @dev: Device to read from (UCLASS_PARTITION) + * @start: Start block number to read in the partition (0=first) + * @blkcnt: Number of blocks to read + * @buffer: Destination buffer for data read + * Returns: number of blocks read, or -ve error number (see the + * IS_ERR_VALUE() macro + */ +ulong disk_blk_read(struct udevice *dev, lbaint_t start, lbaint_t blkcnt, + void *buffer); + +/** + * disk_blk_write() - write to a disk partition + * + * @dev: Device to write to (UCLASS_PARTITION) + * @start: Start block number to write in the partition (0=first) + * @blkcnt: Number of blocks to write + * @buffer: Source buffer for data to write + * Returns: number of blocks written, or -ve error number (see the + * IS_ERR_VALUE() macro + */ +ulong disk_blk_write(struct udevice *dev, lbaint_t start, lbaint_t blkcnt, + const void *buffer); + +/** + * disk_blk_erase() - erase a section of a disk partition + * + * @dev: Device to (partially) erase (UCLASS_PARTITION) + * @start: Start block number to erase in the partition (0=first) + * @blkcnt: Number of blocks to erase + * Returns: number of blocks erased, or -ve error number (see the + * IS_ERR_VALUE() macro + */ +ulong disk_blk_erase(struct udevice *dev, lbaint_t start, lbaint_t blkcnt); /* * We don't support printing partition information in SPL and only support diff --git a/include/scsi.h b/include/scsi.h index 94e1d8ccb2..9efefea99b 100644 --- a/include/scsi.h +++ b/include/scsi.h @@ -255,6 +255,16 @@ struct __packed scsi_read10_req { u8 spare2[3]; }; +/** struct scsi_write10_req - data for the write10 command */ +struct __packed scsi_write10_req { + u8 cmd; + u8 lun_flags; + u32 lba; + u8 spare; + u16 xfer_len; + u8 spare2[3]; +}; + /** * struct scsi_plat - stores information about SCSI controller * diff --git a/include/scsi_emul.h b/include/scsi_emul.h index 13c3f860b4..d439f7c00c 100644 --- a/include/scsi_emul.h +++ b/include/scsi_emul.h @@ -41,13 +41,20 @@ struct scsi_emul_info { enum scsi_cmd_phase phase; int buff_used; int read_len; + int write_len; uint seek_pos; int alloc_len; uint transfer_len; }; -/* Indicates that a read is being started */ -#define SCSI_EMUL_DO_READ 1 +/** + * Return value from sb_scsi_emul_command() indicates that a read or write is + * being started + */ +enum { + SCSI_EMUL_DO_READ = 1, + SCSI_EMUL_DO_WRITE = 2, +}; /** * sb_scsi_emul_command() - Process a SCSI command @@ -61,8 +68,9 @@ struct scsi_emul_info { * @info: Emulation information * @req: Request to process * @len: Length of request in bytes - * @return SCSI_EMUL_DO_READ if a read has started, 0 if some other operation - * has started, -ve if there was an error + * @return SCSI_EMUL_DO_READ if a read has started, SCSI_EMUL_DO_WRITE if a + * write has started, 0 if some other operation has started, -ve if there + * was an error */ int sb_scsi_emul_command(struct scsi_emul_info *info, const struct scsi_cmd *req, int len); diff --git a/include/spl.h b/include/spl.h index 303a657bf5..3eb27de616 100644 --- a/include/spl.h +++ b/include/spl.h @@ -66,6 +66,8 @@ enum u_boot_phase { PHASE_SPL, /* Running in SPL */ PHASE_BOARD_F, /* Running in U-Boot before relocation */ PHASE_BOARD_R, /* Running in U-Boot after relocation */ + + PHASE_COUNT, }; /** @@ -228,6 +230,18 @@ static inline const char *spl_phase_prefix(enum u_boot_phase phase) # define SPL_TPL_PROMPT "" #endif +/** + * enum spl_sandbox_flags - flags for sandbox's use of spl_image_info->flags + * + * @SPL_SANDBOXF_ARG_IS_FNAME: arg is the filename to jump to (default) + * @SPL_SANDBOXF_ARG_IS_BUF: arg is the containing image to jump to, @offset is + * the start offset within the image, @size is the size of the image + */ +enum spl_sandbox_flags { + SPL_SANDBOXF_ARG_IS_FNAME = 0, + SPL_SANDBOXF_ARG_IS_BUF, +}; + struct spl_image_info { const char *name; u8 os; @@ -286,10 +300,10 @@ struct spl_load_info { */ binman_sym_extern(ulong, u_boot_any, image_pos); binman_sym_extern(ulong, u_boot_any, size); -binman_sym_extern(ulong, u_boot_spl, image_pos); -binman_sym_extern(ulong, u_boot_spl, size); -binman_sym_extern(ulong, u_boot_vpl, image_pos); -binman_sym_extern(ulong, u_boot_vpl, size); +binman_sym_extern(ulong, u_boot_spl_any, image_pos); +binman_sym_extern(ulong, u_boot_spl_any, size); +binman_sym_extern(ulong, u_boot_vpl_any, image_pos); +binman_sym_extern(ulong, u_boot_vpl_any, size); /** * spl_get_image_pos() - get the image position of the next phase @@ -309,7 +323,7 @@ ulong spl_get_image_size(void); * spl_get_image_text_base() - get the text base of the next phase * * This returns the address that the next stage is linked to run at, i.e. - * CONFIG_SPL_TEXT_BASE or CONFIG_SYS_TEXT_BASE + * CONFIG_SPL_TEXT_BASE or CONFIG_TEXT_BASE * * Return: text-base address */ @@ -457,7 +471,7 @@ void spl_set_bd(void); * * This sets up the given spl_image which the standard values obtained from * config options: CONFIG_SYS_MONITOR_LEN, CONFIG_SYS_UBOOT_START, - * CONFIG_SYS_TEXT_BASE. + * CONFIG_TEXT_BASE. * * @spl_image: Image description to set up */ diff --git a/include/test/test.h b/include/test/test.h index 3bbd77c38b..4ad74614af 100644 --- a/include/test/test.h +++ b/include/test/test.h @@ -13,6 +13,7 @@ * struct unit_test_state - Entire state of test system * * @fail_count: Number of tests that failed + * @skip_count: Number of tests that were skipped * @start: Store the starting mallinfo when doing leak test * @of_live: true to use livetree if available, false to use flattree * @of_root: Record of the livetree root node (used for setting up tests) @@ -27,11 +28,13 @@ * @other_fdt_size: Size of the other FDT (UT_TESTF_OTHER_FDT) * @of_other: Live tree for the other FDT * @runs_per_test: Number of times to run each test (typically 1) + * @force_run: true to run tests marked with the UT_TESTF_MANUAL flag * @expect_str: Temporary string used to hold expected string value * @actual_str: Temporary string used to hold actual string value */ struct unit_test_state { int fail_count; + int skip_count; struct mallinfo start; struct device_node *of_root; bool of_live; @@ -46,6 +49,7 @@ struct unit_test_state { int other_fdt_size; struct device_node *of_other; int runs_per_test; + bool force_run; char expect_str[512]; char actual_str[512]; }; @@ -61,6 +65,12 @@ enum { /* do extra driver model init and uninit */ UT_TESTF_DM = BIT(6), UT_TESTF_OTHER_FDT = BIT(7), /* read in other device tree */ + /* + * Only run if explicitly requested with 'ut -f <suite> <test>'. The + * test name must end in "_norun" so that pytest detects this also, + * since it cannot access the flags. + */ + UT_TESTF_MANUAL = BIT(8), }; /** diff --git a/include/test/ut.h b/include/test/ut.h index f7217aa8ac..e0e618b58c 100644 --- a/include/test/ut.h +++ b/include/test/ut.h @@ -409,9 +409,11 @@ void test_set_state(struct unit_test_state *uts); * @select_name: Name of a single test to run (from the list provided). If NULL * then all tests are run * @runs_per_test: Number of times to run each test (typically 1) + * @force_run: Run tests that are marked as manual-only (UT_TESTF_MANUAL) * Return: 0 if all tests passed, -1 if any failed */ int ut_run_list(const char *name, const char *prefix, struct unit_test *tests, - int count, const char *select_name, int runs_per_test); + int count, const char *select_name, int runs_per_test, + bool force_run); #endif diff --git a/include/vbe.h b/include/vbe.h index b83f6f0c51..5ede8181b9 100644 --- a/include/vbe.h +++ b/include/vbe.h @@ -11,6 +11,43 @@ #define __VBE_H /** + * enum vbe_phase_t - current phase of VBE + * + * VBE operates in two distinct phases. In VPL it has to choose which firmware + * to run (SPL, U-Boot, OP-TEE, etc.). It then carries on running until it gets + * to U-Boot, where it decides which OS to run + * + * @VBE_PHASE_FIRMWARE: Selecting the firmware to run + * @VBE_PHASE_OS: Selecting the Operating System to run + */ +enum vbe_phase_t { + VBE_PHASE_FIRMWARE, + VBE_PHASE_OS, +}; + +/** + * struct vbe_handoff - information about VBE progress + * + * @phases: Indicates which phases used the VBE bootmeth (1 << PHASE_...) + */ +struct vbe_handoff { + u8 phases; +}; + +/** + * vbe_phase() - get current VBE phase + * + * Returns: Current VBE phase + */ +static inline enum vbe_phase_t vbe_phase(void) +{ + if (IS_ENABLED(CONFIG_SPL_BUILD)) + return VBE_PHASE_FIRMWARE; + + return VBE_PHASE_OS; +} + +/** * vbe_list() - List the VBE bootmeths * * This shows a list of the VBE bootmeth devices |