diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/_exports.h | 3 | ||||
| -rw-r--r-- | include/blk.h | 122 | ||||
| -rw-r--r-- | include/configs/mt7981.h | 25 | ||||
| -rw-r--r-- | include/configs/mt7986.h | 25 | ||||
| -rw-r--r-- | include/dt-bindings/clock/mt7981-clk.h | 267 | ||||
| -rw-r--r-- | include/dt-bindings/clock/mt7986-clk.h | 249 | ||||
| -rw-r--r-- | include/dt-bindings/pinctrl/mt65xx.h | 41 | ||||
| -rw-r--r-- | include/efi_loader.h | 4 | ||||
| -rw-r--r-- | include/init.h | 2 | ||||
| -rw-r--r-- | include/os.h | 8 | ||||
| -rw-r--r-- | include/scsi.h | 126 | ||||
| -rw-r--r-- | include/scsi_emul.h | 70 | ||||
| -rw-r--r-- | include/serial.h | 5 | ||||
| -rw-r--r-- | include/stdio.h | 15 | ||||
| -rw-r--r-- | include/stdio_dev.h | 7 | ||||
| -rw-r--r-- | include/usb/designware_udc.h | 183 |
16 files changed, 886 insertions, 266 deletions
diff --git a/include/_exports.h b/include/_exports.h index f6df8b6107..1af946fac3 100644 --- a/include/_exports.h +++ b/include/_exports.h @@ -12,6 +12,9 @@ EXPORT_FUNC(tstc, int, tstc, void) EXPORT_FUNC(putc, void, putc, const char) EXPORT_FUNC(puts, void, puts, const char *) +#ifdef CONFIG_CONSOLE_FLUSH_SUPPORT + EXPORT_FUNC(flush, void, flush, void) +#endif EXPORT_FUNC(printf, int, printf, const char*, ...) #if (defined(CONFIG_X86) && !defined(CONFIG_X86_64)) || defined(CONFIG_PPC) EXPORT_FUNC(irq_install_handler, void, install_hdlr, diff --git a/include/blk.h b/include/blk.h index 279f9ea4a9..8806c382d4 100644 --- a/include/blk.h +++ b/include/blk.h @@ -54,7 +54,7 @@ struct blk_desc { * TODO: With driver model we should be able to use the parent * device's uclass instead. */ - enum uclass_id if_type; /* type of the interface */ + enum uclass_id uclass_id; /* type of the interface */ int devnum; /* device number */ unsigned char part_type; /* partition type */ unsigned char target; /* target SCSI ID */ @@ -114,7 +114,7 @@ int blkcache_init(void); /** * blkcache_read() - attempt to read a set of blocks from cache * - * @param iftype - IF_TYPE_x for type of device + * @param iftype - uclass_id_x for type of device * @param dev - device index of particular type * @param start - starting block number * @param blkcnt - number of blocks to read @@ -131,7 +131,7 @@ int blkcache_read(int iftype, int dev, * blkcache_fill() - make data read from a block device available * to the block cache * - * @param iftype - IF_TYPE_x for type of device + * @param iftype - uclass_id_x for type of device * @param dev - device index of particular type * @param start - starting block number * @param blkcnt - number of blocks available @@ -147,7 +147,7 @@ void blkcache_fill(int iftype, int dev, * blkcache_invalidate() - discard the cache for a set of blocks * because of a write or device (re)initialization. * - * @param iftype - IF_TYPE_x for type of device + * @param iftype - uclass_id_x for type of device * @param dev - device index of particular type */ void blkcache_invalidate(int iftype, int dev); @@ -279,22 +279,22 @@ unsigned long blk_derase(struct blk_desc *block_dev, lbaint_t start, * This function does not activate the device. The device will be returned * whether or not it is activated. * - * @if_type: Interface type (enum uclass_id_t) + * @uclass_id: Interface type (enum uclass_id_t) * @devnum: Device number (specific to each interface type) * @devp: the device, if found * Return: 0 if found, -ENODEV if no device found, or other -ve error value */ -int blk_find_device(int if_type, int devnum, struct udevice **devp); +int blk_find_device(int uclass_id, int devnum, struct udevice **devp); /** * blk_get_device() - Find and probe a block device ready for use * - * @if_type: Interface type (enum uclass_id_t) + * @uclass_id: Interface type (enum uclass_id_t) * @devnum: Device number (specific to each interface type) * @devp: the device, if found * Return: 0 if found, -ENODEV if no device found, or other -ve error value */ -int blk_get_device(int if_type, int devnum, struct udevice **devp); +int blk_get_device(int uclass_id, int devnum, struct udevice **devp); /** * blk_first_device() - Find the first device for a given interface @@ -305,7 +305,7 @@ int blk_get_device(int if_type, int devnum, struct udevice **devp); * @devp: the device, if found * Return: 0 if found, -ENODEV if no device, or other -ve error value */ -int blk_first_device(int if_type, struct udevice **devp); +int blk_first_device(int uclass_id, struct udevice **devp); /** * blk_next_device() - Find the next device for a given interface @@ -327,7 +327,7 @@ int blk_next_device(struct udevice **devp); * @parent: Parent of the new device * @drv_name: Driver name to use for the block device * @name: Name for the device - * @if_type: Interface type (enum uclass_id_t) + * @uclass_id: Interface type (enum uclass_id_t) * @devnum: Device number, specific to the interface type, or -1 to * allocate the next available number * @blksz: Block size of the device in bytes (typically 512) @@ -335,7 +335,7 @@ int blk_next_device(struct udevice **devp); * @devp: the new device (which has not been probed) */ int blk_create_device(struct udevice *parent, const char *drv_name, - const char *name, int if_type, int devnum, int blksz, + const char *name, int uclass_id, int devnum, int blksz, lbaint_t lba, struct udevice **devp); /** @@ -344,7 +344,7 @@ int blk_create_device(struct udevice *parent, const char *drv_name, * @parent: Parent of the new device * @drv_name: Driver name to use for the block device * @name: Name for the device (parent name is prepended) - * @if_type: Interface type (enum uclass_id_t) + * @uclass_id: Interface type (enum uclass_id_t) * @devnum: Device number, specific to the interface type, or -1 to * allocate the next available number * @blksz: Block size of the device in bytes (typically 512) @@ -352,7 +352,7 @@ int blk_create_device(struct udevice *parent, const char *drv_name, * @devp: the new device (which has not been probed) */ int blk_create_devicef(struct udevice *parent, const char *drv_name, - const char *name, int if_type, int devnum, int blksz, + const char *name, int uclass_id, int devnum, int blksz, lbaint_t lba, struct udevice **devp); /** @@ -372,33 +372,33 @@ int blk_probe_or_unbind(struct udevice *dev); * * The devices are removed and then unbound. * - * @if_type: Interface type to unbind + * @uclass_id: Interface type to unbind * Return: 0 if OK, -ve on error */ -int blk_unbind_all(int if_type); +int blk_unbind_all(int uclass_id); /** * blk_find_max_devnum() - find the maximum device number for an interface type * - * Finds the last allocated device number for an interface type @if_type. The + * Finds the last allocated device number for an interface type @uclass_id. The * next number is safe to use for a newly allocated device. * - * @if_type: Interface type to scan + * @uclass_id: Interface type to scan * Return: maximum device number found, or -ENODEV if none, or other -ve on * error */ -int blk_find_max_devnum(enum uclass_id if_type); +int blk_find_max_devnum(enum uclass_id uclass_id); /** * blk_next_free_devnum() - get the next device number for an interface type * * Finds the next number that is safe to use for a newly allocated device for - * an interface type @if_type. + * an interface type @uclass_id. * - * @if_type: Interface type to scan + * @uclass_id: Interface type to scan * Return: next device number safe to use, or -ve on error */ -int blk_next_free_devnum(enum uclass_id if_type); +int blk_next_free_devnum(enum uclass_id uclass_id); /** * blk_select_hwpart() - select a hardware partition @@ -447,7 +447,7 @@ static inline ulong blk_dread(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt, void *buffer) { ulong blks_read; - if (blkcache_read(block_dev->if_type, block_dev->devnum, + if (blkcache_read(block_dev->uclass_id, block_dev->devnum, start, blkcnt, block_dev->blksz, buffer)) return blkcnt; @@ -458,7 +458,7 @@ static inline ulong blk_dread(struct blk_desc *block_dev, lbaint_t start, */ blks_read = block_dev->block_read(block_dev, start, blkcnt, buffer); if (blks_read == blkcnt) - blkcache_fill(block_dev->if_type, block_dev->devnum, + blkcache_fill(block_dev->uclass_id, block_dev->devnum, start, blkcnt, block_dev->blksz, buffer); return blks_read; @@ -467,14 +467,14 @@ static inline ulong blk_dread(struct blk_desc *block_dev, lbaint_t start, static inline ulong blk_dwrite(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt, const void *buffer) { - blkcache_invalidate(block_dev->if_type, block_dev->devnum); + blkcache_invalidate(block_dev->uclass_id, block_dev->devnum); return block_dev->block_write(block_dev, start, blkcnt, buffer); } static inline ulong blk_derase(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt) { - blkcache_invalidate(block_dev->if_type, block_dev->devnum); + blkcache_invalidate(block_dev->uclass_id, block_dev->devnum); return block_dev->block_erase(block_dev, start, blkcnt); } @@ -485,15 +485,15 @@ static inline ulong blk_derase(struct blk_desc *block_dev, lbaint_t start, * driver should be provided using U_BOOT_LEGACY_BLK() for each interface * type that is to be supported. * - * @if_typename: Interface type name - * @if_type: Interface type + * @uclass_idname: Interface type name + * @uclass_id: Interface type * @max_devs: Maximum number of devices supported * @desc: Pointer to list of devices for this interface type, * or NULL to use @get_dev() instead */ struct blk_driver { - const char *if_typename; - enum uclass_id if_type; + const char *uclass_idname; + enum uclass_id uclass_id; int max_devs; struct blk_desc *desc; /** @@ -540,33 +540,33 @@ struct blk_driver { #define U_BOOT_LEGACY_BLK(__name) \ ll_entry_declare(struct blk_driver, __name, blk_driver) -struct blk_driver *blk_driver_lookup_type(int if_type); +struct blk_driver *blk_driver_lookup_type(int uclass_id); #endif /* !CONFIG_BLK */ /** - * blk_get_devnum_by_typename() - Get a block device by type and number + * blk_get_devnum_by_uclass_idname() - Get a block device by type and number * * This looks through the available block devices of the given type, returning * the one with the given @devnum. * - * @if_type: Block device type + * @uclass_id: Block device type * @devnum: Device number * Return: point to block device descriptor, or NULL if not found */ -struct blk_desc *blk_get_devnum_by_type(enum uclass_id if_type, int devnum); +struct blk_desc *blk_get_devnum_by_uclass_id(enum uclass_id uclass_id, int devnum); /** - * blk_get_devnum_by_type() - Get a block device by type name, and number + * blk_get_devnum_by_uclass_id() - Get a block device by type name, and number * - * This looks up the block device type based on @if_typename, then calls - * blk_get_devnum_by_type(). + * This looks up the block device type based on @uclass_idname, then calls + * blk_get_devnum_by_uclass_id(). * - * @if_typename: Block device type name + * @uclass_idname: Block device type name * @devnum: Device number * Return: point to block device descriptor, or NULL if not found */ -struct blk_desc *blk_get_devnum_by_typename(const char *if_typename, +struct blk_desc *blk_get_devnum_by_uclass_idname(const char *uclass_idname, int devnum); /** @@ -585,34 +585,34 @@ int blk_dselect_hwpart(struct blk_desc *desc, int hwpart); /** * blk_list_part() - list the partitions for block devices of a given type * - * This looks up the partition type for each block device of type @if_type, + * This looks up the partition type for each block device of type @uclass_id, * then displays a list of partitions. * - * @if_type: Block device type + * @uclass_id: Block device type * Return: 0 if OK, -ENODEV if there is none of that type */ -int blk_list_part(enum uclass_id if_type); +int blk_list_part(enum uclass_id uclass_id); /** * blk_list_devices() - list the block devices of a given type * - * This lists each block device of the type @if_type, showing the capacity + * This lists each block device of the type @uclass_id, showing the capacity * as well as type-specific information. * - * @if_type: Block device type + * @uclass_id: Block device type */ -void blk_list_devices(enum uclass_id if_type); +void blk_list_devices(enum uclass_id uclass_id); /** * blk_show_device() - show information about a given block device * * This shows the block device capacity as well as type-specific information. * - * @if_type: Block device type + * @uclass_id: Block device type * @devnum: Device number * Return: 0 if OK, -ENODEV for invalid device number */ -int blk_show_device(enum uclass_id if_type, int devnum); +int blk_show_device(enum uclass_id uclass_id, int devnum); /** * blk_print_device_num() - show information about a given block device @@ -620,45 +620,45 @@ int blk_show_device(enum uclass_id if_type, int devnum); * This is similar to blk_show_device() but returns an error if the block * device type is unknown. * - * @if_type: Block device type + * @uclass_id: Block device type * @devnum: Device number * Return: 0 if OK, -ENODEV for invalid device number, -ENOENT if the block * device is not connected */ -int blk_print_device_num(enum uclass_id if_type, int devnum); +int blk_print_device_num(enum uclass_id uclass_id, int devnum); /** * blk_print_part_devnum() - print the partition information for a device * - * @if_type: Block device type + * @uclass_id: Block device type * @devnum: Device number * Return: 0 if OK, -ENOENT if the block device is not connected, -ENOSYS if * the interface type is not supported, other -ve on other error */ -int blk_print_part_devnum(enum uclass_id if_type, int devnum); +int blk_print_part_devnum(enum uclass_id uclass_id, int devnum); /** * blk_read_devnum() - read blocks from a device * - * @if_type: Block device type + * @uclass_id: Block device type * @devnum: Device number * @blkcnt: Number of blocks to read * @buffer: Address to write data to * Return: number of blocks read, or -ve error number on error */ -ulong blk_read_devnum(enum uclass_id if_type, int devnum, lbaint_t start, +ulong blk_read_devnum(enum uclass_id uclass_id, int devnum, lbaint_t start, lbaint_t blkcnt, void *buffer); /** * blk_write_devnum() - write blocks to a device * - * @if_type: Block device type + * @uclass_id: Block device type * @devnum: Device number * @blkcnt: Number of blocks to write * @buffer: Address to read data from * Return: number of blocks written, or -ve error number on error */ -ulong blk_write_devnum(enum uclass_id if_type, int devnum, lbaint_t start, +ulong blk_write_devnum(enum uclass_id uclass_id, int devnum, lbaint_t start, lbaint_t blkcnt, const void *buffer); /** @@ -667,31 +667,31 @@ ulong blk_write_devnum(enum uclass_id if_type, int devnum, lbaint_t start, * This is similar to blk_dselect_hwpart() but it looks up the interface and * device number. * - * @if_type: Block device type + * @uclass_id: Block device type * @devnum: Device number * @hwpart: Partition number to select * Return: 0 if OK, -ve on error */ -int blk_select_hwpart_devnum(enum uclass_id if_type, int devnum, int hwpart); +int blk_select_hwpart_devnum(enum uclass_id uclass_id, int devnum, int hwpart); /** - * blk_get_if_type_name() - Get the name of an interface type + * blk_get_uclass_name() - Get the name of an interface type * - * @if_type: Interface type to check + * @uclass_id: Interface type to check * Return: name of interface, or NULL if none */ -const char *blk_get_if_type_name(enum uclass_id if_type); +const char *blk_get_uclass_name(enum uclass_id uclass_id); /** * blk_common_cmd() - handle common commands with block devices * * @args: Number of arguments to the command (argv[0] is the command itself) * @argv: Command arguments - * @if_type: Interface type + * @uclass_id: Interface type * @cur_devnump: Current device number for this interface type * Return: 0 if OK, CMD_RET_ERROR on error */ -int blk_common_cmd(int argc, char *const argv[], enum uclass_id if_type, +int blk_common_cmd(int argc, char *const argv[], enum uclass_id uclass_id, int *cur_devnump); enum blk_flag_t { diff --git a/include/configs/mt7981.h b/include/configs/mt7981.h new file mode 100644 index 0000000000..01ad309608 --- /dev/null +++ b/include/configs/mt7981.h @@ -0,0 +1,25 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Configuration for MediaTek MT7981 SoC + * + * Copyright (C) 2022 MediaTek Inc. + * Author: Sam Shih <sam.shih@mediatek.com> + */ + +#ifndef __MT7981_H +#define __MT7981_H + +#include <linux/sizes.h> + +#define CONFIG_SYS_NONCACHED_MEMORY SZ_1M + +/* Uboot definition */ +#define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_TEXT_BASE + +/* SPL -> Uboot */ +#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE + +/* DRAM */ +#define CONFIG_SYS_SDRAM_BASE 0x40000000 + +#endif diff --git a/include/configs/mt7986.h b/include/configs/mt7986.h new file mode 100644 index 0000000000..ccdd6abdb1 --- /dev/null +++ b/include/configs/mt7986.h @@ -0,0 +1,25 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Configuration for MediaTek MT7986 SoC + * + * Copyright (C) 2022 MediaTek Inc. + * Author: Sam Shih <sam.shih@mediatek.com> + */ + +#ifndef __MT7986_H +#define __MT7986_H + +#include <linux/sizes.h> + +#define CONFIG_SYS_NONCACHED_MEMORY SZ_1M + +/* Uboot definition */ +#define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_TEXT_BASE + +/* SPL -> Uboot */ +#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE + +/* DRAM */ +#define CONFIG_SYS_SDRAM_BASE 0x40000000 + +#endif diff --git a/include/dt-bindings/clock/mt7981-clk.h b/include/dt-bindings/clock/mt7981-clk.h new file mode 100644 index 0000000000..e24c759e49 --- /dev/null +++ b/include/dt-bindings/clock/mt7981-clk.h @@ -0,0 +1,267 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2022 MediaTek Inc. All rights reserved. + * + * Author: Sam Shih <sam.shih@mediatek.com> + */ + +#ifndef _DT_BINDINGS_CLK_MT7981_H +#define _DT_BINDINGS_CLK_MT7981_H + +/* INFRACFG */ + +#define CK_INFRA_CK_F26M 0 +#define CK_INFRA_UART 1 +#define CK_INFRA_ISPI0 2 +#define CK_INFRA_I2C 3 +#define CK_INFRA_ISPI1 4 +#define CK_INFRA_PWM 5 +#define CK_INFRA_66M_MCK 6 +#define CK_INFRA_CK_F32K 7 +#define CK_INFRA_PCIE_CK 8 +#define CK_INFRA_PWM_BCK 9 +#define CK_INFRA_PWM_CK1 10 +#define CK_INFRA_PWM_CK2 11 +#define CK_INFRA_133M_HCK 12 +#define CK_INFRA_66M_PHCK 13 +#define CK_INFRA_FAUD_L_CK 14 +#define CK_INFRA_FAUD_AUD_CK 15 +#define CK_INFRA_FAUD_EG2_CK 16 +#define CK_INFRA_I2CS_CK 17 +#define CK_INFRA_MUX_UART0 18 +#define CK_INFRA_MUX_UART1 19 +#define CK_INFRA_MUX_UART2 20 +#define CK_INFRA_NFI_CK 21 +#define CK_INFRA_SPINFI_CK 22 +#define CK_INFRA_MUX_SPI0 23 +#define CK_INFRA_MUX_SPI1 24 +#define CK_INFRA_MUX_SPI2 25 +#define CK_INFRA_RTC_32K 26 +#define CK_INFRA_FMSDC_CK 27 +#define CK_INFRA_FMSDC_HCK_CK 28 +#define CK_INFRA_PERI_133M 29 +#define CK_INFRA_133M_PHCK 30 +#define CK_INFRA_USB_SYS_CK 31 +#define CK_INFRA_USB_CK 32 +#define CK_INFRA_USB_XHCI_CK 33 +#define CK_INFRA_PCIE_GFMUX_TL_O_PRE 34 +#define CK_INFRA_F26M_CK0 35 +#define CK_INFRA_133M_MCK 36 +#define CLK_INFRA_NR_CLK 37 + +/* TOPCKGEN */ + +#define CK_TOP_CB_CKSQ_40M 0 +#define CK_TOP_CB_M_416M 1 +#define CK_TOP_CB_M_D2 2 +#define CK_TOP_CB_M_D3 3 +#define CK_TOP_M_D3_D2 4 +#define CK_TOP_CB_M_D4 5 +#define CK_TOP_CB_M_D8 6 +#define CK_TOP_M_D8_D2 7 +#define CK_TOP_CB_MM_720M 8 +#define CK_TOP_CB_MM_D2 9 +#define CK_TOP_CB_MM_D3 10 +#define CK_TOP_CB_MM_D3_D5 11 +#define CK_TOP_CB_MM_D4 12 +#define CK_TOP_CB_MM_D6 13 +#define CK_TOP_MM_D6_D2 14 +#define CK_TOP_CB_MM_D8 15 +#define CK_TOP_CB_APLL2_196M 16 +#define CK_TOP_APLL2_D2 17 +#define CK_TOP_APLL2_D4 18 +#define CK_TOP_NET1_2500M 19 +#define CK_TOP_CB_NET1_D4 20 +#define CK_TOP_CB_NET1_D5 21 +#define CK_TOP_NET1_D5_D2 22 +#define CK_TOP_NET1_D5_D4 23 +#define CK_TOP_CB_NET1_D8 24 +#define CK_TOP_NET1_D8_D2 25 +#define CK_TOP_NET1_D8_D4 26 +#define CK_TOP_CB_NET2_800M 27 +#define CK_TOP_CB_NET2_D2 28 +#define CK_TOP_CB_NET2_D4 29 +#define CK_TOP_NET2_D4_D2 30 +#define CK_TOP_NET2_D4_D4 31 +#define CK_TOP_CB_NET2_D6 32 +#define CK_TOP_CB_WEDMCU_208M 33 +#define CK_TOP_CB_SGM_325M 34 +#define CK_TOP_CKSQ_40M_D2 35 +#define CK_TOP_CB_RTC_32K 36 +#define CK_TOP_CB_RTC_32P7K 37 +#define CK_TOP_USB_TX250M 38 +#define CK_TOP_FAUD 39 +#define CK_TOP_NFI1X 40 +#define CK_TOP_USB_EQ_RX250M 41 +#define CK_TOP_USB_CDR_CK 42 +#define CK_TOP_USB_LN0_CK 43 +#define CK_TOP_SPINFI_BCK 44 +#define CK_TOP_SPI 45 +#define CK_TOP_SPIM_MST 46 +#define CK_TOP_UART_BCK 47 +#define CK_TOP_PWM_BCK 48 +#define CK_TOP_I2C_BCK 49 +#define CK_TOP_PEXTP_TL 50 +#define CK_TOP_EMMC_208M 51 +#define CK_TOP_EMMC_400M 52 +#define CK_TOP_DRAMC_REF 53 +#define CK_TOP_DRAMC_MD32 54 +#define CK_TOP_SYSAXI 55 +#define CK_TOP_SYSAPB 56 +#define CK_TOP_ARM_DB_MAIN 57 +#define CK_TOP_AP2CNN_HOST 58 +#define CK_TOP_NETSYS 59 +#define CK_TOP_NETSYS_500M 60 +#define CK_TOP_NETSYS_WED_MCU 61 +#define CK_TOP_NETSYS_2X 62 +#define CK_TOP_SGM_325M 63 +#define CK_TOP_SGM_REG 64 +#define CK_TOP_F26M 65 +#define CK_TOP_EIP97B 66 +#define CK_TOP_USB3_PHY 67 +#define CK_TOP_AUD 68 +#define CK_TOP_A1SYS 69 +#define CK_TOP_AUD_L 70 +#define CK_TOP_A_TUNER 71 +#define CK_TOP_U2U3_REF 72 +#define CK_TOP_U2U3_SYS 73 +#define CK_TOP_U2U3_XHCI 74 +#define CK_TOP_USB_FRMCNT 75 +#define CK_TOP_NFI1X_SEL 76 +#define CK_TOP_SPINFI_SEL 77 +#define CK_TOP_SPI_SEL 78 +#define CK_TOP_SPIM_MST_SEL 79 +#define CK_TOP_UART_SEL 80 +#define CK_TOP_PWM_SEL 81 +#define CK_TOP_I2C_SEL 82 +#define CK_TOP_PEXTP_TL_SEL 83 +#define CK_TOP_EMMC_208M_SEL 84 +#define CK_TOP_EMMC_400M_SEL 85 +#define CK_TOP_F26M_SEL 86 +#define CK_TOP_DRAMC_SEL 87 +#define CK_TOP_DRAMC_MD32_SEL 88 +#define CK_TOP_SYSAXI_SEL 89 +#define CK_TOP_SYSAPB_SEL 90 +#define CK_TOP_ARM_DB_MAIN_SEL 91 +#define CK_TOP_AP2CNN_HOST_SEL 92 +#define CK_TOP_NETSYS_SEL 93 +#define CK_TOP_NETSYS_500M_SEL 94 +#define CK_TOP_NETSYS_MCU_SEL 95 +#define CK_TOP_NETSYS_2X_SEL 96 +#define CK_TOP_SGM_325M_SEL 97 +#define CK_TOP_SGM_REG_SEL 98 +#define CK_TOP_EIP97B_SEL 99 +#define CK_TOP_USB3_PHY_SEL 100 +#define CK_TOP_AUD_SEL 101 +#define CK_TOP_A1SYS_SEL 102 +#define CK_TOP_AUD_L_SEL 103 +#define CK_TOP_A_TUNER_SEL 104 +#define CK_TOP_U2U3_SEL 105 +#define CK_TOP_U2U3_SYS_SEL 106 +#define CK_TOP_U2U3_XHCI_SEL 107 +#define CK_TOP_USB_FRMCNT_SEL 108 +#define CLK_TOP_NR_CLK 109 + +/* + * INFRACFG_AO + * clock muxes need to be append to infracfg domain, and clock gates + * need to be keep in infracgh_ao domain + */ +#define INFRACFG_AO_OFFSET 10 + +#define CK_INFRA_UART0_SEL (0 + CLK_INFRA_NR_CLK) +#define CK_INFRA_UART1_SEL (1 + CLK_INFRA_NR_CLK) +#define CK_INFRA_UART2_SEL (2 + CLK_INFRA_NR_CLK) +#define CK_INFRA_SPI0_SEL (3 + CLK_INFRA_NR_CLK) +#define CK_INFRA_SPI1_SEL (4 + CLK_INFRA_NR_CLK) +#define CK_INFRA_SPI2_SEL (5 + CLK_INFRA_NR_CLK) +#define CK_INFRA_PWM1_SEL (6 + CLK_INFRA_NR_CLK) +#define CK_INFRA_PWM2_SEL (7 + CLK_INFRA_NR_CLK) +#define CK_INFRA_PWM_BSEL (8 + CLK_INFRA_NR_CLK) +#define CK_INFRA_PCIE_SEL (9 + CLK_INFRA_NR_CLK) +#define CK_INFRA_GPT_STA (10 - INFRACFG_AO_OFFSET) +#define CK_INFRA_PWM_HCK (11 - INFRACFG_AO_OFFSET) +#define CK_INFRA_PWM_STA (12 - INFRACFG_AO_OFFSET) +#define CK_INFRA_PWM1_CK (13 - INFRACFG_AO_OFFSET) +#define CK_INFRA_PWM2_CK (14 - INFRACFG_AO_OFFSET) +#define CK_INFRA_CQ_DMA_CK (15 - INFRACFG_AO_OFFSET) +#define CK_INFRA_AUD_BUS_CK (16 - INFRACFG_AO_OFFSET) +#define CK_INFRA_AUD_26M_CK (17 - INFRACFG_AO_OFFSET) +#define CK_INFRA_AUD_L_CK (18 - INFRACFG_AO_OFFSET) +#define CK_INFRA_AUD_AUD_CK (19 - INFRACFG_AO_OFFSET) +#define CK_INFRA_AUD_EG2_CK (20 - INFRACFG_AO_OFFSET) +#define CK_INFRA_DRAMC_26M_CK (21 - INFRACFG_AO_OFFSET) +#define CK_INFRA_DBG_CK (22 - INFRACFG_AO_OFFSET) +#define CK_INFRA_AP_DMA_CK (23 - INFRACFG_AO_OFFSET) +#define CK_INFRA_SEJ_CK (24 - INFRACFG_AO_OFFSET) +#define CK_INFRA_SEJ_13M_CK (25 - INFRACFG_AO_OFFSET) +#define CK_INFRA_THERM_CK (26 - INFRACFG_AO_OFFSET) +#define CK_INFRA_I2CO_CK (27 - INFRACFG_AO_OFFSET) +#define CK_INFRA_UART0_CK (28 - INFRACFG_AO_OFFSET) +#define CK_INFRA_UART1_CK (29 - INFRACFG_AO_OFFSET) +#define CK_INFRA_UART2_CK (30 - INFRACFG_AO_OFFSET) +#define CK_INFRA_SPI2_CK (31 - INFRACFG_AO_OFFSET) +#define CK_INFRA_SPI2_HCK_CK (32 - INFRACFG_AO_OFFSET) +#define CK_INFRA_NFI1_CK (33 - INFRACFG_AO_OFFSET) +#define CK_INFRA_SPINFI1_CK (34 - INFRACFG_AO_OFFSET) +#define CK_INFRA_NFI_HCK_CK (35 - INFRACFG_AO_OFFSET) +#define CK_INFRA_SPI0_CK (36 - INFRACFG_AO_OFFSET) +#define CK_INFRA_SPI1_CK (37 - INFRACFG_AO_OFFSET) +#define CK_INFRA_SPI0_HCK_CK (38 - INFRACFG_AO_OFFSET) +#define CK_INFRA_SPI1_HCK_CK (39 - INFRACFG_AO_OFFSET) +#define CK_INFRA_FRTC_CK (40 - INFRACFG_AO_OFFSET) +#define CK_INFRA_MSDC_CK (41 - INFRACFG_AO_OFFSET) +#define CK_INFRA_MSDC_HCK_CK (42 - INFRACFG_AO_OFFSET) +#define CK_INFRA_MSDC_133M_CK (43 - INFRACFG_AO_OFFSET) +#define CK_INFRA_MSDC_66M_CK (44 - INFRACFG_AO_OFFSET) +#define CK_INFRA_ADC_26M_CK (45 - INFRACFG_AO_OFFSET) +#define CK_INFRA_ADC_FRC_CK (46 - INFRACFG_AO_OFFSET) +#define CK_INFRA_FBIST2FPC_CK (47 - INFRACFG_AO_OFFSET) +#define CK_INFRA_I2C_MCK_CK (48 - INFRACFG_AO_OFFSET) +#define CK_INFRA_I2C_PCK_CK (49 - INFRACFG_AO_OFFSET) +#define CK_INFRA_IUSB_133_CK (50 - INFRACFG_AO_OFFSET) +#define CK_INFRA_IUSB_66M_CK (51 - INFRACFG_AO_OFFSET) +#define CK_INFRA_IUSB_SYS_CK (52 - INFRACFG_AO_OFFSET) +#define CK_INFRA_IUSB_CK (53 - INFRACFG_AO_OFFSET) +#define CK_INFRA_IPCIE_CK (54 - INFRACFG_AO_OFFSET) +#define CK_INFRA_IPCIER_CK (55 - INFRACFG_AO_OFFSET) +#define CK_INFRA_IPCIEB_CK (56 - INFRACFG_AO_OFFSET) +#define CLK_INFRA_AO_NR_CLK (57 - INFRACFG_AO_OFFSET) + +/* APMIXEDSYS */ + +#define CK_APMIXED_ARMPLL 0 +#define CK_APMIXED_NET2PLL 1 +#define CK_APMIXED_MMPLL 2 +#define CK_APMIXED_SGMPLL 3 +#define CK_APMIXED_WEDMCUPLL 4 +#define CK_APMIXED_NET1PLL 5 +#define CK_APMIXED_MPLL 6 +#define CK_APMIXED_APLL2 7 +#define CLK_APMIXED_NR_CLK 8 + +/* SGMIISYS_0 */ + +#define CK_SGM0_TX_EN 0 +#define CK_SGM0_RX_EN 1 +#define CK_SGM0_CK0_EN 2 +#define CK_SGM0_CDR_CK0_EN 3 +#define CLK_SGMII0_NR_CLK 4 + +/* SGMIISYS_1 */ + +#define CK_SGM1_TX_EN 0 +#define CK_SGM1_RX_EN 1 +#define CK_SGM1_CK1_EN 2 +#define CK_SGM1_CDR_CK1_EN 3 +#define CLK_SGMII1_NR_CLK 4 + +/* ETHSYS */ + +#define CK_ETH_FE_EN 0 +#define CK_ETH_GP2_EN 1 +#define CK_ETH_GP1_EN 2 +#define CK_ETH_WOCPU0_EN 3 +#define CLK_ETH_NR_CLK 4 + +#endif /* _DT_BINDINGS_CLK_MT7981_H */ diff --git a/include/dt-bindings/clock/mt7986-clk.h b/include/dt-bindings/clock/mt7986-clk.h new file mode 100644 index 0000000000..820f863183 --- /dev/null +++ b/include/dt-bindings/clock/mt7986-clk.h @@ -0,0 +1,249 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2022 MediaTek Inc. All rights reserved. + * + * Author: Sam Shih <sam.shih@mediatek.com> + */ + +#ifndef _DT_BINDINGS_CLK_MT7986_H +#define _DT_BINDINGS_CLK_MT7986_H + +/* INFRACFG */ + +#define CK_INFRA_CK_F26M 0 +#define CK_INFRA_UART 1 +#define CK_INFRA_ISPI0 2 +#define CK_INFRA_I2C 3 +#define CK_INFRA_ISPI1 4 +#define CK_INFRA_PWM 5 +#define CK_INFRA_66M_MCK 6 +#define CK_INFRA_CK_F32K 7 +#define CK_INFRA_PCIE_CK 8 +#define CK_INFRA_PWM_BCK 9 +#define CK_INFRA_PWM_CK1 10 +#define CK_INFRA_PWM_CK2 11 +#define CK_INFRA_133M_HCK 12 +#define CK_INFRA_EIP_CK 13 +#define CK_INFRA_66M_PHCK 14 +#define CK_INFRA_FAUD_L_CK 15 +#define CK_INFRA_FAUD_AUD_CK 17 +#define CK_INFRA_FAUD_EG2_CK 17 +#define CK_INFRA_I2CS_CK 18 +#define CK_INFRA_MUX_UART0 19 +#define CK_INFRA_MUX_UART1 20 +#define CK_INFRA_MUX_UART2 21 +#define CK_INFRA_NFI_CK 22 +#define CK_INFRA_SPINFI_CK 23 +#define CK_INFRA_MUX_SPI0 24 +#define CK_INFRA_MUX_SPI1 25 +#define CK_INFRA_RTC_32K 26 +#define CK_INFRA_FMSDC_CK 27 +#define CK_INFRA_FMSDC_HCK_CK 28 +#define CK_INFRA_PERI_133M 29 +#define CK_INFRA_133M_PHCK 30 +#define CK_INFRA_USB_SYS_CK 31 +#define CK_INFRA_USB_CK 32 +#define CK_INFRA_USB_XHCI_CK 33 +#define CK_INFRA_PCIE_GFMUX_TL_O_PRE 34 +#define CK_INFRA_F26M_CK0 35 +#define CK_INFRA_HD_133M 36 +#define CLK_INFRA_NR_CLK 37 + +/* TOPCKGEN */ + +#define CK_TOP_CB_CKSQ_40M 0 +#define CK_TOP_CB_M_416M 1 +#define CK_TOP_CB_M_D2 2 +#define CK_TOP_CB_M_D4 3 +#define CK_TOP_CB_M_D8 4 +#define CK_TOP_M_D8_D2 5 +#define CK_TOP_M_D3_D2 6 +#define CK_TOP_CB_MM_D2 7 +#define CK_TOP_CB_MM_D4 8 +#define CK_TOP_CB_MM_D8 9 +#define CK_TOP_MM_D8_D2 10 +#define CK_TOP_MM_D3_D8 11 +#define CK_TOP_CB_U2_PHYD_CK 12 +#define CK_TOP_CB_APLL2_196M 13 +#define CK_TOP_APLL2_D4 14 +#define CK_TOP_CB_NET1_D4 15 +#define CK_TOP_CB_NET1_D5 16 +#define CK_TOP_NET1_D5_D2 17 +#define CK_TOP_NET1_D5_D4 18 +#define CK_TOP_NET1_D8_D2 19 +#define CK_TOP_NET1_D8_D4 20 +#define CK_TOP_CB_NET2_800M 21 +#define CK_TOP_CB_NET2_D4 22 +#define CK_TOP_NET2_D4_D2 23 +#define CK_TOP_NET2_D3_D2 24 +#define CK_TOP_CB_WEDMCU_760M 25 +#define CK_TOP_WEDMCU_D5_D2 26 +#define CK_TOP_CB_SGM_325M 27 +#define CK_TOP_CB_CKSQ_40M_D2 28 +#define CK_TOP_CB_RTC_32K 29 +#define CK_TOP_CB_RTC_32P7K 30 +#define CK_TOP_NFI1X 31 +#define CK_TOP_USB_EQ_RX250M 32 +#define CK_TOP_USB_TX250M 33 +#define CK_TOP_USB_LN0_CK 34 +#define CK_TOP_USB_CDR_CK 35 +#define CK_TOP_SPINFI_BCK 36 +#define CK_TOP_I2C_BCK 37 +#define CK_TOP_PEXTP_TL 38 +#define CK_TOP_EMMC_250M 39 +#define CK_TOP_EMMC_416M 40 +#define CK_TOP_F_26M_ADC_CK 41 +#define CK_TOP_SYSAXI 42 +#define CK_TOP_NETSYS_WED_MCU 43 +#define CK_TOP_NETSYS_2X 44 +#define CK_TOP_SGM_325M 45 +#define CK_TOP_A1SYS 46 +#define CK_TOP_EIP_B 47 +#define CK_TOP_F26M 48 +#define CK_TOP_AUD_L 49 +#define CK_TOP_A_TUNER 50 +#define CK_TOP_U2U3_REF 51 +#define CK_TOP_U2U3_SYS 52 +#define CK_TOP_U2U3_XHCI 53 +#define CK_TOP_AP2CNN_HOST 54 +#define CK_TOP_NFI1X_SEL 55 +#define CK_TOP_SPINFI_SEL 56 +#define CK_TOP_SPI_SEL 57 +#define CK_TOP_SPIM_MST_SEL 58 +#define CK_TOP_UART_SEL 59 +#define CK_TOP_PWM_SEL 60 +#define CK_TOP_I2C_SEL 61 +#define CK_TOP_PEXTP_TL_SEL 62 +#define CK_TOP_EMMC_250M_SEL 63 +#define CK_TOP_EMMC_416M_SEL 64 +#define CK_TOP_F_26M_ADC_SEL 65 +#define CK_TOP_DRAMC_SEL 66 +#define CK_TOP_DRAMC_MD32_SEL 67 +#define CK_TOP_SYSAXI_SEL 68 +#define CK_TOP_SYSAPB_SEL 69 +#define CK_TOP_ARM_DB_MAIN_SEL 70 +#define CK_TOP_ARM_DB_JTSEL 71 +#define CK_TOP_NETSYS_SEL 72 +#define CK_TOP_NETSYS_500M_SEL 73 +#define CK_TOP_NETSYS_MCU_SEL 74 +#define CK_TOP_NETSYS_2X_SEL 75 +#define CK_TOP_SGM_325M_SEL 76 +#define CK_TOP_SGM_REG_SEL 77 +#define CK_TOP_A1SYS_SEL 78 +#define CK_TOP_CONN_MCUSYS_SEL 79 +#define CK_TOP_EIP_B_SEL 80 +#define CK_TOP_PCIE_PHY_SEL 81 +#define CK_TOP_USB3_PHY_SEL 82 +#define CK_TOP_F26M_SEL 83 +#define CK_TOP_AUD_L_SEL 84 +#define CK_TOP_A_TUNER_SEL 85 +#define CK_TOP_U2U3_SEL 86 +#define CK_TOP_U2U3_SYS_SEL 87 +#define CK_TOP_U2U3_XHCI_SEL 88 +#define CK_TOP_DA_U2_REFSEL 89 +#define CK_TOP_DA_U2_CK_1P_SEL 90 +#define CK_TOP_AP2CNN_HOST_SEL 91 +#define CLK_TOP_NR_CLK 92 + +/* + * INFRACFG_AO + * clock muxes need to be append to infracfg domain, and clock gates + * need to be keep in infracgh_ao domain + */ + +#define CK_INFRA_UART0_SEL (0 + CLK_INFRA_NR_CLK) +#define CK_INFRA_UART1_SEL (1 + CLK_INFRA_NR_CLK) +#define CK_INFRA_UART2_SEL (2 + CLK_INFRA_NR_CLK) +#define CK_INFRA_SPI0_SEL (3 + CLK_INFRA_NR_CLK) +#define CK_INFRA_SPI1_SEL (4 + CLK_INFRA_NR_CLK) +#define CK_INFRA_PWM1_SEL (5 + CLK_INFRA_NR_CLK) +#define CK_INFRA_PWM2_SEL (6 + CLK_INFRA_NR_CLK) +#define CK_INFRA_PWM_BSEL (7 + CLK_INFRA_NR_CLK) +#define CK_INFRA_PCIE_SEL (8 + CLK_INFRA_NR_CLK) +#define CK_INFRA_GPT_STA 0 +#define CK_INFRA_PWM_HCK 1 +#define CK_INFRA_PWM_STA 2 +#define CK_INFRA_PWM1_CK 3 +#define CK_INFRA_PWM2_CK 4 +#define CK_INFRA_CQ_DMA_CK 5 +#define CK_INFRA_EIP97_CK 6 +#define CK_INFRA_AUD_BUS_CK 7 +#define CK_INFRA_AUD_26M_CK 8 +#define CK_INFRA_AUD_L_CK 9 +#define CK_INFRA_AUD_AUD_CK 10 +#define CK_INFRA_AUD_EG2_CK 11 +#define CK_INFRA_DRAMC_26M_CK 12 +#define CK_INFRA_DBG_CK 13 +#define CK_INFRA_AP_DMA_CK 14 +#define CK_INFRA_SEJ_CK 15 +#define CK_INFRA_SEJ_13M_CK 16 +#define CK_INFRA_THERM_CK 17 +#define CK_INFRA_I2CO_CK 18 +#define CK_INFRA_TRNG_CK 19 +#define CK_INFRA_UART0_CK 20 +#define CK_INFRA_UART1_CK 21 +#define CK_INFRA_UART2_CK 22 +#define CK_INFRA_NFI1_CK 23 +#define CK_INFRA_SPINFI1_CK 24 +#define CK_INFRA_NFI_HCK_CK 25 +#define CK_INFRA_SPI0_CK 26 +#define CK_INFRA_SPI1_CK 27 +#define CK_INFRA_SPI0_HCK_CK 28 +#define CK_INFRA_SPI1_HCK_CK 29 +#define CK_INFRA_FRTC_CK 30 +#define CK_INFRA_MSDC_CK 31 +#define CK_INFRA_MSDC_HCK_CK 32 +#define CK_INFRA_MSDC_133M_CK 33 +#define CK_INFRA_MSDC_66M_CK 34 +#define CK_INFRA_ADC_26M_CK 35 +#define CK_INFRA_ADC_FRC_CK 36 +#define CK_INFRA_FBIST2FPC_CK 37 +#define CK_INFRA_IUSB_133_CK 38 +#define CK_INFRA_IUSB_66M_CK 39 +#define CK_INFRA_IUSB_SYS_CK 40 +#define CK_INFRA_IUSB_CK 41 +#define CK_INFRA_IPCIE_CK 42 +#define CK_INFRA_IPCIER_CK 43 +#define CK_INFRA_IPCIEB_CK 44 +#define CLK_INFRA_AO_NR_CLK 45 + +/* APMIXEDSYS */ + +#define CK_APMIXED_ARMPLL 0 +#define CK_APMIXED_NET2PLL 1 +#define CK_APMIXED_MMPLL 2 +#define CK_APMIXED_SGMPLL 3 +#define CK_APMIXED_WEDMCUPLL 4 +#define CK_APMIXED_NET1PLL 5 +#define CK_APMIXED_MPLL 6 +#define CK_APMIXED_APLL2 7 +#define CLK_APMIXED_NR_CLK 8 + +/* SGMIISYS_0 */ + +#define CK_SGM0_TX_EN 0 +#define CK_SGM0_RX_EN 1 +#define CK_SGM0_CK0_EN 2 +#define CK_SGM0_CDR_CK0_EN 3 +#define CLK_SGMII0_NR_CLK 4 + +/* SGMIISYS_1 */ + +#define CK_SGM1_TX_EN 0 +#define CK_SGM1_RX_EN 1 +#define CK_SGM1_CK1_EN 2 +#define CK_SGM1_CDR_CK1_EN 3 +#define CLK_SGMII1_NR_CLK 4 + +/* ETHSYS */ + +#define CK_ETH_FE_EN 0 +#define CK_ETH_GP2_EN 1 +#define CK_ETH_GP1_EN 2 +#define CK_ETH_WOCPU1_EN 3 +#define CK_ETH_WOCPU0_EN 4 +#define CLK_ETH_NR_CLK 5 + +#endif + +/* _DT_BINDINGS_CLK_MT7986_H */ diff --git a/include/dt-bindings/pinctrl/mt65xx.h b/include/dt-bindings/pinctrl/mt65xx.h new file mode 100644 index 0000000000..fbea8d35bc --- /dev/null +++ b/include/dt-bindings/pinctrl/mt65xx.h @@ -0,0 +1,41 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2022 MediaTek Inc. + * Author: Hongzhou.Yang <hongzhou.yang@mediatek.com> + */ + +#ifndef _DT_BINDINGS_PINCTRL_MT65XX_H +#define _DT_BINDINGS_PINCTRL_MT65XX_H + +#define MTK_PIN_NO(x) ((x) << 8) +#define MTK_GET_PIN_NO(x) ((x) >> 8) +#define MTK_GET_PIN_FUNC(x) ((x) & 0xf) + +#define MTK_PUPD_SET_R1R0_00 100 +#define MTK_PUPD_SET_R1R0_01 101 +#define MTK_PUPD_SET_R1R0_10 102 +#define MTK_PUPD_SET_R1R0_11 103 + +#define MTK_PULL_SET_RSEL_000 200 +#define MTK_PULL_SET_RSEL_001 201 +#define MTK_PULL_SET_RSEL_010 202 +#define MTK_PULL_SET_RSEL_011 203 +#define MTK_PULL_SET_RSEL_100 204 +#define MTK_PULL_SET_RSEL_101 205 +#define MTK_PULL_SET_RSEL_110 206 +#define MTK_PULL_SET_RSEL_111 207 + +#define MTK_DRIVE_2mA 2 +#define MTK_DRIVE_4mA 4 +#define MTK_DRIVE_6mA 6 +#define MTK_DRIVE_8mA 8 +#define MTK_DRIVE_10mA 10 +#define MTK_DRIVE_12mA 12 +#define MTK_DRIVE_14mA 14 +#define MTK_DRIVE_16mA 16 +#define MTK_DRIVE_20mA 20 +#define MTK_DRIVE_24mA 24 +#define MTK_DRIVE_28mA 28 +#define MTK_DRIVE_32mA 32 + +#endif /* _DT_BINDINGS_PINCTRL_MT65XX_H */ diff --git a/include/efi_loader.h b/include/efi_loader.h index 7554f3b7db..ad01395b39 100644 --- a/include/efi_loader.h +++ b/include/efi_loader.h @@ -161,7 +161,7 @@ extern bool efi_st_keep_devices; /* EFI system partition */ extern struct efi_system_partition { - enum uclass_id if_type; + enum uclass_id uclass_id; int devnum; u8 part; } efi_system_partition; @@ -562,7 +562,7 @@ efi_status_t tcg2_measure_pe_image(void *efi, u64 efi_size, struct efi_loaded_image *loaded_image_info); /* Create handles and protocols for the partitions of a block device */ int efi_disk_create_partitions(efi_handle_t parent, struct blk_desc *desc, - const char *if_typename, int diskid, + const char *uclass_idname, int diskid, const char *pdevname); /* Called by bootefi to make GOP (graphical) interface available */ efi_status_t efi_gop_register(void); diff --git a/include/init.h b/include/init.h index 02bb4ce13e..50a8302dc5 100644 --- a/include/init.h +++ b/include/init.h @@ -291,7 +291,7 @@ int show_board_info(void); * * @param total_size Size of U-Boot (unused?) */ -ulong board_get_usable_ram_top(ulong total_size); +phys_size_t board_get_usable_ram_top(phys_size_t total_size); int board_early_init_f(void); diff --git a/include/os.h b/include/os.h index 148178787b..5b353ae9d9 100644 --- a/include/os.h +++ b/include/os.h @@ -296,6 +296,14 @@ void os_putc(int ch); void os_puts(const char *str); /** + * os_flush() - flush controlling OS terminal + * + * This bypasses the U-Boot console support and flushes directly the OS + * stdout file descriptor. + */ +void os_flush(void); + +/** * os_write_ram_buf() - write the sandbox RAM buffer to a existing file * * @fname: filename to write memory to (simple binary format) diff --git a/include/scsi.h b/include/scsi.h index b47c7463c1..94e1d8ccb2 100644 --- a/include/scsi.h +++ b/include/scsi.h @@ -15,27 +15,47 @@ struct udevice; +/** + * struct scsi_cmd - information about a SCSI command to be processed + * + * @cmd: command + * @sense_buf: for request sense + * @status: SCSI Status + * @target: Target ID + * @lun: Target LUN + * @cmdlen: command len + * @datalen: Total data length + * @pdata: pointer to data + * @msgout: Messge out buffer (NOT USED) + * @msgin: Message in buffer + * @sensecmdlen: Sense command len + * @sensedatalen: Sense data len + * @sensecmd: Sense command + * @contr_stat: Controller Status + * @trans_bytes: tranfered bytes + * @priv: Private value + * @dma_dir: Direction of data structure + */ struct scsi_cmd { - unsigned char cmd[16]; /* command */ - /* for request sense */ - unsigned char sense_buf[64] + unsigned char cmd[16]; + unsigned char sense_buf[64] __attribute__((aligned(ARCH_DMA_MINALIGN))); - unsigned char status; /* SCSI Status */ - unsigned char target; /* Target ID */ - unsigned char lun; /* Target LUN */ - unsigned char cmdlen; /* command len */ - unsigned long datalen; /* Total data length */ - unsigned char * pdata; /* pointer to data */ - unsigned char msgout[12]; /* Messge out buffer (NOT USED) */ - unsigned char msgin[12]; /* Message in buffer */ - unsigned char sensecmdlen; /* Sense command len */ - unsigned long sensedatalen; /* Sense data len */ - unsigned char sensecmd[6]; /* Sense command */ - unsigned long contr_stat; /* Controller Status */ - unsigned long trans_bytes; /* tranfered bytes */ - - unsigned int priv; - enum dma_data_direction dma_dir; + unsigned char status; + unsigned char target; + unsigned char lun; + unsigned char cmdlen; + unsigned long datalen; + unsigned char *pdata; + unsigned char msgout[12]; + unsigned char msgin[12]; + unsigned char sensecmdlen; + unsigned long sensedatalen; + unsigned char sensecmd[6]; + unsigned long contr_stat; + unsigned long trans_bytes; + + unsigned int priv; + enum dma_data_direction dma_dir; }; /*----------------------------------------------------------- @@ -168,6 +188,74 @@ struct scsi_cmd { #define SCSI_WRITE_SAME 0x41 /* Write Same (O) */ /** + * enum scsi_cmd_phase - current phase of the SCSI protocol + * + * @SCSIPH_START: Start phase + * @SCSIPH_DATA: Data phase + * @SCSIPH_STATUS: Status phase + */ +enum scsi_cmd_phase { + SCSIPH_START, + SCSIPH_DATA, + SCSIPH_STATUS, +}; + +/** + * struct scsi_inquiry_resp - holds a SCSI inquiry command + * + * @type; command type + * @flags; command flags + * @version; command version + * @data_format; data format + * @additional_len; additional data length + * @spare[3]; spare bytes + * @vendor[8]; vendor information + * @product[16]; production information + * @revision[4]; revision information + */ +struct scsi_inquiry_resp { + u8 type; + u8 flags; + u8 version; + u8 data_format; + u8 additional_len; + u8 spare[3]; + char vendor[8]; + char product[16]; + char revision[4]; +}; + +/** + * struct scsi_read_capacity_resp - holds the response to a read-capacity cmd + * + * @last_block_addr: Logical block address of last block + * @block_len: Length of each block in bytes + */ +struct scsi_read_capacity_resp { + u32 last_block_addr; + u32 block_len; +}; + +/** + * struct scsi_read10_req - holds a SCSI READ10 request + * + * @cmd; command type + * @lun_flags; LUN flags + * @lba; Logical block address to start reading from + * @spare; spare bytes + * @xfer_len: number of blocks to read + * @spare2: more spare bytes + */ +struct __packed scsi_read10_req { + u8 cmd; + u8 lun_flags; + u32 lba; + u8 spare; + u16 xfer_len; + u8 spare2[3]; +}; + +/** * struct scsi_plat - stores information about SCSI controller * * @base: Controller base address diff --git a/include/scsi_emul.h b/include/scsi_emul.h new file mode 100644 index 0000000000..13c3f860b4 --- /dev/null +++ b/include/scsi_emul.h @@ -0,0 +1,70 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Emulation of enough SCSI commands to find and read from a unit + * + * Copyright 2022 Google LLC + * Written by Simon Glass <sjg@chromium.org> + * + * implementations of SCSI functions required so that CONFIG_SCSI can be enabled + * for sandbox + */ + +#ifndef __scsi_emul_h +#define __scsi_emul_h + +/** + * struct scsi_emul_info - information for emulating a SCSI device + * + * @vendor: Vendor name + * @product: Product name + * @block_size: Block size of device in bytes (normally 512) + * @file_size: Size of the backing file for this emulator, in bytes + * @seek_block: Seek position for file (block number) + * + * @phase: Current SCSI phase + * @buff_used: Number of bytes ready to transfer back to host + * @read_len: Number of bytes of data left in the current read command + * @alloc_len: Allocation length from the last incoming command + * @transfer_len: Transfer length from CBW header + * @buff: Data buffer for outgoing data + */ +struct scsi_emul_info { + /* provided by the caller: */ + void *buff; + const char *vendor; + const char *product; + int block_size; + loff_t file_size; + int seek_block; + + /* state maintained by the emulator: */ + enum scsi_cmd_phase phase; + int buff_used; + int read_len; + uint seek_pos; + int alloc_len; + uint transfer_len; +}; + +/* Indicates that a read is being started */ +#define SCSI_EMUL_DO_READ 1 + +/** + * sb_scsi_emul_command() - Process a SCSI command + * + * This sets up the response in info->buff and updates various other values + * in info. + * + * If SCSI_EMUL_DO_READ is returned then the caller should set up so that the + * backing file can be read, or return an error status if there is no file. + * + * @info: Emulation information + * @req: Request to process + * @len: Length of request in bytes + * @return SCSI_EMUL_DO_READ if a read has started, 0 if some other operation + * has started, -ve if there was an error + */ +int sb_scsi_emul_command(struct scsi_emul_info *info, + const struct scsi_cmd *req, int len); + +#endif diff --git a/include/serial.h b/include/serial.h index 8c2e7adbc3..fe01bcfadb 100644 --- a/include/serial.h +++ b/include/serial.h @@ -362,6 +362,11 @@ void serial_setbrg(void); void serial_putc(const char ch); void serial_putc_raw(const char ch); void serial_puts(const char *str); +#if defined(CONFIG_CONSOLE_FLUSH_SUPPORT) && CONFIG_IS_ENABLED(DM_SERIAL) +void serial_flush(void); +#else +static inline void serial_flush(void) {} +#endif int serial_getc(void); int serial_tstc(void); diff --git a/include/stdio.h b/include/stdio.h index 1939a48f0f..3241e2d493 100644 --- a/include/stdio.h +++ b/include/stdio.h @@ -15,6 +15,11 @@ int tstc(void); defined(CONFIG_SPL_SERIAL)) void putc(const char c); void puts(const char *s); +#ifdef CONFIG_CONSOLE_FLUSH_SUPPORT +void flush(void); +#else +static inline void flush(void) {} +#endif int __printf(1, 2) printf(const char *fmt, ...); int vprintf(const char *fmt, va_list args); #else @@ -26,6 +31,10 @@ static inline void puts(const char *s) { } +static inline void flush(void) +{ +} + static inline int __printf(1, 2) printf(const char *fmt, ...) { return 0; @@ -48,11 +57,17 @@ static inline int vprintf(const char *fmt, va_list args) /* stderr */ #define eputc(c) fputc(stderr, c) #define eputs(s) fputs(stderr, s) +#define eflush() fflush(stderr) #define eprintf(fmt, args...) fprintf(stderr, fmt, ##args) int __printf(2, 3) fprintf(int file, const char *fmt, ...); void fputs(int file, const char *s); void fputc(int file, const char c); +#ifdef CONFIG_CONSOLE_FLUSH_SUPPORT +void fflush(int file); +#else +static inline void fflush(int file) {} +#endif int ftstc(int file); int fgetc(int file); diff --git a/include/stdio_dev.h b/include/stdio_dev.h index 270fa2729f..3105928970 100644 --- a/include/stdio_dev.h +++ b/include/stdio_dev.h @@ -37,6 +37,13 @@ struct stdio_dev { void (*putc)(struct stdio_dev *dev, const char c); /* To put a string (accelerator) */ void (*puts)(struct stdio_dev *dev, const char *s); +#ifdef CONFIG_CONSOLE_FLUSH_SUPPORT + /* To flush output queue */ + void (*flush)(struct stdio_dev *dev); +#define STDIO_DEV_ASSIGN_FLUSH(dev, flush_func) ((dev)->flush = (flush_func)) +#else +#define STDIO_DEV_ASSIGN_FLUSH(dev, flush_func) +#endif /* INPUT functions */ diff --git a/include/usb/designware_udc.h b/include/usb/designware_udc.h deleted file mode 100644 index f716f07dd0..0000000000 --- a/include/usb/designware_udc.h +++ /dev/null @@ -1,183 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C) Copyright 2009 - * Vipin Kumar, STMicroelectronics, vipin.kumar@st.com. - */ - -#ifndef __DW_UDC_H -#define __DW_UDC_H - -/* - * Defines for USBD - * - * The udc_ahb controller has three AHB slaves: - * - * 1. THe UDC registers - * 2. The plug detect - * 3. The RX/TX FIFO - */ - -#define MAX_ENDPOINTS 16 - -struct udc_endp_regs { - u32 endp_cntl; - u32 endp_status; - u32 endp_bsorfn; - u32 endp_maxpacksize; - u32 reserved_1; - u32 endp_desc_point; - u32 reserved_2; - u32 write_done; -}; - -/* Endpoint Control Register definitions */ - -#define ENDP_CNTL_STALL 0x00000001 -#define ENDP_CNTL_FLUSH 0x00000002 -#define ENDP_CNTL_SNOOP 0x00000004 -#define ENDP_CNTL_POLL 0x00000008 -#define ENDP_CNTL_CONTROL 0x00000000 -#define ENDP_CNTL_ISO 0x00000010 -#define ENDP_CNTL_BULK 0x00000020 -#define ENDP_CNTL_INT 0x00000030 -#define ENDP_CNTL_NAK 0x00000040 -#define ENDP_CNTL_SNAK 0x00000080 -#define ENDP_CNTL_CNAK 0x00000100 -#define ENDP_CNTL_RRDY 0x00000200 - -/* Endpoint Satus Register definitions */ - -#define ENDP_STATUS_PIDMSK 0x0000000f -#define ENDP_STATUS_OUTMSK 0x00000030 -#define ENDP_STATUS_OUT_NONE 0x00000000 -#define ENDP_STATUS_OUT_DATA 0x00000010 -#define ENDP_STATUS_OUT_SETUP 0x00000020 -#define ENDP_STATUS_IN 0x00000040 -#define ENDP_STATUS_BUFFNAV 0x00000080 -#define ENDP_STATUS_FATERR 0x00000100 -#define ENDP_STATUS_HOSTBUSERR 0x00000200 -#define ENDP_STATUS_TDC 0x00000400 -#define ENDP_STATUS_RXPKTMSK 0x003ff800 - -struct udc_regs { - struct udc_endp_regs in_regs[MAX_ENDPOINTS]; - struct udc_endp_regs out_regs[MAX_ENDPOINTS]; - u32 dev_conf; - u32 dev_cntl; - u32 dev_stat; - u32 dev_int; - u32 dev_int_mask; - u32 endp_int; - u32 endp_int_mask; - u32 reserved_3[0x39]; - u32 reserved_4; /* offset 0x500 */ - u32 udc_endp_reg[MAX_ENDPOINTS]; -}; - -/* Device Configuration Register definitions */ - -#define DEV_CONF_HS_SPEED 0x00000000 -#define DEV_CONF_LS_SPEED 0x00000002 -#define DEV_CONF_FS_SPEED 0x00000003 -#define DEV_CONF_REMWAKEUP 0x00000004 -#define DEV_CONF_SELFPOW 0x00000008 -#define DEV_CONF_SYNCFRAME 0x00000010 -#define DEV_CONF_PHYINT_8 0x00000020 -#define DEV_CONF_PHYINT_16 0x00000000 -#define DEV_CONF_UTMI_BIDIR 0x00000040 -#define DEV_CONF_STATUS_STALL 0x00000080 - -/* Device Control Register definitions */ - -#define DEV_CNTL_RESUME 0x00000001 -#define DEV_CNTL_TFFLUSH 0x00000002 -#define DEV_CNTL_RXDMAEN 0x00000004 -#define DEV_CNTL_TXDMAEN 0x00000008 -#define DEV_CNTL_DESCRUPD 0x00000010 -#define DEV_CNTL_BIGEND 0x00000020 -#define DEV_CNTL_BUFFILL 0x00000040 -#define DEV_CNTL_TSHLDEN 0x00000080 -#define DEV_CNTL_BURSTEN 0x00000100 -#define DEV_CNTL_DMAMODE 0x00000200 -#define DEV_CNTL_SOFTDISCONNECT 0x00000400 -#define DEV_CNTL_SCALEDOWN 0x00000800 -#define DEV_CNTL_BURSTLENU 0x00010000 -#define DEV_CNTL_BURSTLENMSK 0x00ff0000 -#define DEV_CNTL_TSHLDLENU 0x01000000 -#define DEV_CNTL_TSHLDLENMSK 0xff000000 - -/* Device Status Register definitions */ - -#define DEV_STAT_CFG 0x0000000f -#define DEV_STAT_INTF 0x000000f0 -#define DEV_STAT_ALT 0x00000f00 -#define DEV_STAT_SUSP 0x00001000 -#define DEV_STAT_ENUM 0x00006000 -#define DEV_STAT_ENUM_SPEED_HS 0x00000000 -#define DEV_STAT_ENUM_SPEED_FS 0x00002000 -#define DEV_STAT_ENUM_SPEED_LS 0x00004000 -#define DEV_STAT_RXFIFO_EMPTY 0x00008000 -#define DEV_STAT_PHY_ERR 0x00010000 -#define DEV_STAT_TS 0xf0000000 - -/* Device Interrupt Register definitions */ - -#define DEV_INT_MSK 0x0000007f -#define DEV_INT_SETCFG 0x00000001 -#define DEV_INT_SETINTF 0x00000002 -#define DEV_INT_INACTIVE 0x00000004 -#define DEV_INT_USBRESET 0x00000008 -#define DEV_INT_SUSPUSB 0x00000010 -#define DEV_INT_SOF 0x00000020 -#define DEV_INT_ENUM 0x00000040 - -/* Endpoint Interrupt Register definitions */ - -#define ENDP0_INT_CTRLIN 0x00000001 -#define ENDP1_INT_BULKIN 0x00000002 -#define ENDP_INT_NONISOIN_MSK 0x0000AAAA -#define ENDP2_INT_BULKIN 0x00000004 -#define ENDP0_INT_CTRLOUT 0x00010000 -#define ENDP1_INT_BULKOUT 0x00020000 -#define ENDP2_INT_BULKOUT 0x00040000 -#define ENDP_INT_NONISOOUT_MSK 0x55540000 - -/* Endpoint Register definitions */ -#define ENDP_EPDIR_OUT 0x00000000 -#define ENDP_EPDIR_IN 0x00000010 -#define ENDP_EPTYPE_CNTL 0x0 -#define ENDP_EPTYPE_ISO 0x1 -#define ENDP_EPTYPE_BULK 0x2 -#define ENDP_EPTYPE_INT 0x3 - -/* - * Defines for Plug Detect - */ - -struct plug_regs { - u32 plug_state; - u32 plug_pending; -}; - -/* Plug State Register definitions */ -#define PLUG_STATUS_EN 0x1 -#define PLUG_STATUS_ATTACHED 0x2 -#define PLUG_STATUS_PHY_RESET 0x4 -#define PLUG_STATUS_PHY_MODE 0x8 - -/* - * Defines for UDC FIFO (Slave Mode) - */ -struct udcfifo_regs { - u32 *fifo_p; -}; - -/* - * UDC endpoint definitions - */ -#define UDC_EP0 0 -#define UDC_EP1 1 -#define UDC_EP2 2 -#define UDC_EP3 3 - -#endif /* __DW_UDC_H */ |