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-rw-r--r--include/bootstage.h2
-rw-r--r--include/configs/MPC8548CDS.h5
-rw-r--r--include/configs/MPC8572DS.h5
-rw-r--r--include/configs/MPC8641HPCN.h2
-rw-r--r--include/configs/P1010RDB.h5
-rw-r--r--include/configs/P2041RDB.h5
-rw-r--r--include/configs/T102xRDB.h5
-rw-r--r--include/configs/T104xRDB.h3
-rw-r--r--include/configs/T208xQDS.h5
-rw-r--r--include/configs/T208xRDB.h5
-rw-r--r--include/configs/T4240RDB.h3
-rw-r--r--include/configs/controlcenterd.h5
-rw-r--r--include/configs/corenet_ds.h5
-rw-r--r--include/configs/cyrus.h5
-rw-r--r--include/configs/helios4.h95
-rw-r--r--include/configs/kmp204x.h3
-rw-r--r--include/configs/lacie_kw.h19
-rw-r--r--include/configs/p1_p2_rdb_pc.h5
-rw-r--r--include/configs/qemu-ppce500.h3
-rw-r--r--include/configs/t4qds.h3
-rw-r--r--include/console.h13
-rw-r--r--include/dm/test.h14
-rw-r--r--include/linux/kconfig.h103
-rw-r--r--include/rtc.h47
-rw-r--r--include/spi.h13
-rw-r--r--include/video.h41
-rw-r--r--include/video_console.h51
27 files changed, 287 insertions, 183 deletions
diff --git a/include/bootstage.h b/include/bootstage.h
index f507271375..00c85fb86a 100644
--- a/include/bootstage.h
+++ b/include/bootstage.h
@@ -338,7 +338,7 @@ int bootstage_stash(void *base, int size);
* @param base Base address of memory buffer
* @param size Size of memory buffer (-1 if unknown)
* @return 0 if unstashed ok, -ENOENT if bootstage info not found, -ENOSPC if
- * there is not space for read the stacked data, or other error if
+ * there is not space for read the stashed data, or other error if
* something else went wrong
*/
int bootstage_unstash(const void *base, int size);
diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h
index 1cb62ae849..4b40129197 100644
--- a/include/configs/MPC8548CDS.h
+++ b/include/configs/MPC8548CDS.h
@@ -43,11 +43,6 @@ extern unsigned long get_clock_freq(void);
*/
#define CONFIG_ENABLE_36BIT_PHYS 1
-#ifdef CONFIG_PHYS_64BIT
-#define CONFIG_ADDR_MAP
-#define CONFIG_SYS_NUM_ADDR_MAP 16 /* number of TLB1 entries */
-#endif
-
#define CONFIG_SYS_CCSRBAR 0xe0000000
#define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR
diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h
index b4e5e3b3e2..429dae19af 100644
--- a/include/configs/MPC8572DS.h
+++ b/include/configs/MPC8572DS.h
@@ -45,11 +45,6 @@
#define CONFIG_ENABLE_36BIT_PHYS 1
-#ifdef CONFIG_PHYS_64BIT
-#define CONFIG_ADDR_MAP 1
-#define CONFIG_SYS_NUM_ADDR_MAP 16 /* number of TLB1 entries */
-#endif
-
/*
* Config the L2 Cache as L2 SRAM
*/
diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h
index a7f02aef29..1560b61387 100644
--- a/include/configs/MPC8641HPCN.h
+++ b/include/configs/MPC8641HPCN.h
@@ -19,7 +19,6 @@
/* High Level Configuration Options */
#define CONFIG_LINUX_RESET_VEC 0x100 /* Reset vector used by Linux */
-#define CONFIG_ADDR_MAP 1 /* Use addr map */
/*
* default CCSRBAR is at 0xff700000
@@ -47,7 +46,6 @@
#define CONFIG_ENV_OVERWRITE
#define CONFIG_BAT_RW 1 /* Use common BAT rw code */
-#define CONFIG_SYS_NUM_ADDR_MAP 8 /* Number of addr map slots = 8 dbats */
#define CONFIG_ALTIVEC 1
diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h
index 8f709a6cac..fc74d57497 100644
--- a/include/configs/P1010RDB.h
+++ b/include/configs/P1010RDB.h
@@ -196,11 +196,6 @@
#define CONFIG_ENABLE_36BIT_PHYS
-#ifdef CONFIG_PHYS_64BIT
-#define CONFIG_ADDR_MAP 1
-#define CONFIG_SYS_NUM_ADDR_MAP 16 /* number of TLB1 entries */
-#endif
-
/* DDR Setup */
#define CONFIG_SYS_DDR_RAW_TIMING
#define CONFIG_DDR_SPD
diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h
index 94cbe10dd3..c6a64ee479 100644
--- a/include/configs/P2041RDB.h
+++ b/include/configs/P2041RDB.h
@@ -70,11 +70,6 @@ unsigned long get_board_sys_clk(unsigned long dummy);
#define CONFIG_ENABLE_36BIT_PHYS
-#ifdef CONFIG_PHYS_64BIT
-#define CONFIG_ADDR_MAP
-#define CONFIG_SYS_NUM_ADDR_MAP 64 /* number of TLB1 entries */
-#endif
-
#define CONFIG_POST CONFIG_SYS_POST_MEMORY /* test POST memory test */
/*
diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h
index f5d9657444..efd9b6b5e1 100644
--- a/include/configs/T102xRDB.h
+++ b/include/configs/T102xRDB.h
@@ -17,11 +17,6 @@
#define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */
#define CONFIG_ENABLE_36BIT_PHYS
-#ifdef CONFIG_PHYS_64BIT
-#define CONFIG_ADDR_MAP 1
-#define CONFIG_SYS_NUM_ADDR_MAP 64 /* number of TLB1 entries */
-#endif
-
#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */
#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS
diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h
index 4237dfcd6c..8f9de56f07 100644
--- a/include/configs/T104xRDB.h
+++ b/include/configs/T104xRDB.h
@@ -186,9 +186,6 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg
#define CONFIG_ENABLE_36BIT_PHYS
-#define CONFIG_ADDR_MAP
-#define CONFIG_SYS_NUM_ADDR_MAP 64 /* number of TLB1 entries */
-
/*
* Config the L3 Cache as L3 SRAM
*/
diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h
index c54f7f53e5..f32e6680b3 100644
--- a/include/configs/T208xQDS.h
+++ b/include/configs/T208xQDS.h
@@ -26,11 +26,6 @@
#define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */
#define CONFIG_ENABLE_36BIT_PHYS
-#ifdef CONFIG_PHYS_64BIT
-#define CONFIG_ADDR_MAP 1
-#define CONFIG_SYS_NUM_ADDR_MAP 64 /* number of TLB1 entries */
-#endif
-
#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */
#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS
#define CONFIG_ENV_OVERWRITE
diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h
index 70eafc3e28..e666e4f4a4 100644
--- a/include/configs/T208xRDB.h
+++ b/include/configs/T208xRDB.h
@@ -20,11 +20,6 @@
#define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */
#define CONFIG_ENABLE_36BIT_PHYS
-#ifdef CONFIG_PHYS_64BIT
-#define CONFIG_ADDR_MAP 1
-#define CONFIG_SYS_NUM_ADDR_MAP 64 /* number of TLB1 entries */
-#endif
-
#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */
#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS
#define CONFIG_ENV_OVERWRITE
diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h
index 9832f85405..ebe7a9cf92 100644
--- a/include/configs/T4240RDB.h
+++ b/include/configs/T4240RDB.h
@@ -80,9 +80,6 @@
#define CONFIG_ENABLE_36BIT_PHYS
-#define CONFIG_ADDR_MAP
-#define CONFIG_SYS_NUM_ADDR_MAP 64 /* number of TLB1 entries */
-
/*
* Config the L3 Cache as L3 SRAM
*/
diff --git a/include/configs/controlcenterd.h b/include/configs/controlcenterd.h
index 823586cc09..512d8e16ee 100644
--- a/include/configs/controlcenterd.h
+++ b/include/configs/controlcenterd.h
@@ -41,11 +41,6 @@
#define CONFIG_ENABLE_36BIT_PHYS
-#ifdef CONFIG_PHYS_64BIT
-#define CONFIG_ADDR_MAP
-#define CONFIG_SYS_NUM_ADDR_MAP 16 /* number of TLB1 entries */
-#endif
-
#define CONFIG_L2_CACHE
#define CONFIG_BTB
diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h
index a49f9056c5..d7812bd886 100644
--- a/include/configs/corenet_ds.h
+++ b/include/configs/corenet_ds.h
@@ -84,11 +84,6 @@
#define CONFIG_ENABLE_36BIT_PHYS
-#ifdef CONFIG_PHYS_64BIT
-#define CONFIG_ADDR_MAP
-#define CONFIG_SYS_NUM_ADDR_MAP 64 /* number of TLB1 entries */
-#endif
-
#define CONFIG_POST CONFIG_SYS_POST_MEMORY /* test POST memory test */
/*
diff --git a/include/configs/cyrus.h b/include/configs/cyrus.h
index 052e6018a3..b587cb8d77 100644
--- a/include/configs/cyrus.h
+++ b/include/configs/cyrus.h
@@ -70,11 +70,6 @@
#define CONFIG_ENABLE_36BIT_PHYS
-#ifdef CONFIG_PHYS_64BIT
-#define CONFIG_ADDR_MAP
-#define CONFIG_SYS_NUM_ADDR_MAP 64 /* number of TLB1 entries */
-#endif
-
/* test POST memory test */
#undef CONFIG_POST
diff --git a/include/configs/helios4.h b/include/configs/helios4.h
index 31e2e78b62..2f4b67025c 100644
--- a/include/configs/helios4.h
+++ b/include/configs/helios4.h
@@ -6,7 +6,6 @@
#ifndef _CONFIG_HELIOS4_H
#define _CONFIG_HELIOS4_H
-#include <linux/sizes.h>
#include <linux/stringify.h>
/*
@@ -30,26 +29,30 @@
#define CONFIG_ENV_MIN_ENTRIES 128
+/* Environment in MMC */
+#define CONFIG_SYS_MMC_ENV_DEV 0
/*
- * SATA/SCSI/AHCI configuration
+ * For SD - reserve 1 LBA for MBR + 1M for u-boot image. The MMC/eMMC
+ * boot image starts @ LBA-0.
+ * As result in MMC/eMMC case it will be a 1 sector gap between u-boot
+ * image and environment
*/
-#define CONFIG_SCSI_AHCI_PLAT
-#define CONFIG_SYS_SCSI_MAX_SCSI_ID 2
-#define CONFIG_SYS_SCSI_MAX_LUN 2
-#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
- CONFIG_SYS_SCSI_MAX_LUN)
-#ifdef CONFIG_MVEBU_SPL_BOOT_DEVICE_SPI
-/* Environment in SPI NOR flash */
-#endif
+#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
-#ifdef CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC
-/* Environment in MMC */
-#define CONFIG_SYS_MMC_ENV_DEV 0
-/* stay within first 1M */
+/* PCIe support */
+#ifndef CONFIG_SPL_BUILD
+#define CONFIG_PCI_SCAN_SHOW
#endif
-#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
+/* SATA support */
+#ifdef CONFIG_SCSI
+#define CONFIG_SCSI_AHCI_PLAT
+#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
+#define CONFIG_SYS_SCSI_MAX_LUN 1
+#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
+ CONFIG_SYS_SCSI_MAX_LUN)
+#endif
/* Keep device tree and initrd in lower memory so the kernel can access them */
#define RELOCATION_LIMITS_ENV_SETTINGS \
@@ -57,22 +60,6 @@
"initrd_high=0x10000000\0"
/* SPL */
-/*
- * Select the boot device here
- *
- * Currently supported are:
- * SPL_BOOT_SPI_NOR_FLASH - Booting via SPI NOR flash
- * SPL_BOOT_SDIO_MMC_CARD - Booting via SDIO/MMC card (partition 1)
- */
-#define SPL_BOOT_SPI_NOR_FLASH 1
-#define SPL_BOOT_SDIO_MMC_CARD 2
-
-#ifdef CONFIG_MVEBU_SPL_BOOT_DEVICE_SPI
-#define CONFIG_SPL_BOOT_DEVICE SPL_BOOT_SPI_NOR_FLASH
-#endif
-#ifdef CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC
-#define CONFIG_SPL_BOOT_DEVICE SPL_BOOT_SDIO_MMC_CARD
-#endif
/* Defines for SPL */
#define CONFIG_SPL_SIZE (140 << 10)
@@ -88,11 +75,10 @@
#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
-#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH
+#if defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_SPI)
+/* SPL related SPI defines */
#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
-#endif
-
-#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD
+#elif defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC) || defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_SATA)
/* SPL related MMC defines */
#define CONFIG_SYS_MMC_U_BOOT_OFFS (160 << 10)
#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_MMC_U_BOOT_OFFS
@@ -100,6 +86,7 @@
#define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */
#endif
#endif
+
/*
* mv-common.h should be defined after CMD configs since it used them
* to enable certain macros
@@ -121,16 +108,46 @@
#define BOOT_TARGET_DEVICES_USB(func)
#endif
-#ifdef CONFIG_SATA
-#define BOOT_TARGET_DEVICES_SATA(func) func(SATA, sata, 0)
+#ifndef CONFIG_SCSI
+#define BOOT_TARGET_DEVICES_SCSI_BUS0(func)
+#define BOOT_TARGET_DEVICES_SCSI_BUS1(func)
+#define BOOT_TARGET_DEVICES_SCSI_BUS2(func)
+#else
+/*
+ * With SCSI enabled, M.2 SATA is always located on bus 0
+ */
+#define BOOT_TARGET_DEVICES_SCSI_BUS0(func) func(SCSI, scsi, 0)
+
+/*
+ * Either one or both mPCIe slots may be configured as mSATA interfaces. The
+ * SCSI bus ids are assigned based on sequence of hardware present, not always
+ * tied to hardware slot ids. As such, use second SCSI bus if either slot is
+ * set for SATA, and only use third SCSI bus if both slots are SATA enabled.
+ */
+#if defined (CONFIG_HELIOS4_CON2_SATA) || defined (CONFIG_HELIOS4_CON3_SATA)
+#define BOOT_TARGET_DEVICES_SCSI_BUS1(func) func(SCSI, scsi, 1)
+#else
+#define BOOT_TARGET_DEVICES_SCSI_BUS1(func)
+#endif
+
+#if defined (CONFIG_HELIOS4_CON2_SATA) && defined (CONFIG_HELIOS4_CON3_SATA)
+#define BOOT_TARGET_DEVICES_SCSI_BUS2(func) func(SCSI, scsi, 2)
#else
-#define BOOT_TARGET_DEVICES_SATA(func)
+#define BOOT_TARGET_DEVICES_SCSI_BUS2(func)
#endif
+#endif /* CONFIG_SCSI */
+
+/*
+ * The SCSI buses are attempted in increasing bus order, there is no current
+ * mechanism to alter the default bus priority order for booting.
+ */
#define BOOT_TARGET_DEVICES(func) \
BOOT_TARGET_DEVICES_MMC(func) \
BOOT_TARGET_DEVICES_USB(func) \
- BOOT_TARGET_DEVICES_SATA(func) \
+ BOOT_TARGET_DEVICES_SCSI_BUS0(func) \
+ BOOT_TARGET_DEVICES_SCSI_BUS1(func) \
+ BOOT_TARGET_DEVICES_SCSI_BUS2(func) \
func(PXE, pxe, na) \
func(DHCP, dhcp, na)
diff --git a/include/configs/kmp204x.h b/include/configs/kmp204x.h
index e43b2f7513..6cd77edf70 100644
--- a/include/configs/kmp204x.h
+++ b/include/configs/kmp204x.h
@@ -64,9 +64,6 @@ unsigned long get_board_sys_clk(unsigned long dummy);
#define CONFIG_ENABLE_36BIT_PHYS
-#define CONFIG_ADDR_MAP
-#define CONFIG_SYS_NUM_ADDR_MAP 64 /* number of TLB1 entries */
-
#define CONFIG_POST CONFIG_SYS_POST_MEM_REGIONS /* POST memory regions test */
/*
diff --git a/include/configs/lacie_kw.h b/include/configs/lacie_kw.h
index 5bb0255a74..031bc995e3 100644
--- a/include/configs/lacie_kw.h
+++ b/include/configs/lacie_kw.h
@@ -83,18 +83,17 @@
/*
* SATA Driver configuration
*/
-#ifdef CONFIG_MVSATA_IDE
-#define CONFIG_SYS_ATA_IDE0_OFFSET MV_SATA_PORT0_OFFSET
+
+#ifdef CONFIG_SATA
+#define CONFIG_SYS_64BIT_LBA
+#define CONFIG_LBA48
#if defined(CONFIG_NETSPACE_MAX_V2) || defined(CONFIG_D2NET_V2) || \
defined(CONFIG_NET2BIG_V2)
-#define CONFIG_SYS_ATA_IDE1_OFFSET MV_SATA_PORT1_OFFSET
-#define CONFIG_SYS_IDE_MAXBUS 2
-#define CONFIG_SYS_IDE_MAXDEVICE 2
+#define CONFIG_SYS_SATA_MAX_DEVICE 2
#else
-#define CONFIG_SYS_IDE_MAXBUS 1
-#define CONFIG_SYS_IDE_MAXDEVICE 1
+#define CONFIG_SYS_SATA_MAX_DEVICE 1
#endif
-#endif /* CONFIG_MVSATA_IDE */
+#endif /* CONFIG_SATA */
/*
* Enable GPI0 support
@@ -144,8 +143,8 @@
"set stdin $stdin,nc; " \
"set stdout $stdout,nc; " \
"set stderr $stderr,nc;\0" \
- "diskload=ide reset && " \
- "ext2load ide 0:1 $loadaddr /boot/$bootfile\0" \
+ "diskload=sata init && " \
+ "ext2load sata 0:1 $loadaddr /boot/$bootfile\0" \
"usbload=usb start && " \
"fatload usb 0:1 $loadaddr /boot/$bootfile\0"
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index 6b57be912a..a33f2f30ca 100644
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -233,11 +233,6 @@
#define CONFIG_ENABLE_36BIT_PHYS
-#ifdef CONFIG_PHYS_64BIT
-#define CONFIG_ADDR_MAP 1
-#define CONFIG_SYS_NUM_ADDR_MAP 16 /* number of TLB1 entries */
-#endif
-
#define CONFIG_SYS_CCSRBAR 0xffe00000
#define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR
diff --git a/include/configs/qemu-ppce500.h b/include/configs/qemu-ppce500.h
index 03b08968f6..b3ec43073c 100644
--- a/include/configs/qemu-ppce500.h
+++ b/include/configs/qemu-ppce500.h
@@ -21,9 +21,6 @@
#define CONFIG_ENABLE_36BIT_PHYS
-#define CONFIG_ADDR_MAP
-#define CONFIG_SYS_NUM_ADDR_MAP 16 /* number of TLB1 entries */
-
/* Needed to fill the ccsrbar pointer */
/* Virtual address to CCSRBAR */
diff --git a/include/configs/t4qds.h b/include/configs/t4qds.h
index 3da7ee7b3a..1f6ae462ae 100644
--- a/include/configs/t4qds.h
+++ b/include/configs/t4qds.h
@@ -42,9 +42,6 @@
#define CONFIG_ENABLE_36BIT_PHYS
-#define CONFIG_ADDR_MAP
-#define CONFIG_SYS_NUM_ADDR_MAP 64 /* number of TLB1 entries */
-
/*
* Config the L3 Cache as L3 SRAM
*/
diff --git a/include/console.h b/include/console.h
index 74afe22b7e..4c6b8f2614 100644
--- a/include/console.h
+++ b/include/console.h
@@ -7,6 +7,8 @@
#ifndef __CONSOLE_H
#define __CONSOLE_H
+#include <stdbool.h>
+
extern char console_buffer[];
/* common/console.c */
@@ -72,6 +74,17 @@ int console_record_avail(void);
*/
int console_announce_r(void);
+/**
+ * console_puts_select_stderr() - Output a string to selected console devices
+ *
+ * This writes to stderr only. It is useful for outputting errors
+ *
+ * @serial_only: true to output only to serial, false to output to everything
+ * else
+ * @s: String to output
+ */
+void console_puts_select_stderr(bool serial_only, const char *s);
+
/*
* CONSOLE multiplexing.
*/
diff --git a/include/dm/test.h b/include/dm/test.h
index f0f36624ce..d39686cde2 100644
--- a/include/dm/test.h
+++ b/include/dm/test.h
@@ -159,7 +159,19 @@ enum {
/* Declare a new driver model test */
#define DM_TEST(_name, _flags) UNIT_TEST(_name, _flags, dm_test)
-/* This platform data is needed in tests, so declare it here */
+/*
+ * struct sandbox_sdl_plat - Platform data for the SDL video driver
+ *
+ * This platform data is needed in tests, so declare it here
+ *
+ * @xres: Width of display in pixels
+ * @yres: Height of display in pixels
+ * @bpix: Log2 of bits per pixel (enum video_log2_bpp)
+ * @rot: Console rotation (0=normal orientation, 1=90 degrees clockwise,
+ * 2=upside down, 3=90 degree counterclockwise)
+ * @vidconsole_drv_name: Name of video console driver (set by tests)
+ * @font_size: Console font size to select (set by tests)
+ */
struct sandbox_sdl_plat {
int xres;
int yres;
diff --git a/include/linux/kconfig.h b/include/linux/kconfig.h
index 3a2da738c4..d109ed3119 100644
--- a/include/linux/kconfig.h
+++ b/include/linux/kconfig.h
@@ -23,54 +23,30 @@
#define ___config_enabled(__ignored, val, ...) val
/*
- * IS_ENABLED(CONFIG_FOO) evaluates to 1 if CONFIG_FOO is set to 'y' or 'm',
+ * IS_ENABLED(CONFIG_FOO) evaluates to 1 if CONFIG_FOO is set to 'y',
* 0 otherwise.
*
*/
#define IS_ENABLED(option) \
- (config_enabled(option) || config_enabled(option##_MODULE))
-
-/*
- * IS_BUILTIN(CONFIG_FOO) evaluates to 1 if CONFIG_FOO is set to 'y', 0
- * otherwise. For boolean options, this is equivalent to
- * IS_ENABLED(CONFIG_FOO).
- */
-#define IS_BUILTIN(option) config_enabled(option)
-
-/*
- * IS_MODULE(CONFIG_FOO) evaluates to 1 if CONFIG_FOO is set to 'm', 0
- * otherwise.
- */
-#define IS_MODULE(option) config_enabled(option##_MODULE)
+ (config_enabled(option))
/*
* U-Boot add-on: Helper macros to reference to different macros
* (CONFIG_ or CONFIG_SPL_ prefixed), depending on the build context.
*/
-#ifdef CONFIG_SPL_BUILD
-#define _IS_SPL 1
-#endif
-
-#ifdef CONFIG_TPL_BUILD
-#define _IS_TPL 1
-#endif
#if defined(CONFIG_TPL_BUILD)
-#define config_val(cfg) _config_val(_IS_TPL, cfg)
-#define _config_val(x, cfg) __config_val(x, cfg)
-#define __config_val(x, cfg) ___config_val(__ARG_PLACEHOLDER_##x, cfg)
-#define ___config_val(arg1_or_junk, cfg) \
- ____config_val(arg1_or_junk CONFIG_TPL_##cfg, CONFIG_##cfg)
-#define ____config_val(__ignored, val, ...) val
+#define _CONFIG_PREFIX TPL_
+#elif defined(CONFIG_SPL_BUILD)
+#define _CONFIG_PREFIX SPL_
#else
-#define config_val(cfg) _config_val(_IS_SPL, cfg)
-#define _config_val(x, cfg) __config_val(x, cfg)
-#define __config_val(x, cfg) ___config_val(__ARG_PLACEHOLDER_##x, cfg)
-#define ___config_val(arg1_or_junk, cfg) \
- ____config_val(arg1_or_junk CONFIG_SPL_##cfg, CONFIG_##cfg)
-#define ____config_val(__ignored, val, ...) val
+#define _CONFIG_PREFIX
#endif
+#define config_val(cfg) _config_val(_CONFIG_PREFIX, cfg)
+#define _config_val(pfx, cfg) __config_val(pfx, cfg)
+#define __config_val(pfx, cfg) CONFIG_ ## pfx ## cfg
+
/*
* CONFIG_VAL(FOO) evaluates to the value of
* CONFIG_FOO if CONFIG_SPL_BUILD is undefined,
@@ -80,30 +56,55 @@
#define CONFIG_VAL(option) config_val(option)
/*
- * CONFIG_IS_ENABLED(FOO) evaluates to
- * 1 if CONFIG_SPL_BUILD is undefined and CONFIG_FOO is set to 'y' or 'm',
- * 1 if CONFIG_SPL_BUILD is defined and CONFIG_SPL_FOO is set to 'y' or 'm',
- * 1 if CONFIG_TPL_BUILD is defined and CONFIG_TPL_FOO is set to 'y' or 'm',
- * 0 otherwise.
+ * Count number of arguments to a variadic macro. Currently only need
+ * it for 1, 2 or 3 arguments.
*/
-#define CONFIG_IS_ENABLED(option) \
- (config_enabled(CONFIG_VAL(option)) || \
- config_enabled(CONFIG_VAL(option##_MODULE)))
+#define __arg6(a1, a2, a3, a4, a5, a6, ...) a6
+#define __count_args(...) __arg6(dummy, ##__VA_ARGS__, 4, 3, 2, 1, 0)
+
+#define __concat(a, b) ___concat(a, b)
+#define ___concat(a, b) a ## b
+
+#define __unwrap(...) __VA_ARGS__
+#define __unwrap1(case1, case0) __unwrap case1
+#define __unwrap0(case1, case0) __unwrap case0
+
+#define __CONFIG_IS_ENABLED_1(option) __CONFIG_IS_ENABLED_3(option, (1), (0))
+#define __CONFIG_IS_ENABLED_2(option, case1) __CONFIG_IS_ENABLED_3(option, case1, ())
+#define __CONFIG_IS_ENABLED_3(option, case1, case0) \
+ __concat(__unwrap, config_enabled(CONFIG_VAL(option))) (case1, case0)
/*
- * CONFIG_IS_BUILTIN(FOO) evaluates to
+ * CONFIG_IS_ENABLED(FOO) expands to
* 1 if CONFIG_SPL_BUILD is undefined and CONFIG_FOO is set to 'y',
* 1 if CONFIG_SPL_BUILD is defined and CONFIG_SPL_FOO is set to 'y',
+ * 1 if CONFIG_TPL_BUILD is defined and CONFIG_TPL_FOO is set to 'y',
* 0 otherwise.
+ *
+ * CONFIG_IS_ENABLED(FOO, (abc)) expands to
+ * abc if CONFIG_SPL_BUILD is undefined and CONFIG_FOO is set to 'y',
+ * abc if CONFIG_SPL_BUILD is defined and CONFIG_SPL_FOO is set to 'y',
+ * abc if CONFIG_TPL_BUILD is defined and CONFIG_TPL_FOO is set to 'y',
+ * nothing otherwise.
+ *
+ * CONFIG_IS_ENABLED(FOO, (abc), (def)) expands to
+ * abc if CONFIG_SPL_BUILD is undefined and CONFIG_FOO is set to 'y',
+ * abc if CONFIG_SPL_BUILD is defined and CONFIG_SPL_FOO is set to 'y',
+ * abc if CONFIG_TPL_BUILD is defined and CONFIG_TPL_FOO is set to 'y',
+ * def otherwise.
+ *
+ * The optional second and third arguments must be parenthesized; that
+ * allows one to include a trailing comma, e.g. for use in
+ *
+ * CONFIG_IS_ENABLED(ACME, ({.compatible = "acme,frobnozzle"},))
+ *
+ * which adds an entry to the array being defined if CONFIG_ACME (or
+ * CONFIG_SPL_ACME/CONFIG_TPL_ACME, depending on build context) is
+ * set, and nothing otherwise.
*/
-#define CONFIG_IS_BUILTIN(option) config_enabled(CONFIG_VAL(option))
-/*
- * CONFIG_IS_MODULE(FOO) evaluates to
- * 1 if CONFIG_SPL_BUILD is undefined and CONFIG_FOO is set to 'm',
- * 1 if CONFIG_SPL_BUILD is defined and CONFIG_SPL_FOO is set to 'm',
- * 0 otherwise.
- */
-#define CONFIG_IS_MODULE(option) config_enabled(CONFIG_VAL(option##_MODULE))
+#define CONFIG_IS_ENABLED(option, ...) \
+ __concat(__CONFIG_IS_ENABLED_, __count_args(option, ##__VA_ARGS__)) (option, ##__VA_ARGS__)
+
#endif /* __LINUX_KCONFIG_H */
diff --git a/include/rtc.h b/include/rtc.h
index 8aabfc1162..1efc0db3de 100644
--- a/include/rtc.h
+++ b/include/rtc.h
@@ -56,6 +56,30 @@ struct rtc_ops {
int (*reset)(struct udevice *dev);
/**
+ * read() - Read multiple 8-bit registers
+ *
+ * @dev: Device to read from
+ * @reg: First register to read
+ * @buf: Output buffer
+ * @len: Number of registers to read
+ * @return 0 if OK, -ve on error
+ */
+ int (*read)(struct udevice *dev, unsigned int reg,
+ u8 *buf, unsigned int len);
+
+ /**
+ * write() - Write multiple 8-bit registers
+ *
+ * @dev: Device to write to
+ * @reg: First register to write
+ * @buf: Input buffer
+ * @len: Number of registers to write
+ * @return 0 if OK, -ve on error
+ */
+ int (*write)(struct udevice *dev, unsigned int reg,
+ const u8 *buf, unsigned int len);
+
+ /**
* read8() - Read an 8-bit register
*
* @dev: Device to read from
@@ -110,6 +134,29 @@ int dm_rtc_set(struct udevice *dev, struct rtc_time *time);
int dm_rtc_reset(struct udevice *dev);
/**
+ * dm_rtc_read() - Read multiple 8-bit registers
+ *
+ * @dev: Device to read from
+ * @reg: First register to read
+ * @buf: Output buffer
+ * @len: Number of registers to read
+ * @return 0 if OK, -ve on error
+ */
+int dm_rtc_read(struct udevice *dev, unsigned int reg, u8 *buf, unsigned int len);
+
+/**
+ * dm_rtc_write() - Write multiple 8-bit registers
+ *
+ * @dev: Device to write to
+ * @reg: First register to write
+ * @buf: Input buffer
+ * @len: Number of registers to write
+ * @return 0 if OK, -ve on error
+ */
+int dm_rtc_write(struct udevice *dev, unsigned int reg,
+ const u8 *buf, unsigned int len);
+
+/**
* rtc_read8() - Read an 8-bit register
*
* @dev: Device to read from
diff --git a/include/spi.h b/include/spi.h
index 9b4fb8dc0b..a37900b2fd 100644
--- a/include/spi.h
+++ b/include/spi.h
@@ -39,7 +39,6 @@
#define SPI_DEFAULT_WORDLEN 8
-#if CONFIG_IS_ENABLED(DM_SPI)
/* TODO(sjg@chromium.org): Remove this and use max_hz from struct spi_slave */
struct dm_spi_bus {
uint max_hz;
@@ -65,8 +64,6 @@ struct dm_spi_slave_platdata {
uint mode;
};
-#endif /* CONFIG_DM_SPI */
-
/**
* enum spi_clock_phase - indicates the clock phase to use for SPI (CPHA)
*
@@ -317,6 +314,11 @@ void spi_flash_copy_mmap(void *data, void *offset, size_t len);
*/
int spi_cs_is_valid(unsigned int bus, unsigned int cs);
+/*
+ * These names are used in several drivers and these declarations will be
+ * removed soon as part of the SPI DM migration. Drop them if driver model is
+ * enabled for SPI.
+ */
#if !CONFIG_IS_ENABLED(DM_SPI)
/**
* Activate a SPI chipselect.
@@ -335,6 +337,7 @@ void spi_cs_activate(struct spi_slave *slave);
* select to the device identified by "slave".
*/
void spi_cs_deactivate(struct spi_slave *slave);
+#endif
/**
* Set transfer speed.
@@ -343,7 +346,6 @@ void spi_cs_deactivate(struct spi_slave *slave);
* @hz: The transfer speed
*/
void spi_set_speed(struct spi_slave *slave, uint hz);
-#endif
/**
* Write 8 bits, then read 8 bits.
@@ -367,8 +369,6 @@ static inline int spi_w8r8(struct spi_slave *slave, unsigned char byte)
return ret < 0 ? ret : din[1];
}
-#if CONFIG_IS_ENABLED(DM_SPI)
-
/**
* struct spi_cs_info - Information about a bus chip select
*
@@ -717,6 +717,5 @@ int dm_spi_get_mmap(struct udevice *dev, ulong *map_basep, uint *map_sizep,
/* Access the operations for a SPI device */
#define spi_get_ops(dev) ((struct dm_spi_ops *)(dev)->driver->ops)
#define spi_emul_get_ops(dev) ((struct dm_spi_emul_ops *)(dev)->driver->ops)
-#endif /* CONFIG_DM_SPI */
#endif /* _SPI_H_ */
diff --git a/include/video.h b/include/video.h
index e7c58e86cb..1a0ffd8037 100644
--- a/include/video.h
+++ b/include/video.h
@@ -19,10 +19,25 @@
struct udevice;
+/**
+ * struct video_uc_platdata - uclass platform data for a video device
+ *
+ * This holds information that the uclass needs to know about each device. It
+ * is accessed using dev_get_uclass_platdata(dev). See 'Theory of operation' at
+ * the top of video-uclass.c for details on how this information is set.
+ *
+ * @align: Frame-buffer alignment, indicating the memory boundary the frame
+ * buffer should start on. If 0, 1MB is assumed
+ * @size: Frame-buffer size, in bytes
+ * @base: Base address of frame buffer, 0 if not yet known
+ * @copy_base: Base address of a hardware copy of the frame buffer. See
+ * CONFIG_VIDEO_COPY.
+ */
struct video_uc_platdata {
uint align;
uint size;
ulong base;
+ ulong copy_base;
};
enum video_polarity {
@@ -63,6 +78,8 @@ enum video_log2_bpp {
* @font_size: Font size in pixels (0 to use a default value)
* @fb: Frame buffer
* @fb_size: Frame buffer size
+ * @copy_fb: Copy of the frame buffer to keep up to date; see struct
+ * video_uc_platdata
* @line_length: Length of each frame buffer line, in bytes. This can be
* set by the driver, but if not, the uclass will set it after
* probing
@@ -89,6 +106,7 @@ struct video_priv {
*/
void *fb;
int fb_size;
+ void *copy_fb;
int line_length;
u32 colour_fg;
u32 colour_bg;
@@ -202,6 +220,29 @@ void video_set_flush_dcache(struct udevice *dev, bool flush);
*/
void video_set_default_colors(struct udevice *dev, bool invert);
+#ifdef CONFIG_VIDEO_COPY
+/**
+ * vidconsole_sync_copy() - Sync back to the copy framebuffer
+ *
+ * This ensures that the copy framebuffer has the same data as the framebuffer
+ * for a particular region. It should be called after the framebuffer is updated
+ *
+ * @from and @to can be in either order. The region between them is synced.
+ *
+ * @dev: Vidconsole device being updated
+ * @from: Start/end address within the framebuffer (->fb)
+ * @to: Other address within the frame buffer
+ * @return 0 if OK, -EFAULT if the start address is before the start of the
+ * frame buffer start
+ */
+int video_sync_copy(struct udevice *dev, void *from, void *to);
+#else
+static inline int video_sync_copy(struct udevice *dev, void *from, void *to)
+{
+ return 0;
+}
+#endif
+
#endif /* CONFIG_DM_VIDEO */
#ifndef CONFIG_DM_VIDEO
diff --git a/include/video_console.h b/include/video_console.h
index 0936ceaaf1..06b798ef10 100644
--- a/include/video_console.h
+++ b/include/video_console.h
@@ -8,6 +8,8 @@
#include <video.h>
+struct video_priv;
+
#define VID_FRAC_DIV 256
#define VID_TO_PIXEL(x) ((x) / VID_FRAC_DIV)
@@ -241,8 +243,6 @@ int vidconsole_put_string(struct udevice *dev, const char *str);
void vidconsole_position_cursor(struct udevice *dev, unsigned col,
unsigned row);
-#ifdef CONFIG_DM_VIDEO
-
/**
* vid_console_color() - convert a color code to a pixel's internal
* representation
@@ -256,6 +256,53 @@ void vidconsole_position_cursor(struct udevice *dev, unsigned col,
*/
u32 vid_console_color(struct video_priv *priv, unsigned int idx);
+#ifdef CONFIG_VIDEO_COPY
+/**
+ * vidconsole_sync_copy() - Sync back to the copy framebuffer
+ *
+ * This ensures that the copy framebuffer has the same data as the framebuffer
+ * for a particular region. It should be called after the framebuffer is updated
+ *
+ * @from and @to can be in either order. The region between them is synced.
+ *
+ * @dev: Vidconsole device being updated
+ * @from: Start/end address within the framebuffer (->fb)
+ * @to: Other address within the frame buffer
+ * @return 0 if OK, -EFAULT if the start address is before the start of the
+ * frame buffer start
+ */
+int vidconsole_sync_copy(struct udevice *dev, void *from, void *to);
+
+/**
+ * vidconsole_memmove() - Perform a memmove() within the frame buffer
+ *
+ * This handles a memmove(), e.g. for scrolling. It also updates the copy
+ * framebuffer.
+ *
+ * @dev: Vidconsole device being updated
+ * @dst: Destination address within the framebuffer (->fb)
+ * @src: Source address within the framebuffer (->fb)
+ * @size: Number of bytes to transfer
+ * @return 0 if OK, -EFAULT if the start address is before the start of the
+ * frame buffer start
+ */
+int vidconsole_memmove(struct udevice *dev, void *dst, const void *src,
+ int size);
+#else
+static inline int vidconsole_sync_copy(struct udevice *dev, void *from,
+ void *to)
+{
+ return 0;
+}
+
+static inline int vidconsole_memmove(struct udevice *dev, void *dst,
+ const void *src, int size)
+{
+ memmove(dst, src, size);
+
+ return 0;
+}
+
#endif
#endif