diff options
Diffstat (limited to 'include')
199 files changed, 1619 insertions, 807 deletions
diff --git a/include/blk.h b/include/blk.h index 41b4d7efa8..69b5a98e56 100644 --- a/include/blk.h +++ b/include/blk.h @@ -34,6 +34,7 @@ enum if_type { IF_TYPE_HOST, IF_TYPE_SYSTEMACE, IF_TYPE_NVME, + IF_TYPE_EFI, IF_TYPE_COUNT, /* Number of interface types */ }; diff --git a/include/common.h b/include/common.h index 436200044f..0fe9439a93 100644 --- a/include/common.h +++ b/include/common.h @@ -364,6 +364,9 @@ int embedded_dtb_select(void); int misc_init_f (void); int misc_init_r (void); +#if defined(CONFIG_VID) +int init_func_vid(void); +#endif /* common/exports.c */ void jumptable_init(void); diff --git a/include/config_fallbacks.h b/include/config_fallbacks.h index 2c4d43d672..9695ee7ffb 100644 --- a/include/config_fallbacks.h +++ b/include/config_fallbacks.h @@ -29,19 +29,6 @@ #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } #endif -#if defined(CONFIG_ENV_IS_IN_FAT) && !defined(CONFIG_FS_FAT) -#define CONFIG_FS_FAT -#endif - -#if (defined(CONFIG_CMD_EXT4) || defined(CONFIG_CMD_EXT2)) && \ - !defined(CONFIG_FS_EXT4) -#define CONFIG_FS_EXT4 -#endif - -#if defined(CONFIG_CMD_EXT4_WRITE) && !defined(CONFIG_EXT4_WRITE) -#define CONFIG_EXT4_WRITE -#endif - /* Rather than repeat this expression each time, add a define for it */ #if defined(CONFIG_IDE) || \ defined(CONFIG_SATA) || \ @@ -52,6 +39,7 @@ defined(CONFIG_MMC) || \ defined(CONFIG_NVME) || \ defined(CONFIG_SYSTEMACE) || \ + (defined(CONFIG_EFI_LOADER) && !defined(CONFIG_SPL_BUILD)) || \ defined(CONFIG_SANDBOX) #define HAVE_BLOCK_DEVICE #endif diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h index b1b672547b..25e6c1f6ad 100644 --- a/include/configs/B4860QDS.h +++ b/include/configs/B4860QDS.h @@ -571,7 +571,6 @@ unsigned long get_board_ddr_clk(void); /* Qman/Bman */ #ifndef CONFIG_NOBQFMAN -#define CONFIG_SYS_DPAA_QBMAN /* Support Q/Bman */ #define CONFIG_SYS_BMAN_NUM_PORTALS 25 #define CONFIG_SYS_BMAN_MEM_BASE 0xf4000000 #ifdef CONFIG_PHYS_64BIT diff --git a/include/configs/M52277EVB.h b/include/configs/M52277EVB.h index 98692df495..72183f284a 100644 --- a/include/configs/M52277EVB.h +++ b/include/configs/M52277EVB.h @@ -18,7 +18,6 @@ * High Level Configuration Options * (easy to change) */ -#define CONFIG_M52277EVB /* M52277EVB board */ #define CONFIG_MCFUART #define CONFIG_SYS_UART_PORT (0) diff --git a/include/configs/M5253DEMO.h b/include/configs/M5253DEMO.h index ff0995e651..91e4bf80b2 100644 --- a/include/configs/M5253DEMO.h +++ b/include/configs/M5253DEMO.h @@ -7,8 +7,6 @@ #ifndef _M5253DEMO_H #define _M5253DEMO_H -#define CONFIG_M5253DEMO /* define board type */ - #define CONFIG_MCFTMR #define CONFIG_MCFUART diff --git a/include/configs/M5253EVBE.h b/include/configs/M5253EVBE.h index d7252a1b62..8d7250a5ba 100644 --- a/include/configs/M5253EVBE.h +++ b/include/configs/M5253EVBE.h @@ -8,8 +8,6 @@ #ifndef _M5253EVBE_H #define _M5253EVBE_H -#define CONFIG_M5253EVBE /* define board type */ - #define CONFIG_MCFTMR #define CONFIG_MCFUART diff --git a/include/configs/M5275EVB.h b/include/configs/M5275EVB.h index bbc45bf7ba..38e785c068 100644 --- a/include/configs/M5275EVB.h +++ b/include/configs/M5275EVB.h @@ -21,7 +21,6 @@ * High Level Configuration Options * (easy to change) */ -#define CONFIG_M5275EVB /* define board type */ #define CONFIG_MCFTMR diff --git a/include/configs/M54418TWR.h b/include/configs/M54418TWR.h index 6469a919f6..3e2b6e174e 100644 --- a/include/configs/M54418TWR.h +++ b/include/configs/M54418TWR.h @@ -18,7 +18,6 @@ * High Level Configuration Options * (easy to change) */ -#define CONFIG_M54418TWR /* M54418TWR board */ #define CONFIG_MCFUART #define CONFIG_SYS_UART_PORT (0) diff --git a/include/configs/MPC8308RDB.h b/include/configs/MPC8308RDB.h index bd0cb6fddc..d348ec9367 100644 --- a/include/configs/MPC8308RDB.h +++ b/include/configs/MPC8308RDB.h @@ -15,7 +15,6 @@ #define CONFIG_E300 1 /* E300 family */ #define CONFIG_MPC830x 1 /* MPC830x family */ #define CONFIG_MPC8308 1 /* MPC8308 CPU specific */ -#define CONFIG_MPC8308RDB 1 /* MPC8308RDB board specific */ #define CONFIG_SYS_TEXT_BASE 0xFE000000 diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h index 9b906a7c77..c7a5ee0aaf 100644 --- a/include/configs/MPC8349EMDS.h +++ b/include/configs/MPC8349EMDS.h @@ -19,7 +19,6 @@ #define CONFIG_E300 1 /* E300 Family */ #define CONFIG_MPC834x 1 /* MPC834x family */ #define CONFIG_MPC8349 1 /* MPC8349 specific */ -#define CONFIG_MPC8349EMDS 1 /* MPC8349EMDS board specific */ #define CONFIG_SYS_TEXT_BASE 0xFE000000 diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h index c88aa95632..e2807a6b4f 100644 --- a/include/configs/MPC8349ITX.h +++ b/include/configs/MPC8349ITX.h @@ -470,14 +470,6 @@ boards, we say we have two, but don't display a message if we find only one. */ #define CONFIG_BOOTP_GATEWAY #define CONFIG_BOOTP_HOSTNAME -#if defined(CONFIG_COMPACT_FLASH) || defined(CONFIG_SATA_SIL3114) \ - || defined(CONFIG_USB_STORAGE) - #define CONFIG_SUPPORT_VFAT -#endif - -#if defined(CONFIG_SATA_SIL3114) || defined(CONFIG_USB_STORAGE) -#endif - /* Watchdog */ #undef CONFIG_WATCHDOG /* watchdog disabled */ diff --git a/include/configs/MigoR.h b/include/configs/MigoR.h index 3cf2f0984a..dbdf3dc0cf 100644 --- a/include/configs/MigoR.h +++ b/include/configs/MigoR.h @@ -10,7 +10,6 @@ #define __MIGO_R_H #define CONFIG_CPU_SH7722 1 -#define CONFIG_MIGO_R 1 #define CONFIG_DISPLAY_BOARDINFO #undef CONFIG_SHOW_BOOT_PROGRESS diff --git a/include/configs/P1023RDB.h b/include/configs/P1023RDB.h index 17ae6cfd40..1863bec33c 100644 --- a/include/configs/P1023RDB.h +++ b/include/configs/P1023RDB.h @@ -270,7 +270,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_LOADADDR 1000000 /* Qman/Bman */ -#define CONFIG_SYS_DPAA_QBMAN /* support Q/Bman */ #define CONFIG_SYS_QMAN_MEM_BASE 0xff000000 #define CONFIG_SYS_QMAN_MEM_PHYS CONFIG_SYS_QMAN_MEM_BASE #define CONFIG_SYS_QMAN_MEM_SIZE 0x00200000 diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 8e71fdfecd..6b9f366502 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -437,7 +437,6 @@ unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_PCIE3_IO_SIZE 0x00010000 /* 64k */ /* Qman/Bman */ -#define CONFIG_SYS_DPAA_QBMAN /* Support Q/Bman */ #define CONFIG_SYS_BMAN_NUM_PORTALS 10 #define CONFIG_SYS_BMAN_MEM_BASE 0xf4000000 #ifdef CONFIG_PHYS_64BIT diff --git a/include/configs/T102xQDS.h b/include/configs/T102xQDS.h index dd3cd6ecc6..2354dc8527 100644 --- a/include/configs/T102xQDS.h +++ b/include/configs/T102xQDS.h @@ -641,7 +641,6 @@ unsigned long get_board_ddr_clk(void); /* Qman/Bman */ #ifndef CONFIG_NOBQFMAN -#define CONFIG_SYS_DPAA_QBMAN /* Support Q/Bman */ #define CONFIG_SYS_BMAN_NUM_PORTALS 10 #define CONFIG_SYS_BMAN_MEM_BASE 0xf4000000 #ifdef CONFIG_PHYS_64BIT diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index 791c6ef1b3..733e44f75c 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -648,7 +648,6 @@ unsigned long get_board_ddr_clk(void); /* Qman/Bman */ #ifndef CONFIG_NOBQFMAN -#define CONFIG_SYS_DPAA_QBMAN /* Support Q/Bman */ #define CONFIG_SYS_BMAN_NUM_PORTALS 10 #define CONFIG_SYS_BMAN_MEM_BASE 0xf4000000 #ifdef CONFIG_PHYS_64BIT diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h index fb79b6a559..e96d3a0d92 100644 --- a/include/configs/T1040QDS.h +++ b/include/configs/T1040QDS.h @@ -531,7 +531,6 @@ unsigned long get_board_ddr_clk(void); /* Qman/Bman */ #ifndef CONFIG_NOBQFMAN -#define CONFIG_SYS_DPAA_QBMAN /* Support Q/Bman */ #define CONFIG_SYS_BMAN_NUM_PORTALS 10 #define CONFIG_SYS_BMAN_MEM_BASE 0xf4000000 #define CONFIG_SYS_BMAN_MEM_PHYS 0xff4000000ull diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index ceb9daaac2..1231c1a6a5 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -641,7 +641,6 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg /* Qman/Bman */ #ifndef CONFIG_NOBQFMAN -#define CONFIG_SYS_DPAA_QBMAN /* Support Q/Bman */ #define CONFIG_SYS_BMAN_NUM_PORTALS 10 #define CONFIG_SYS_BMAN_MEM_BASE 0xf4000000 #define CONFIG_SYS_BMAN_MEM_PHYS 0xff4000000ull diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 43fcc6f5dd..6fbac5f9f6 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -534,7 +534,7 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_PCIE2 /* PCIE controller 2 */ #define CONFIG_PCIE3 /* PCIE controller 3 */ #define CONFIG_PCIE4 /* PCIE controller 4 */ -#define CONFIG_FSL_PCIE_RESET +#define CONFIG_FSL_PCIE_RESET /* pcie reset fix link width 2x-4x*/ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ /* controller 1, direct to uli, tgtid 3, Base address 20000 */ @@ -578,13 +578,11 @@ unsigned long get_board_ddr_clk(void); #ifdef CONFIG_PCI #define CONFIG_PCI_INDIRECT_BRIDGE -#define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */ #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #endif /* Qman/Bman */ #ifndef CONFIG_NOBQFMAN -#define CONFIG_SYS_DPAA_QBMAN /* Support Q/Bman */ #define CONFIG_SYS_BMAN_NUM_PORTALS 18 #define CONFIG_SYS_BMAN_MEM_BASE 0xf4000000 #define CONFIG_SYS_BMAN_MEM_PHYS 0xff4000000ull diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index e1c57de2af..85bda94b57 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -522,7 +522,6 @@ unsigned long get_board_ddr_clk(void); /* Qman/Bman */ #ifndef CONFIG_NOBQFMAN -#define CONFIG_SYS_DPAA_QBMAN /* Support Q/Bman */ #define CONFIG_SYS_BMAN_NUM_PORTALS 18 #define CONFIG_SYS_BMAN_MEM_BASE 0xf4000000 #define CONFIG_SYS_BMAN_MEM_PHYS 0xff4000000ull diff --git a/include/configs/T4240QDS.h b/include/configs/T4240QDS.h index 099e9e1d94..73e91bc9fa 100644 --- a/include/configs/T4240QDS.h +++ b/include/configs/T4240QDS.h @@ -381,7 +381,6 @@ unsigned long get_board_ddr_clk(void); /* Qman/Bman */ #ifndef CONFIG_NOBQFMAN -#define CONFIG_SYS_DPAA_QBMAN /* Support Q/Bman */ #define CONFIG_SYS_BMAN_NUM_PORTALS 50 #define CONFIG_SYS_BMAN_MEM_BASE 0xf4000000 #define CONFIG_SYS_BMAN_MEM_PHYS 0xff4000000ull diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index ecf7f64659..b63c38c8b5 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -542,7 +542,6 @@ unsigned long get_board_ddr_clk(void); /* Qman/Bman */ #ifndef CONFIG_NOBQFMAN -#define CONFIG_SYS_DPAA_QBMAN /* Support Q/Bman */ #define CONFIG_SYS_BMAN_NUM_PORTALS 50 #define CONFIG_SYS_BMAN_MEM_BASE 0xf4000000 #define CONFIG_SYS_BMAN_MEM_PHYS 0xff4000000ull diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h index 0c6bcae33c..9d27358031 100644 --- a/include/configs/TQM834x.h +++ b/include/configs/TQM834x.h @@ -18,7 +18,6 @@ #define CONFIG_E300 1 /* E300 Family */ #define CONFIG_MPC834x 1 /* MPC834x specific */ #define CONFIG_MPC8349 1 /* MPC8349 specific */ -#define CONFIG_TQM834X 1 /* TQM834X board specific */ #define CONFIG_SYS_TEXT_BASE 0x80000000 diff --git a/include/configs/adp-ag101p.h b/include/configs/adp-ag101p.h index f2de384631..f83659373e 100644 --- a/include/configs/adp-ag101p.h +++ b/include/configs/adp-ag101p.h @@ -14,8 +14,6 @@ /* * CPU and Board Configuration Options */ -#define CONFIG_ADP_AG101P - #define CONFIG_USE_INTERRUPT #define CONFIG_SKIP_LOWLEVEL_INIT diff --git a/include/configs/alt.h b/include/configs/alt.h index 35518da625..e35ddc8ed8 100644 --- a/include/configs/alt.h +++ b/include/configs/alt.h @@ -44,7 +44,6 @@ #define CONFIG_SPI_FLASH_QUAD /* SH Ether */ -#define CONFIG_SH_ETHER #define CONFIG_SH_ETHER_USE_PORT 0 #define CONFIG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index 856c546fc1..31ab503dca 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -228,8 +228,6 @@ * add mass storage support and for gadget we add both RNDIS ethernet * and DFU. */ -#define CONFIG_USB_MUSB_DSPS -#define CONFIG_USB_MUSB_PIO_ONLY #define CONFIG_USB_MUSB_DISABLE_BULK_COMBINE_SPLIT #define CONFIG_AM335X_USB0 #define CONFIG_AM335X_USB0_MODE MUSB_PERIPHERAL diff --git a/include/configs/am335x_shc.h b/include/configs/am335x_shc.h index 32439f5c47..e2d329acab 100644 --- a/include/configs/am335x_shc.h +++ b/include/configs/am335x_shc.h @@ -17,8 +17,6 @@ /* settings we don;t want on this board */ #undef CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC -#undef CONFIG_CMD_EXT4 -#undef CONFIG_CMD_EXT4_WRITE #undef CONFIG_CMD_SPI #define CONFIG_CMD_CACHE diff --git a/include/configs/am3517_crane.h b/include/configs/am3517_crane.h index 400a06eeb2..16212ef9fb 100644 --- a/include/configs/am3517_crane.h +++ b/include/configs/am3517_crane.h @@ -72,8 +72,6 @@ * Enable CONFIG_USB_MUSB_HCD for Host functionalities MSC, keyboard * Enable CONFIG_USB_MUSB_UDC for Device functionalities. */ -#define CONFIG_USB_AM35X 1 -#define CONFIG_USB_MUSB_HCD 1 #ifdef CONFIG_USB_AM35X diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h index 33ed85e6a5..ac5070d8cf 100644 --- a/include/configs/am3517_evm.h +++ b/include/configs/am3517_evm.h @@ -42,8 +42,6 @@ * Enable CONFIG_USB_MUSB_HOST for Host functionalities MSC, keyboard * Enable CONFIG_USB_MUSB_GADGET for Device functionalities. */ -#define CONFIG_USB_MUSB_AM35X -#define CONFIG_USB_MUSB_PIO_ONLY #ifdef CONFIG_USB_MUSB_AM35X diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h index 302181bd2d..77f8e7689c 100644 --- a/include/configs/am43xx_evm.h +++ b/include/configs/am43xx_evm.h @@ -77,7 +77,6 @@ #define CONFIG_SYS_USB_FAT_BOOT_PARTITION 1 #define CONFIG_USB_XHCI_OMAP -#define CONFIG_OMAP_USB_PHY #define CONFIG_AM437X_USB2PHY2_HOST #endif diff --git a/include/configs/am57xx_evm.h b/include/configs/am57xx_evm.h index 28618a579c..7546b3f9d0 100644 --- a/include/configs/am57xx_evm.h +++ b/include/configs/am57xx_evm.h @@ -92,7 +92,6 @@ /* USB xHCI HOST */ #define CONFIG_USB_XHCI_OMAP -#define CONFIG_OMAP_USB_PHY #define CONFIG_OMAP_USB3PHY1_HOST /* SATA */ diff --git a/include/configs/amcore.h b/include/configs/amcore.h index 595bd57a7f..b9fc5b5d08 100644 --- a/include/configs/amcore.h +++ b/include/configs/amcore.h @@ -9,7 +9,6 @@ #ifndef __AMCORE_CONFIG_H #define __AMCORE_CONFIG_H -#define CONFIG_AMCORE #define CONFIG_HOSTNAME AMCORE #define CONFIG_MCFTMR diff --git a/include/configs/ap325rxa.h b/include/configs/ap325rxa.h index c09769dbed..4c2a2bd737 100644 --- a/include/configs/ap325rxa.h +++ b/include/configs/ap325rxa.h @@ -11,7 +11,6 @@ #define __AP325RXA_H #define CONFIG_CPU_SH7723 1 -#define CONFIG_AP325RXA 1 #define CONFIG_DISPLAY_BOARDINFO #undef CONFIG_SHOW_BOOT_PROGRESS diff --git a/include/configs/ap_sh4a_4a.h b/include/configs/ap_sh4a_4a.h index 717ec80f82..2a01000803 100644 --- a/include/configs/ap_sh4a_4a.h +++ b/include/configs/ap_sh4a_4a.h @@ -10,7 +10,6 @@ #define __AP_SH4A_4A_H #define CONFIG_CPU_SH7734 1 -#define CONFIG_AP_SH4A_4A 1 #define CONFIG_400MHZ_MODE 1 #define CONFIG_SYS_TEXT_BASE 0x8BFC0000 @@ -19,7 +18,6 @@ #undef CONFIG_SHOW_BOOT_PROGRESS /* Ether */ -#define CONFIG_SH_ETHER 1 #define CONFIG_SH_ETHER_USE_PORT (0) #define CONFIG_SH_ETHER_PHY_ADDR (0x0) #define CONFIG_SH_ETHER_PHY_MODE (PHY_INTERFACE_MODE_GMII) diff --git a/include/configs/apf27.h b/include/configs/apf27.h index 8294101029..24afc84a02 100644 --- a/include/configs/apf27.h +++ b/include/configs/apf27.h @@ -204,7 +204,6 @@ */ #define CONFIG_MTD_DEVICE #define CONFIG_MTD_PARTITIONS -#define CONFIG_SUPPORT_VFAT /* * Ethernet (on SOC imx FEC) diff --git a/include/configs/armadillo-800eva.h b/include/configs/armadillo-800eva.h index 66ae76b2d2..94aecb7de1 100644 --- a/include/configs/armadillo-800eva.h +++ b/include/configs/armadillo-800eva.h @@ -88,7 +88,6 @@ #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE) /* SH Ether */ -#define CONFIG_SH_ETHER #define CONFIG_SH_ETHER_USE_PORT 0 #define CONFIG_SH_ETHER_PHY_ADDR 0x0 #define CONFIG_SH_ETHER_BASE_ADDR 0xe9a00000 diff --git a/include/configs/aspenite.h b/include/configs/aspenite.h index 36d74f3b26..d2f4c441c8 100644 --- a/include/configs/aspenite.h +++ b/include/configs/aspenite.h @@ -16,7 +16,6 @@ #define CONFIG_SHEEVA_88SV331xV5 1 /* CPU Core subversion */ #define CONFIG_ARMADA100 1 /* SOC Family Name */ #define CONFIG_ARMADA168 1 /* SOC Used on this Board */ -#define CONFIG_MACH_ASPENITE /* Machine type */ #define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ /* diff --git a/include/configs/astro_mcf5373l.h b/include/configs/astro_mcf5373l.h index ceab037cc1..540db79a27 100644 --- a/include/configs/astro_mcf5373l.h +++ b/include/configs/astro_mcf5373l.h @@ -39,8 +39,6 @@ #error No card type defined! #endif -#define CONFIG_ASTRO5373L /* define board type */ - /* Command line configuration */ /* * CONFIG_RAM defines if u-boot is loaded via BDM (or started from diff --git a/include/configs/axs10x.h b/include/configs/axs10x.h index 29c595970a..a9c4d1ab23 100644 --- a/include/configs/axs10x.h +++ b/include/configs/axs10x.h @@ -29,7 +29,7 @@ (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE) #define CONFIG_SYS_MALLOC_LEN SZ_2M -#define CONFIG_SYS_BOOTM_LEN SZ_32M +#define CONFIG_SYS_BOOTM_LEN SZ_128M #define CONFIG_SYS_LOAD_ADDR 0x82000000 /* diff --git a/include/configs/baltos.h b/include/configs/baltos.h index 3fc9e2f544..939ee3b4ad 100644 --- a/include/configs/baltos.h +++ b/include/configs/baltos.h @@ -272,8 +272,6 @@ * add mass storage support and for gadget we add both RNDIS ethernet * and DFU. */ -#define CONFIG_USB_MUSB_DSPS -#define CONFIG_USB_MUSB_PIO_ONLY #define CONFIG_USB_MUSB_DISABLE_BULK_COMBINE_SPLIT #define CONFIG_AM335X_USB0 #define CONFIG_AM335X_USB0_MODE MUSB_HOST diff --git a/include/configs/bav335x.h b/include/configs/bav335x.h index 8917bbed6f..d084af8ada 100644 --- a/include/configs/bav335x.h +++ b/include/configs/bav335x.h @@ -394,8 +394,6 @@ DEFAULT_LINUX_BOOT_ENV \ * add mass storage support and for gadget we add both RNDIS ethernet * and DFU. */ -#define CONFIG_USB_MUSB_DSPS -#define CONFIG_USB_MUSB_PIO_ONLY #define CONFIG_USB_MUSB_DISABLE_BULK_COMBINE_SPLIT #define CONFIG_AM335X_USB0 #define CONFIG_AM335X_USB0_MODE MUSB_PERIPHERAL diff --git a/include/configs/brppt1.h b/include/configs/brppt1.h index 2dadcaecf5..a8022b87d5 100644 --- a/include/configs/brppt1.h +++ b/include/configs/brppt1.h @@ -210,8 +210,6 @@ MMCARGS #endif /* CONFIG_NAND */ /* USB configuration */ -#define CONFIG_USB_MUSB_DSPS -#define CONFIG_USB_MUSB_PIO_ONLY #define CONFIG_USB_MUSB_DISABLE_BULK_COMBINE_SPLIT #define CONFIG_AM335X_USB0 #define CONFIG_AM335X_USB0_MODE MUSB_HOST @@ -245,13 +243,5 @@ MMCARGS #else #error "no storage for Environment defined!" #endif -/* - * Common filesystems support. When we have removable storage we - * enabled a number of useful commands and support. - */ -#if defined(CONFIG_MMC) || defined(CONFIG_USB_STORAGE) -#define CONFIG_FS_EXT4 -#define CONFIG_EXT4_WRITE -#endif /* CONFIG_MMC, ... */ #endif /* ! __CONFIG_BRPPT1_H__ */ diff --git a/include/configs/brxre1.h b/include/configs/brxre1.h index 8f92d7a958..09042d4451 100644 --- a/include/configs/brxre1.h +++ b/include/configs/brxre1.h @@ -80,8 +80,6 @@ BUR_COMMON_ENV \ #define CONFIG_INITRD_TAG /* USB configuration */ -#define CONFIG_USB_MUSB_DSPS -#define CONFIG_USB_MUSB_PIO_ONLY #define CONFIG_USB_MUSB_DISABLE_BULK_COMBINE_SPLIT #define CONFIG_AM335X_USB0 #define CONFIG_AM335X_USB0_MODE MUSB_HOST diff --git a/include/configs/calimain.h b/include/configs/calimain.h index 60068d1fbb..7dfc1fa1ec 100644 --- a/include/configs/calimain.h +++ b/include/configs/calimain.h @@ -21,16 +21,12 @@ /* * SoC Configuration */ -#define CONFIG_MACH_DAVINCI_CALIMAIN -#define CONFIG_SOC_DA8XX /* TI DA8xx SoC */ -#define CONFIG_SOC_DA850 /* TI DA850 SoC */ #define CONFIG_SYS_EXCEPTION_VECTORS_HIGH #define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID) #define CONFIG_SYS_OSCIN_FREQ calimain_get_osc_freq() #define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE #define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID) #define CONFIG_SYS_TEXT_BASE 0x60000000 -#define CONFIG_DA850_LOWLEVEL #define CONFIG_ARCH_CPU_INIT #define CONFIG_DA8XX_GPIO #define CONFIG_HW_WATCHDOG diff --git a/include/configs/chiliboard.h b/include/configs/chiliboard.h index 92fd235d5b..89740ba1e0 100644 --- a/include/configs/chiliboard.h +++ b/include/configs/chiliboard.h @@ -152,9 +152,7 @@ /* NAND: SPL related configs */ /* USB configuration */ -#define CONFIG_USB_MUSB_DSPS #define CONFIG_ARCH_MISC_INIT -#define CONFIG_USB_MUSB_PIO_ONLY #define CONFIG_USB_MUSB_DISABLE_BULK_COMBINE_SPLIT #define CONFIG_AM335X_USB1 #define CONFIG_AM335X_USB1_MODE MUSB_HOST diff --git a/include/configs/cl-som-am57x.h b/include/configs/cl-som-am57x.h index 6935b06d5c..4f64672baf 100644 --- a/include/configs/cl-som-am57x.h +++ b/include/configs/cl-som-am57x.h @@ -77,7 +77,6 @@ /* USB xHCI HOST */ #define CONFIG_USB_XHCI_OMAP -#define CONFIG_OMAP_USB_PHY #define CONFIG_OMAP_USB3PHY1_HOST /* USB Networking options */ diff --git a/include/configs/clearfog.h b/include/configs/clearfog.h index bf87bac300..512c4632f1 100644 --- a/include/configs/clearfog.h +++ b/include/configs/clearfog.h @@ -40,11 +40,6 @@ */ #define CONFIG_SYS_MMC_BASE MVEBU_SDIO_BASE -/* Partition support */ - -/* Additional FS support/configuration */ -#define CONFIG_SUPPORT_VFAT - /* USB/EHCI configuration */ #define CONFIG_EHCI_IS_TDI diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h index ec3e6e6ca5..da870b9baa 100644 --- a/include/configs/cm_fx6.h +++ b/include/configs/cm_fx6.h @@ -67,6 +67,7 @@ #define CONFIG_ENV_OFFSET (768 * 1024) #ifndef CONFIG_SPL_BUILD +#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG #define CONFIG_EXTRA_ENV_SETTINGS \ "fdt_high=0xffffffff\0" \ "initrd_high=0xffffffff\0" \ @@ -75,6 +76,7 @@ "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ "pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \ + "fdtfile=undefined\0" \ "stdin=serial,usbkbd\0" \ "stdout=serial,vga\0" \ "stderr=serial,vga\0" \ @@ -152,6 +154,11 @@ "fi;" \ "run setupnandboot;" \ "run nandboot;\0" \ + "findfdt="\ + "if test $board_name = Utilite && test $board_rev = MX6Q ; then " \ + "setenv fdtfile imx6q-utilite-pro.dtb; fi; " \ + "if test $fdtfile = undefined; then " \ + "echo WARNING: Could not determine dtb to use; fi; \0" \ BOOTENV #define CONFIG_PREBOOT "usb start;sf probe" diff --git a/include/configs/cm_t35.h b/include/configs/cm_t35.h index dc1b6b5721..3c64cb575c 100644 --- a/include/configs/cm_t35.h +++ b/include/configs/cm_t35.h @@ -71,11 +71,6 @@ #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 115200} -/* USB */ -#define CONFIG_USB_OMAP3 -#define CONFIG_USB_MUSB_UDC -#define CONFIG_TWL4030_USB - /* USB device configuration */ #define CONFIG_USB_DEVICE #define CONFIG_USB_TTY diff --git a/include/configs/cm_t3517.h b/include/configs/cm_t3517.h index a472b9f538..fe8b39a65b 100644 --- a/include/configs/cm_t3517.h +++ b/include/configs/cm_t3517.h @@ -78,14 +78,10 @@ 115200} /* USB */ -#define CONFIG_USB_MUSB_AM35X #ifndef CONFIG_USB_MUSB_AM35X -#define CONFIG_USB_OMAP3 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 146 #define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 147 -#else /* !CONFIG_USB_MUSB_AM35X */ -#define CONFIG_USB_MUSB_PIO_ONLY #endif /* CONFIG_USB_MUSB_AM35X */ /* commands to include */ diff --git a/include/configs/cm_t43.h b/include/configs/cm_t43.h index a2224915e7..a564b86c8c 100644 --- a/include/configs/cm_t43.h +++ b/include/configs/cm_t43.h @@ -55,7 +55,6 @@ /* USB support */ #define CONFIG_USB_XHCI_OMAP -#define CONFIG_OMAP_USB_PHY #define CONFIG_AM437X_USB2PHY2_HOST /* SPI Flash support */ diff --git a/include/configs/controlcenterdc.h b/include/configs/controlcenterdc.h index a882fa650b..bf324bbbbd 100644 --- a/include/configs/controlcenterdc.h +++ b/include/configs/controlcenterdc.h @@ -54,9 +54,6 @@ #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ CONFIG_SYS_SCSI_MAX_LUN) -/* Additional FS support/configuration */ -#define CONFIG_SUPPORT_VFAT - /* USB/EHCI configuration */ #define CONFIG_EHCI_IS_TDI diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index de9bc532fe..0e9dae63c7 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -453,7 +453,6 @@ #define CONFIG_SYS_PCIE4_IO_SIZE 0x00010000 /* 64k */ /* Qman/Bman */ -#define CONFIG_SYS_DPAA_QBMAN /* Support Q/Bman */ #define CONFIG_SYS_BMAN_NUM_PORTALS 10 #define CONFIG_SYS_BMAN_MEM_BASE 0xf4000000 #ifdef CONFIG_PHYS_64BIT diff --git a/include/configs/cyrus.h b/include/configs/cyrus.h index 942fbe2849..3da91e80c8 100644 --- a/include/configs/cyrus.h +++ b/include/configs/cyrus.h @@ -7,8 +7,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_CYRUS - #if !defined(CONFIG_ARCH_P5020) && !defined(CONFIG_ARCH_P5040) #error Must call Cyrus CONFIG with a specific CPU enabled. #endif @@ -316,7 +314,6 @@ #define CONFIG_SYS_PCIE4_IO_SIZE 0x00010000 /* 64k */ /* Qman/Bman */ -#define CONFIG_SYS_DPAA_QBMAN /* Support Q/Bman */ #define CONFIG_SYS_BMAN_NUM_PORTALS 10 #define CONFIG_SYS_BMAN_MEM_BASE 0xf4000000 #ifdef CONFIG_PHYS_64BIT diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index 43646490ec..2a6916b92e 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -33,9 +33,6 @@ /* * SoC Configuration */ -#define CONFIG_MACH_DAVINCI_DA850_EVM -#define CONFIG_SOC_DA8XX /* TI DA8xx SoC */ -#define CONFIG_SOC_DA850 /* TI DA850 SoC */ #define CONFIG_SYS_EXCEPTION_VECTORS_HIGH #define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID) #define CONFIG_SYS_OSCIN_FREQ 24000000 @@ -47,7 +44,6 @@ #define CONFIG_DA8XX_GPIO #define CONFIG_SYS_TEXT_BASE 0x60000000 #define CONFIG_SYS_DV_NOR_BOOT_CFG (0x11) -#define CONFIG_DA850_LOWLEVEL #else #define CONFIG_SYS_TEXT_BASE 0xc1080000 #endif @@ -150,7 +146,6 @@ #define CONFIG_CONS_INDEX 1 /* use UART0 for console */ #define CONFIG_SPI -#define CONFIG_DAVINCI_SPI #define CONFIG_SYS_SPI_CLK clk_get(DAVINCI_SPI1_CLKID) #ifdef CONFIG_SPL_BUILD #define CONFIG_SYS_SPI_BASE DAVINCI_SPI1_BASE @@ -303,17 +298,11 @@ #define CONFIG_CLOCKS #endif -#ifndef CONFIG_DRIVER_TI_EMAC -#endif - #ifdef CONFIG_USE_NAND #define CONFIG_MTD_DEVICE #define CONFIG_MTD_PARTITIONS #endif -#ifdef CONFIG_USE_SPIFLASH -#endif - #if !defined(CONFIG_USE_NAND) && \ !defined(CONFIG_USE_NOR) && \ !defined(CONFIG_USE_SPIFLASH) diff --git a/include/configs/db-88f6720.h b/include/configs/db-88f6720.h index cdaaced2eb..67943bab3d 100644 --- a/include/configs/db-88f6720.h +++ b/include/configs/db-88f6720.h @@ -49,9 +49,6 @@ #define CONFIG_SYS_ALT_MEMTEST -/* Additional FS support/configuration */ -#define CONFIG_SUPPORT_VFAT - /* * mv-common.h should be defined after CMD configs since it used them * to enable certain macros diff --git a/include/configs/db-88f6820-amc.h b/include/configs/db-88f6820-amc.h index b0e988d234..69ec662454 100644 --- a/include/configs/db-88f6820-amc.h +++ b/include/configs/db-88f6820-amc.h @@ -30,11 +30,6 @@ #define CONFIG_SF_DEFAULT_SPEED 1000000 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 -/* Partition support */ - -/* Additional FS support/configuration */ -#define CONFIG_SUPPORT_VFAT - /* USB/EHCI configuration */ #define CONFIG_EHCI_IS_TDI diff --git a/include/configs/db-88f6820-gp.h b/include/configs/db-88f6820-gp.h index 32f93f2f46..a3ab6ef037 100644 --- a/include/configs/db-88f6820-gp.h +++ b/include/configs/db-88f6820-gp.h @@ -50,11 +50,6 @@ #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ CONFIG_SYS_SCSI_MAX_LUN) -/* Partition support */ - -/* Additional FS support/configuration */ -#define CONFIG_SUPPORT_VFAT - /* USB/EHCI configuration */ #define CONFIG_EHCI_IS_TDI diff --git a/include/configs/db-mv784mp-gp.h b/include/configs/db-mv784mp-gp.h index 3dcc28710b..524a1cabc6 100644 --- a/include/configs/db-mv784mp-gp.h +++ b/include/configs/db-mv784mp-gp.h @@ -51,9 +51,6 @@ #define CONFIG_SYS_SATA_MAX_DEVICE 2 #define CONFIG_LBA48 -/* Additional FS support/configuration */ -#define CONFIG_SUPPORT_VFAT - /* PCIe support */ #ifndef CONFIG_SPL_BUILD #define CONFIG_PCI_MVEBU diff --git a/include/configs/dockstar.h b/include/configs/dockstar.h index 1802a6e5c0..72386a671e 100644 --- a/include/configs/dockstar.h +++ b/include/configs/dockstar.h @@ -17,7 +17,6 @@ */ #define CONFIG_FEROCEON_88FR131 1 /* CPU Core subversion */ #define CONFIG_KW88F6281 1 /* SOC Name */ -#define CONFIG_MACH_DOCKSTAR /* Machine type */ #define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ /* diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h index f777d576dd..ff90b6df72 100644 --- a/include/configs/dra7xx_evm.h +++ b/include/configs/dra7xx_evm.h @@ -144,7 +144,6 @@ /* USB xHCI HOST */ #define CONFIG_USB_XHCI_OMAP -#define CONFIG_OMAP_USB_PHY #define CONFIG_OMAP_USB2PHY2_HOST /* SATA */ diff --git a/include/configs/dragonboard410c.h b/include/configs/dragonboard410c.h index d2447b27d8..530d667da8 100644 --- a/include/configs/dragonboard410c.h +++ b/include/configs/dragonboard410c.h @@ -23,7 +23,7 @@ #define CONFIG_SYS_TEXT_BASE 0x80080000 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0) #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x80000) -#define CONFIG_SYS_BOOTM_LEN 0x1000000 /* 16MB max kernel size */ +#define CONFIG_SYS_BOOTM_LEN SZ_64M /* UART */ @@ -92,7 +92,7 @@ REFLASH(dragonboard/u-boot.img, 8)\ "initrd_high=0xffffffffffffffff\0" \ "linux_image=Image\0" \ "kernel_addr_r=0x81000000\0"\ - "fdtfile=apq8016-sbc.dtb\0" \ + "fdtfile=qcom/apq8016-sbc.dtb\0" \ "fdt_addr_r=0x83000000\0"\ "ramdisk_addr_r=0x84000000\0"\ "scriptaddr=0x90000000\0"\ diff --git a/include/configs/dragonboard820c.h b/include/configs/dragonboard820c.h new file mode 100644 index 0000000000..e28a956e92 --- /dev/null +++ b/include/configs/dragonboard820c.h @@ -0,0 +1,73 @@ +/* + * Board configuration file for Dragonboard 410C + * + * (C) Copyright 2017 Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIGS_DRAGONBOARD820C_H +#define __CONFIGS_DRAGONBOARD820C_H + +#include <linux/sizes.h> +#include <asm/arch/sysmap-apq8096.h> + +#define CONFIG_MISC_INIT_R /* To stop autoboot */ + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 2 + +#define PHYS_SDRAM_SIZE 0xC0000000 +#define PHYS_SDRAM_1 0x80000000 +#define PHYS_SDRAM_1_SIZE 0x60000000 +#define PHYS_SDRAM_2 0x100000000 +#define PHYS_SDRAM_2_SIZE 0x5ea4ffff + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_TEXT_BASE 0x80080000 +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0) +#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x80000) +#define CONFIG_SYS_BOOTM_LEN SZ_64M +#define CONFIG_SYS_LDSCRIPT "board/qualcomm/dragonboard820c/u-boot.lds" + +/* Generic Timer Definitions */ +#define COUNTER_FREQUENCY 19000000 + +/* Partition table support */ +#define HAVE_BLOCK_DEVICE + +/* BOOTP options */ +#define CONFIG_BOOTP_BOOTFILESIZE + +#ifndef CONFIG_SPL_BUILD +#include <config_distro_defaults.h> +#include <config_distro_bootcmd.h> +#endif + +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 0) + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "loadaddr=0x95000000\0" \ + "fdt_high=0xffffffffffffffff\0" \ + "initrd_high=0xffffffffffffffff\0" \ + "linux_image=uImage\0" \ + "kernel_addr_r=0x95000000\0"\ + "fdtfile=qcom/apq8096-db820c.dtb\0" \ + "fdt_addr_r=0x93000000\0"\ + "ramdisk_addr_r=0x91000000\0"\ + "scriptaddr=0x90000000\0"\ + "pxefile_addr_r=0x90100000\0"\ + BOOTENV + +#define CONFIG_ENV_SIZE 0x4000 +#define CONFIG_ENV_VARS_UBOOT_CONFIG + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + SZ_8M) + +/* Monitor Command Prompt */ +#define CONFIG_SYS_CBSIZE 512 +#define CONFIG_SYS_MAXARGS 64 + +#endif diff --git a/include/configs/ds414.h b/include/configs/ds414.h index c201dbf4d3..c840c935b2 100644 --- a/include/configs/ds414.h +++ b/include/configs/ds414.h @@ -68,7 +68,6 @@ #endif /* why is this only defined in mv-common.h if CONFIG_DM is undefined? */ -#define CONFIG_SUPPORT_VFAT #define CONFIG_SYS_MVFS /* diff --git a/include/configs/ea20.h b/include/configs/ea20.h index c5e6e9ef72..efc72b3a45 100644 --- a/include/configs/ea20.h +++ b/include/configs/ea20.h @@ -24,9 +24,6 @@ /* * SoC Configuration */ -#define CONFIG_MACH_DAVINCI_DA850_EVM -#define CONFIG_SOC_DA8XX /* TI DA8xx SoC */ -#define CONFIG_SOC_DA850 /* TI DA850 SoC */ #define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID) #define CONFIG_SYS_OSCIN_FREQ 24000000 #define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE @@ -61,7 +58,6 @@ #define CONFIG_CONS_INDEX 1 /* use UART0 for console */ #define CONFIG_SPI -#define CONFIG_DAVINCI_SPI #define CONFIG_SYS_SPI_BASE DAVINCI_SPI1_BASE #define CONFIG_SYS_SPI_CLK clk_get(DAVINCI_SPI1_CLKID) #define CONFIG_SF_DEFAULT_SPEED 30000000 diff --git a/include/configs/eco5pk.h b/include/configs/eco5pk.h index 9dbd7a2331..a75932f20f 100644 --- a/include/configs/eco5pk.h +++ b/include/configs/eco5pk.h @@ -15,8 +15,6 @@ #include "tam3517-common.h" -#undef CONFIG_USB_OMAP3 - /* Our console port is port3 */ #undef CONFIG_CONS_INDEX #undef CONFIG_SYS_NS16550_COM1 diff --git a/include/configs/ecovec.h b/include/configs/ecovec.h index 8cb3efc96d..32d679d019 100644 --- a/include/configs/ecovec.h +++ b/include/configs/ecovec.h @@ -23,7 +23,6 @@ */ #define CONFIG_CPU_SH7724 1 -#define CONFIG_ECOVEC 1 #define CONFIG_ECOVEC_ROMIMAGE_ADDR 0xA0040000 #define CONFIG_SYS_TEXT_BASE 0x8FFC0000 @@ -45,7 +44,6 @@ #define CONFIG_SH_I2C_CLOCK 41666666 /* Ether */ -#define CONFIG_SH_ETHER 1 #define CONFIG_SH_ETHER_USE_PORT (0) #define CONFIG_SH_ETHER_PHY_ADDR (0x1f) #define CONFIG_PHY_SMSC 1 diff --git a/include/configs/edminiv2.h b/include/configs/edminiv2.h index 2b7a5d7c5c..167fcf2e12 100644 --- a/include/configs/edminiv2.h +++ b/include/configs/edminiv2.h @@ -35,7 +35,6 @@ #define CONFIG_MARVELL 1 #define CONFIG_FEROCEON 1 /* CPU Core subversion */ #define CONFIG_88F5182 1 /* SOC Name */ -#define CONFIG_MACH_EDMINIV2 1 /* Machine type */ #include <asm/arch/orion5x.h> /* @@ -166,7 +165,6 @@ */ #ifdef CONFIG_CMD_USB #define ORION5X_USB20_HOST_PORT_BASE ORION5X_USB20_PORT0_BASE -#define CONFIG_SUPPORT_VFAT #endif /* CONFIG_CMD_USB */ /* diff --git a/include/configs/espt.h b/include/configs/espt.h index 628406ae6b..65221fce8e 100644 --- a/include/configs/espt.h +++ b/include/configs/espt.h @@ -11,7 +11,6 @@ #define __ESPT_H #define CONFIG_CPU_SH7763 1 -#define CONFIG_ESPT 1 #define __LITTLE_ENDIAN 1 #define CONFIG_ENV_OVERWRITE 1 @@ -78,7 +77,6 @@ #define CONFIG_SYS_TMU_CLK_DIV 4 /* Ether */ -#define CONFIG_SH_ETHER 1 #define CONFIG_SH_ETHER_USE_PORT (1) #define CONFIG_SH_ETHER_PHY_ADDR (0x00) #define CONFIG_BITBANGMII diff --git a/include/configs/goflexhome.h b/include/configs/goflexhome.h index 16e55b0c2b..0dc8ed143e 100644 --- a/include/configs/goflexhome.h +++ b/include/configs/goflexhome.h @@ -20,7 +20,6 @@ */ #define CONFIG_FEROCEON_88FR131 1 /* CPU Core subversion */ #define CONFIG_KW88F6281 1 /* SOC Name */ -#define CONFIG_MACH_GOFLEXHOME /* Machine type */ #define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ /* diff --git a/include/configs/gose.h b/include/configs/gose.h index 610ba1a7ac..fab0edd5e6 100644 --- a/include/configs/gose.h +++ b/include/configs/gose.h @@ -44,7 +44,6 @@ #define CONFIG_SH_QSPI /* SH Ether */ -#define CONFIG_SH_ETHER #define CONFIG_SH_ETHER_USE_PORT 0 #define CONFIG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII diff --git a/include/configs/gplugd.h b/include/configs/gplugd.h index dddd300fb5..67f06722f2 100644 --- a/include/configs/gplugd.h +++ b/include/configs/gplugd.h @@ -85,6 +85,4 @@ #define CONFIG_EHCI_IS_TDI #endif /* CONFIG_CMD_USB */ -#define CONFIG_SUPPORT_VFAT - #endif /* __CONFIG_GPLUGD_H */ diff --git a/include/configs/guruplug.h b/include/configs/guruplug.h index b13c6c9279..dcb2a698f8 100644 --- a/include/configs/guruplug.h +++ b/include/configs/guruplug.h @@ -14,7 +14,6 @@ * High Level Configuration Options (easy to change) */ #define CONFIG_SHEEVA_88SV131 1 /* CPU Core subversion */ -#define CONFIG_MACH_GURUPLUG /* Machine type */ /* * Standard filesystems diff --git a/include/configs/hikey.h b/include/configs/hikey.h index 7eaa6e4667..130c7694bf 100644 --- a/include/configs/hikey.h +++ b/include/configs/hikey.h @@ -66,8 +66,6 @@ /* SD/MMC configuration */ #define CONFIG_BOUNCE_BUFFER -#define CONFIG_FS_EXT4 - /* Command line configuration */ #define CONFIG_MTD_PARTITIONS diff --git a/include/configs/hsdk.h b/include/configs/hsdk.h index 0ac8022275..e17b56e9bd 100644 --- a/include/configs/hsdk.h +++ b/include/configs/hsdk.h @@ -29,7 +29,7 @@ (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE) #define CONFIG_SYS_MALLOC_LEN SZ_2M -#define CONFIG_SYS_BOOTM_LEN SZ_32M +#define CONFIG_SYS_BOOTM_LEN SZ_128M #define CONFIG_SYS_LOAD_ADDR 0x82000000 /* diff --git a/include/configs/ids8313.h b/include/configs/ids8313.h index b43c8c711e..12eb07d1f7 100644 --- a/include/configs/ids8313.h +++ b/include/configs/ids8313.h @@ -17,7 +17,6 @@ */ #define CONFIG_MPC831x #define CONFIG_MPC8313 -#define CONFIG_IDS8313 #define CONFIG_FSL_ELBC diff --git a/include/configs/ipam390.h b/include/configs/ipam390.h index 1683855ac0..618bf72da3 100644 --- a/include/configs/ipam390.h +++ b/include/configs/ipam390.h @@ -24,9 +24,6 @@ /* * SoC Configuration */ -#define CONFIG_MACH_DAVINCI_DA850_EVM -#define CONFIG_SOC_DA8XX /* TI DA8xx SoC */ -#define CONFIG_SOC_DA850 /* TI DA850 SoC */ #define CONFIG_SYS_EXCEPTION_VECTORS_HIGH #define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID) #define CONFIG_SYS_OSCIN_FREQ 24000000 diff --git a/include/configs/k2g_evm.h b/include/configs/k2g_evm.h index 0a38922a51..f00ca1c233 100644 --- a/include/configs/k2g_evm.h +++ b/include/configs/k2g_evm.h @@ -34,11 +34,13 @@ "findfdt="\ "if test $board_name = 66AK2GGP; then " \ "setenv name_fdt keystone-k2g-evm.dtb; " \ + "else if test $board_name = 66AK2GG1; then " \ + "setenv name_fdt keystone-k2g-evm.dtb; " \ "else if test $board_name = 66AK2GIC; then " \ "setenv name_fdt keystone-k2g-ice.dtb; " \ "else if test $name_fdt = undefined; then " \ "echo WARNING: Could not determine device tree to use;"\ - "fi;fi;fi; setenv fdtfile ${name_fdt}\0" \ + "fi;fi;fi;fi; setenv fdtfile ${name_fdt}\0" \ "name_mon=skern-k2g.bin\0" \ "name_ubi=k2g-evm-ubifs.ubi\0" \ "name_uboot=u-boot-spi-k2g-evm.gph\0" \ @@ -74,7 +76,7 @@ #endif /* SPL SPI Loader Configuration */ -#define CONFIG_SPL_TEXT_BASE 0x0c080000 +#define CONFIG_SPL_TEXT_BASE 0x0c0a0000 /* NAND Configuration */ #define CONFIG_SYS_NAND_PAGE_2K diff --git a/include/configs/kc1.h b/include/configs/kc1.h index 8d8dc26616..94c3d0ad29 100644 --- a/include/configs/kc1.h +++ b/include/configs/kc1.h @@ -115,9 +115,6 @@ * USB gadget */ -#define CONFIG_USB_MUSB_PIO_ONLY -#define CONFIG_USB_MUSB_OMAP2PLUS - /* * Environment */ diff --git a/include/configs/km/km_arm.h b/include/configs/km/km_arm.h index 277f8be60e..ed58d1e76c 100644 --- a/include/configs/km/km_arm.h +++ b/include/configs/km/km_arm.h @@ -26,7 +26,6 @@ #define CONFIG_MARVELL #define CONFIG_FEROCEON_88FR131 /* CPU Core subversion */ #define CONFIG_KW88F6281 /* SOC Name */ -#define CONFIG_MACH_KM_KIRKWOOD /* Machine type */ #define CONFIG_MACH_TYPE MACH_TYPE_KM_KIRKWOOD diff --git a/include/configs/km/kmp204x-common.h b/include/configs/km/kmp204x-common.h index 6aa2b9d3cc..a0c932a2fa 100644 --- a/include/configs/km/kmp204x-common.h +++ b/include/configs/km/kmp204x-common.h @@ -296,7 +296,6 @@ int get_scl(void); #define CONFIG_SYS_PCIE3_IO_SIZE 0x00010000 /* 64k */ /* Qman/Bman */ -#define CONFIG_SYS_DPAA_QBMAN /* Support Q/Bman */ #define CONFIG_SYS_BMAN_NUM_PORTALS 10 #define CONFIG_SYS_BMAN_MEM_BASE 0xf4000000 #define CONFIG_SYS_BMAN_MEM_PHYS 0xff4000000ull diff --git a/include/configs/koelsch.h b/include/configs/koelsch.h index b9214d2f34..c449e43f95 100644 --- a/include/configs/koelsch.h +++ b/include/configs/koelsch.h @@ -44,7 +44,6 @@ #define CONFIG_SH_QSPI /* SH Ether */ -#define CONFIG_SH_ETHER #define CONFIG_SH_ETHER_USE_PORT 0 #define CONFIG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII diff --git a/include/configs/lager.h b/include/configs/lager.h index 291b03c50b..000e5cd8f3 100644 --- a/include/configs/lager.h +++ b/include/configs/lager.h @@ -44,7 +44,6 @@ #define CONFIG_SH_QSPI /* SH Ether */ -#define CONFIG_SH_ETHER #define CONFIG_SH_ETHER_USE_PORT 0 #define CONFIG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII diff --git a/include/configs/legoev3.h b/include/configs/legoev3.h index c27373c56c..3439cbe090 100644 --- a/include/configs/legoev3.h +++ b/include/configs/legoev3.h @@ -18,9 +18,6 @@ /* * SoC Configuration */ -#define CONFIG_MACH_DAVINCI_DA850_EVM -#define CONFIG_SOC_DA8XX /* TI DA8xx SoC */ -#define CONFIG_SOC_DA850 /* TI DA850 SoC */ #define CONFIG_SYS_EXCEPTION_VECTORS_HIGH #define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID) #define CONFIG_SYS_OSCIN_FREQ 24000000 @@ -124,7 +121,6 @@ #define CONFIG_CONS_INDEX 1 /* use UART0 for console */ #define CONFIG_SPI -#define CONFIG_DAVINCI_SPI #define CONFIG_SYS_SPI_BASE DAVINCI_SPI0_BASE #define CONFIG_SYS_SPI_CLK clk_get(DAVINCI_SPI0_CLKID) #define CONFIG_SF_DEFAULT_SPEED 50000000 diff --git a/include/configs/ls1012a2g5rdb.h b/include/configs/ls1012a2g5rdb.h new file mode 100644 index 0000000000..25df103983 --- /dev/null +++ b/include/configs/ls1012a2g5rdb.h @@ -0,0 +1,122 @@ +/* + * Copyright 2017 NXP + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __LS1012A2G5RDB_H__ +#define __LS1012A2G5RDB_H__ + +#include "ls1012a_common.h" + +/* PFE Ethernet */ +#ifdef CONFIG_FSL_PFE +#define EMAC1_PHY_ADDR 0x2 +#define EMAC2_PHY_ADDR 0x1 +#define CONFIG_PHYLIB +#define CONFIG_PHYLIB_10G +#define CONFIG_PHY_AQUANTIA +#endif + +/* DDR */ +#define CONFIG_DIMM_SLOTS_PER_CTLR 1 +#define CONFIG_CHIP_SELECTS_PER_CTRL 1 +#define CONFIG_NR_DRAM_BANKS 2 +#define CONFIG_SYS_SDRAM_SIZE 0x40000000 +#define CONFIG_CMD_MEMINFO +#define CONFIG_CMD_MEMTEST +#define CONFIG_SYS_MEMTEST_START 0x80000000 +#define CONFIG_SYS_MEMTEST_END 0x9fffffff + +/* MMC */ +#ifdef CONFIG_MMC +#define CONFIG_FSL_ESDHC +#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 +#endif + +/* SATA */ +#define CONFIG_LIBATA +#define CONFIG_SCSI_AHCI +#define CONFIG_SCSI_AHCI_PLAT + +#define CONFIG_SYS_SATA AHCI_BASE_ADDR + +#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 +#define CONFIG_SYS_SCSI_MAX_LUN 1 +#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ + CONFIG_SYS_SCSI_MAX_LUN) +#define CONFIG_NET_MULTI + +#define CONFIG_CMD_MEMINFO +#define CONFIG_CMD_MEMTEST +#define CONFIG_SYS_MEMTEST_START 0x80000000 +#define CONFIG_SYS_MEMTEST_END 0x9fffffff + +#undef CONFIG_EXTRA_ENV_SETTINGS +#define CONFIG_EXTRA_ENV_SETTINGS \ + "verify=no\0" \ + "fdt_high=0xffffffffffffffff\0" \ + "initrd_high=0xffffffffffffffff\0" \ + "fdt_addr=0x00f00000\0" \ + "kernel_addr=0x01000000\0" \ + "kernelheader_addr=0x800000\0" \ + "scriptaddr=0x80000000\0" \ + "scripthdraddr=0x80080000\0" \ + "fdtheader_addr_r=0x80100000\0" \ + "kernelheader_addr_r=0x80200000\0" \ + "kernel_addr_r=0x81000000\0" \ + "fdt_addr_r=0x90000000\0" \ + "load_addr=0xa0000000\0" \ + "kernel_size=0x2800000\0" \ + "kernelheader_size=0x40000\0" \ + "console=ttyS0,115200\0" \ + BOOTENV \ + "boot_scripts=ls1012ardb_boot.scr\0" \ + "boot_script_hdr=hdr_ls1012ardb_bs.out\0" \ + "scan_dev_for_boot_part=" \ + "part list ${devtype} ${devnum} devplist; " \ + "env exists devplist || setenv devplist 1; " \ + "for distro_bootpart in ${devplist}; do " \ + "if fstype ${devtype} " \ + "${devnum}:${distro_bootpart} " \ + "bootfstype; then " \ + "run scan_dev_for_boot; " \ + "fi; " \ + "done\0" \ + "scan_dev_for_boot=" \ + "echo Scanning ${devtype} " \ + "${devnum}:${distro_bootpart}...; " \ + "for prefix in ${boot_prefixes}; do " \ + "run scan_dev_for_scripts; " \ + "done;" \ + "\0" \ + "boot_a_script=" \ + "load ${devtype} ${devnum}:${distro_bootpart} " \ + "${scriptaddr} ${prefix}${script}; " \ + "env exists secureboot && load ${devtype} " \ + "${devnum}:${distro_bootpart} " \ + "${scripthdraddr} ${prefix}${boot_script_hdr} " \ + "&& esbc_validate ${scripthdraddr};" \ + "source ${scriptaddr}\0" \ + "installer=load mmc 0:2 $load_addr " \ + "/flex_installer_arm64.itb; " \ + "bootm $load_addr#$board\0" \ + "qspi_bootcmd=echo Trying load from qspi..;" \ + "sf probe && sf read $load_addr " \ + "$kernel_addr $kernel_size; env exists secureboot " \ + "&& sf read $kernelheader_addr_r $kernelheader_addr " \ + "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \ + "bootm $load_addr#$board\0" + +#undef CONFIG_BOOTCOMMAND +#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) +#define CONFIG_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; " \ + "env exists secureboot && esbc_halt;" +#endif + +#define DEFAULT_PFE_MDIO_NAME "PFE_MDIO" +#define DEFAULT_PFE_MDIO1_NAME "PFE_MDIO1" + +#include <asm/fsl_secure_boot.h> + +#endif /* __LS1012A2G5RDB_H__ */ diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h index 9cbc6249dc..7dbe231deb 100644 --- a/include/configs/ls1012a_common.h +++ b/include/configs/ls1012a_common.h @@ -69,6 +69,16 @@ #define CONFIG_ENV_SECT_SIZE 0x40000 #endif +/* SATA */ +#define CONFIG_SCSI_AHCI_PLAT + +#define CONFIG_SYS_SATA AHCI_BASE_ADDR + +#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 +#define CONFIG_SYS_SCSI_MAX_LUN 1 +#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ + CONFIG_SYS_SCSI_MAX_LUN) + /* I2C */ #define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_MXC @@ -90,6 +100,7 @@ #include <config_distro_defaults.h> #ifndef CONFIG_SPL_BUILD #define BOOT_TARGET_DEVICES(func) \ + func(SCSI, scsi, 0) \ func(MMC, mmc, 0) \ func(USB, usb, 0) #include <config_distro_bootcmd.h> diff --git a/include/configs/ls1012aqds.h b/include/configs/ls1012aqds.h index af5f37cca3..e1767efa35 100644 --- a/include/configs/ls1012aqds.h +++ b/include/configs/ls1012aqds.h @@ -107,33 +107,12 @@ #define CONFIG_SF_DEFAULT_BUS 1 #define CONFIG_SF_DEFAULT_CS 0 -/* -* USB -*/ -/* EHCI Support - disbaled by default */ -/*#define CONFIG_HAS_FSL_DR_USB*/ - -#ifdef CONFIG_HAS_FSL_DR_USB -#define CONFIG_USB_EHCI_FSL -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET -#endif - /* MMC */ #ifdef CONFIG_MMC #define CONFIG_FSL_ESDHC #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 #endif -/* SATA */ -#define CONFIG_SCSI_AHCI_PLAT - -#define CONFIG_SYS_SATA AHCI_BASE_ADDR - -#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 -#define CONFIG_SYS_SCSI_MAX_LUN 1 -#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ - CONFIG_SYS_SCSI_MAX_LUN) - #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCI_SCAN_SHOW diff --git a/include/configs/ls1012ardb.h b/include/configs/ls1012ardb.h index ab139b00dd..438b5a6338 100644 --- a/include/configs/ls1012ardb.h +++ b/include/configs/ls1012ardb.h @@ -46,15 +46,6 @@ #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 #endif -/* SATA */ -#define CONFIG_SCSI_AHCI_PLAT - -#define CONFIG_SYS_SATA AHCI_BASE_ADDR - -#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 -#define CONFIG_SYS_SCSI_MAX_LUN 1 -#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ - CONFIG_SYS_SCSI_MAX_LUN) #define CONFIG_PCIE1 /* PCIE controller 1 */ diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 6669f2f960..d088e83b56 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -394,17 +394,6 @@ unsigned long get_board_ddr_clk(void); #endif /* - * USB - */ -/* EHCI Support - disbaled by default */ -/*#define CONFIG_HAS_FSL_DR_USB*/ - -#ifdef CONFIG_HAS_FSL_DR_USB -#define CONFIG_USB_EHCI_FSL -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET -#endif - -/* * Video */ #ifdef CONFIG_VIDEO_FSL_DCU_FB diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index 3db7ef12b0..15d6638d85 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -24,26 +24,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR OCRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE OCRAM_SIZE -/* - * USB - */ - -/* - * EHCI Support - disbaled by default as - * there is no signal coming out of soc on - * this board for this controller. However, - * the silicon still has this controller, - * and anyone can use this controller by - * taking signals out on their board. - */ - -/*#define CONFIG_HAS_FSL_DR_USB*/ - -#ifdef CONFIG_HAS_FSL_DR_USB -#define CONFIG_USB_EHCI_FSL -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET -#endif - #define CONFIG_SYS_CLK_FREQ 100000000 #define CONFIG_DDR_CLK_FREQ 100000000 diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index e208f7d2de..bef4dd40a6 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -145,6 +145,18 @@ #define CONFIG_PCI_SCAN_SHOW #endif +/* SATA */ +#ifndef SPL_NO_SATA +#define CONFIG_SCSI_AHCI_PLAT + +#define CONFIG_SYS_SATA AHCI_BASE_ADDR + +#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 +#define CONFIG_SYS_SCSI_MAX_LUN 1 +#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ + CONFIG_SYS_SCSI_MAX_LUN) +#endif + /* Command line configuration */ /* MMC */ @@ -155,10 +167,6 @@ #endif #endif -#ifndef SPL_NO_QBMAN -#define CONFIG_SYS_DPAA_QBMAN /* Support Q/Bman */ -#endif - /* FMan ucode */ #ifndef SPL_NO_FMAN #define CONFIG_SYS_DPAA_FMAN @@ -201,6 +209,7 @@ #include <config_distro_defaults.h> #ifndef CONFIG_SPL_BUILD #define BOOT_TARGET_DEVICES(func) \ + func(SCSI, scsi, 0) \ func(MMC, mmc, 0) \ func(USB, usb, 0) #include <config_distro_bootcmd.h> diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h index c3b0f4d47e..456f61adb9 100644 --- a/include/configs/ls1046aqds.h +++ b/include/configs/ls1046aqds.h @@ -136,9 +136,6 @@ unsigned long get_board_ddr_clk(void); #define CFG_LPUART_EN 0x2 #endif -/* SATA */ -#define CONFIG_SCSI_AHCI_PLAT - /* EEPROM */ #define CONFIG_ID_EEPROM #define CONFIG_SYS_I2C_EEPROM_NXID @@ -148,13 +145,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 -#define CONFIG_SYS_SATA AHCI_BASE_ADDR - -#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 -#define CONFIG_SYS_SCSI_MAX_LUN 1 -#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ - CONFIG_SYS_SCSI_MAX_LUN) - /* * IFC Definitions */ diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h index 793e67506d..2755f1c7e9 100644 --- a/include/configs/ls1046ardb.h +++ b/include/configs/ls1046ardb.h @@ -211,18 +211,6 @@ #endif #endif -/* SATA */ -#ifndef SPL_NO_SATA -#define CONFIG_SCSI_AHCI_PLAT - -#define CONFIG_SYS_SATA AHCI_BASE_ADDR - -#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 -#define CONFIG_SYS_SCSI_MAX_LUN 1 -#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ - CONFIG_SYS_SCSI_MAX_LUN) -#endif - #ifndef SPL_NO_MISC #undef CONFIG_BOOTCOMMAND #if defined(CONFIG_QSPI_BOOT) diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h index 6587296237..61c30c9eaa 100644 --- a/include/configs/ls1088a_common.h +++ b/include/configs/ls1088a_common.h @@ -7,6 +7,19 @@ #ifndef __LS1088_COMMON_H #define __LS1088_COMMON_H +/* SPL build */ +#ifdef CONFIG_SPL_BUILD +#define SPL_NO_BOARDINFO +#define SPL_NO_QIXIS +#define SPL_NO_PCI +#define SPL_NO_ENV +#define SPL_NO_RTC +#define SPL_NO_USB +#define SPL_NO_SATA +#define SPL_NO_QSPI +#define SPL_NO_IFC +#undef CONFIG_DISPLAY_CPUINFO +#endif #define CONFIG_REMAKE_ELF #define CONFIG_FSL_LAYERSCAPE @@ -32,6 +45,12 @@ #define CONFIG_SUPPORT_RAW_INITRD +#ifdef CONFIG_QSPI_BOOT +#define CONFIG_SYS_FSL_QSPI_BASE 0x20000000 +#define CONFIG_ENV_OFFSET 0x300000 /* 3MB */ +#define CONFIG_ENV_ADDR (CONFIG_SYS_FSL_QSPI_BASE + \ + CONFIG_ENV_OFFSET) +#endif #define CONFIG_SKIP_LOWLEVEL_INIT @@ -74,8 +93,10 @@ #define CONFIG_BAUDRATE 115200 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } +#if !defined(SPL_NO_IFC) || defined(CONFIG_TARGET_LS1088AQDS) /* IFC */ #define CONFIG_FSL_IFC +#endif /* * During booting, IFC is mapped at the region of 0x30000000. @@ -172,6 +193,7 @@ unsigned long long get_qixis_addr(void); /* #define CONFIG_DISPLAY_CPUINFO */ +#ifndef SPL_NO_ENV /* Allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE @@ -211,6 +233,7 @@ unsigned long long get_qixis_addr(void); " cp.b $kernel_start $kernel_load" \ " $kernel_size && bootm $kernel_load" #endif +#endif /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ @@ -219,7 +242,9 @@ unsigned long long get_qixis_addr(void); #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot args buffer */ #define CONFIG_SYS_LONGHELP +#ifndef SPL_NO_ENV #define CONFIG_CMDLINE_EDITING 1 +#endif #define CONFIG_AUTO_COMPLETE #define CONFIG_SYS_MAXARGS 64 /* max command args */ @@ -235,7 +260,20 @@ unsigned long long get_qixis_addr(void); #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00100000 #define CONFIG_SYS_SPL_MALLOC_START 0x80200000 -#define CONFIG_SYS_MONITOR_LEN (512 * 1024) + +#ifdef CONFIG_SECURE_BOOT +#define CONFIG_U_BOOT_HDR_SIZE (16 << 10) +/* + * HDR would be appended at end of image and copied to DDR along + * with U-Boot image. Here u-boot max. size is 512K. So if binary + * size increases then increase this size in case of secure boot as + * it uses raw u-boot image instead of fit image. + */ +#define CONFIG_SYS_MONITOR_LEN (0x100000 + CONFIG_U_BOOT_HDR_SIZE) +#else +#define CONFIG_SYS_MONITOR_LEN 0x100000 +#endif /* ifdef CONFIG_SECURE_BOOT */ + #endif #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ diff --git a/include/configs/ls1088aqds.h b/include/configs/ls1088aqds.h index e7e3afefd9..5674a5d207 100644 --- a/include/configs/ls1088aqds.h +++ b/include/configs/ls1088aqds.h @@ -21,7 +21,6 @@ unsigned long get_board_ddr_clk(void); #if defined(CONFIG_QSPI_BOOT) #define CONFIG_ENV_SIZE 0x2000 /* 8KB */ -#define CONFIG_ENV_OFFSET 0x300000 /* 3MB */ #define CONFIG_ENV_SECT_SIZE 0x40000 #elif defined(CONFIG_SD_BOOT) #define CONFIG_ENV_OFFSET (3 * 1024 * 1024) @@ -171,9 +170,13 @@ unsigned long get_board_ddr_clk(void); #define QIXIS_LBMAP_DFLTBANK 0x0e #define QIXIS_LBMAP_ALTBANK 0x2e #define QIXIS_LBMAP_SD 0x00 +#define QIXIS_LBMAP_EMMC 0x00 +#define QIXIS_LBMAP_IFC 0x00 #define QIXIS_LBMAP_SD_QSPI 0x0e #define QIXIS_LBMAP_QSPI 0x0e +#define QIXIS_RCW_SRC_IFC 0x25 #define QIXIS_RCW_SRC_SD 0x40 +#define QIXIS_RCW_SRC_EMMC 0x41 #define QIXIS_RCW_SRC_QSPI 0x62 #define QIXIS_RST_CTL_RESET 0x41 #define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x20 @@ -280,6 +283,33 @@ unsigned long get_board_ddr_clk(void); #define I2C_MUX_CH_DEFAULT 0x8 #define I2C_MUX_CH5 0xD +#define I2C_MUX_CH_VOL_MONITOR 0xA + +/* Voltage monitor on channel 2*/ +#define I2C_VOL_MONITOR_ADDR 0x63 +#define I2C_VOL_MONITOR_BUS_V_OFFSET 0x2 +#define I2C_VOL_MONITOR_BUS_V_OVF 0x1 +#define I2C_VOL_MONITOR_BUS_V_SHIFT 3 +#define I2C_SVDD_MONITOR_ADDR 0x4F + +#define CONFIG_VID_FLS_ENV "ls1088aqds_vdd_mv" +#define CONFIG_VID + +/* The lowest and highest voltage allowed for LS1088AQDS */ +#define VDD_MV_MIN 819 +#define VDD_MV_MAX 1212 + +#define CONFIG_VOL_MONITOR_LTC3882_SET +#define CONFIG_VOL_MONITOR_LTC3882_READ + +/* PM Bus commands code for LTC3882*/ +#define PMBUS_CMD_PAGE 0x0 +#define PMBUS_CMD_READ_VOUT 0x8B +#define PMBUS_CMD_PAGE_PLUS_WRITE 0x05 +#define PMBUS_CMD_VOUT_COMMAND 0x21 + +#define PWM_CHANNEL0 0x0 + /* * RTC configuration */ diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h index 1438bec1af..a6271f5ae2 100644 --- a/include/configs/ls1088ardb.h +++ b/include/configs/ls1088ardb.h @@ -9,13 +9,14 @@ #include "ls1088a_common.h" +#ifndef SPL_NO_BOARDINFO #define CONFIG_DISPLAY_BOARDINFO_LATE +#endif #define CONFIG_MISC_INIT_R #if defined(CONFIG_QSPI_BOOT) #define CONFIG_ENV_SIZE 0x2000 /* 8KB */ -#define CONFIG_ENV_OFFSET 0x300000 /* 3MB */ #define CONFIG_ENV_SECT_SIZE 0x40000 #elif defined(CONFIG_SD_BOOT) #define CONFIG_ENV_OFFSET (3 * 1024 * 1024) @@ -29,7 +30,9 @@ #endif #if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) +#ifndef CONFIG_SPL_BUILD #define CONFIG_QIXIS_I2C_ACCESS +#endif #define SYS_NO_FLASH #undef CONFIG_CMD_IMLS #endif @@ -97,7 +100,11 @@ #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } #endif #endif + +#ifndef SPL_NO_IFC #define CONFIG_NAND_FSL_IFC +#endif + #define CONFIG_SYS_NAND_MAX_ECCPOS 256 #define CONFIG_SYS_NAND_MAX_OOBFREE 2 @@ -139,8 +146,12 @@ #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) +#ifndef SPL_NO_QIXIS #define CONFIG_FSL_QIXIS +#endif + #define CONFIG_SYS_I2C_FPGA_ADDR 0x66 +#define QIXIS_BRDCFG4_OFFSET 0x54 #define QIXIS_LBMAP_SWITCH 2 #define QIXIS_QMAP_MASK 0xe0 #define QIXIS_QMAP_SHIFT 5 @@ -149,9 +160,11 @@ #define QIXIS_LBMAP_DFLTBANK 0x00 #define QIXIS_LBMAP_ALTBANK 0x20 #define QIXIS_LBMAP_SD 0x00 +#define QIXIS_LBMAP_EMMC 0x00 #define QIXIS_LBMAP_SD_QSPI 0x00 #define QIXIS_LBMAP_QSPI 0x00 #define QIXIS_RCW_SRC_SD 0x40 +#define QIXIS_RCW_SRC_EMMC 0x41 #define QIXIS_RCW_SRC_QSPI 0x62 #define QIXIS_RST_CTL_RESET 0x31 #define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x20 @@ -215,6 +228,32 @@ #define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS 5000 +#define I2C_MUX_CH_VOL_MONITOR 0xA +/* Voltage monitor on channel 2*/ +#define I2C_VOL_MONITOR_ADDR 0x63 +#define I2C_VOL_MONITOR_BUS_V_OFFSET 0x2 +#define I2C_VOL_MONITOR_BUS_V_OVF 0x1 +#define I2C_VOL_MONITOR_BUS_V_SHIFT 3 +#define I2C_SVDD_MONITOR_ADDR 0x4F + +#define CONFIG_VID_FLS_ENV "ls1088ardb_vdd_mv" +#define CONFIG_VID + +/* The lowest and highest voltage allowed for LS1088ARDB */ +#define VDD_MV_MIN 819 +#define VDD_MV_MAX 1212 + +#define CONFIG_VOL_MONITOR_LTC3882_SET +#define CONFIG_VOL_MONITOR_LTC3882_READ + +/* PM Bus commands code for LTC3882*/ +#define PMBUS_CMD_PAGE 0x0 +#define PMBUS_CMD_READ_VOUT 0x8B +#define PMBUS_CMD_PAGE_PLUS_WRITE 0x05 +#define PMBUS_CMD_VOUT_COMMAND 0x21 + +#define PWM_CHANNEL0 0x0 + /* * I2C bus multiplexer */ @@ -223,6 +262,8 @@ #define I2C_RETIMER_ADDR 0x18 #define I2C_MUX_CH_DEFAULT 0x8 #define I2C_MUX_CH5 0xD + +#ifndef SPL_NO_RTC /* * RTC configuration */ @@ -230,6 +271,7 @@ #define CONFIG_RTC_PCF8563 1 #define CONFIG_SYS_I2C_RTC_ADDR 0x51 /* Channel 3*/ #define CONFIG_CMD_DATE +#endif /* EEPROM */ #define CONFIG_ID_EEPROM @@ -240,12 +282,14 @@ #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 +#ifndef SPL_NO_QSPI /* QSPI device */ #if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) #define CONFIG_FSL_QSPI #define FSL_QSPI_FLASH_SIZE (1 << 26) #define FSL_QSPI_FLASH_NUM 2 #endif +#endif #define CONFIG_CMD_MEMINFO #define CONFIG_CMD_MEMTEST @@ -260,6 +304,7 @@ #define CONFIG_FSL_MEMAC +#ifndef SPL_NO_ENV /* Initial environment variables */ #if defined(CONFIG_QSPI_BOOT) #define MC_INIT_CMD \ @@ -408,6 +453,7 @@ #define CONFIG_ETHPRIME "DPMAC1@xgmii" #define CONFIG_PHY_GIGE #endif +#endif /* MMC */ #ifdef CONFIG_MMC @@ -415,6 +461,7 @@ #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 #endif +#ifndef SPL_NO_ENV #undef CONFIG_CMDLINE_EDITING #include <config_distro_defaults.h> @@ -423,6 +470,7 @@ func(SCSI, scsi, 0) \ func(DHCP, dhcp, na) #include <config_distro_bootcmd.h> +#endif #include <asm/fsl_secure_boot.h> diff --git a/include/configs/mpc8308_p1m.h b/include/configs/mpc8308_p1m.h index f97773146a..69c4309139 100644 --- a/include/configs/mpc8308_p1m.h +++ b/include/configs/mpc8308_p1m.h @@ -15,7 +15,6 @@ #define CONFIG_E300 1 /* E300 family */ #define CONFIG_MPC830x 1 /* MPC830x family */ #define CONFIG_MPC8308 1 /* MPC8308 CPU specific */ -#define CONFIG_MPC8308_P1M 1 /* mpc8308_p1m board specific */ #ifndef CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_TEXT_BASE 0xFC000000 diff --git a/include/configs/mpr2.h b/include/configs/mpr2.h index 14b0492eb7..a6e172659f 100644 --- a/include/configs/mpr2.h +++ b/include/configs/mpr2.h @@ -18,7 +18,6 @@ /* CPU and platform */ #define CONFIG_CPU_SH7720 1 -#define CONFIG_MPR2 1 #define CONFIG_DISPLAY_BOARDINFO diff --git a/include/configs/ms7720se.h b/include/configs/ms7720se.h index 7a9aa82158..cade328a9c 100644 --- a/include/configs/ms7720se.h +++ b/include/configs/ms7720se.h @@ -10,7 +10,6 @@ #define __MS7720SE_H #define CONFIG_CPU_SH7720 1 -#define CONFIG_MS7720SE 1 #define CONFIG_BOOTFILE "/boot/zImage" #define CONFIG_LOADADDR 0x8E000000 diff --git a/include/configs/ms7722se.h b/include/configs/ms7722se.h index 431d747489..3db6c249c2 100644 --- a/include/configs/ms7722se.h +++ b/include/configs/ms7722se.h @@ -10,7 +10,6 @@ #define __MS7722SE_H #define CONFIG_CPU_SH7722 1 -#define CONFIG_MS7722SE 1 #define CONFIG_DISPLAY_BOARDINFO #undef CONFIG_SHOW_BOOT_PROGRESS diff --git a/include/configs/ms7750se.h b/include/configs/ms7750se.h index e942758b32..1cd7ae0303 100644 --- a/include/configs/ms7750se.h +++ b/include/configs/ms7750se.h @@ -12,7 +12,6 @@ #define CONFIG_CPU_SH7750 1 /* #define CONFIG_CPU_SH7751 1 */ /* #define CONFIG_CPU_TYPE_R 1 */ -#define CONFIG_MS7750SE 1 #define __LITTLE_ENDIAN__ 1 #define CONFIG_DISPLAY_BOARDINFO diff --git a/include/configs/mv-common.h b/include/configs/mv-common.h index 7c2bab2fc6..1721fefd14 100644 --- a/include/configs/mv-common.h +++ b/include/configs/mv-common.h @@ -116,13 +116,6 @@ #endif /* - * Common USB/EHCI configuration - */ -#if defined(CONFIG_CMD_USB) && !defined(CONFIG_DM) -#define CONFIG_SUPPORT_VFAT -#endif /* CONFIG_CMD_USB */ - -/* * File system */ #ifdef CONFIG_SYS_MVFS diff --git a/include/configs/mvebu_armada-37xx.h b/include/configs/mvebu_armada-37xx.h index af16b9454a..5c53dd3dfb 100644 --- a/include/configs/mvebu_armada-37xx.h +++ b/include/configs/mvebu_armada-37xx.h @@ -44,9 +44,6 @@ /* * Other required minimal configurations */ -#define CONFIG_SYS_LONGHELP -#define CONFIG_AUTO_COMPLETE -#define CONFIG_CMDLINE_EDITING #define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */ #define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */ #define CONFIG_SYS_MEMTEST_START 0x00800000 /* 8M */ @@ -105,6 +102,24 @@ #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ CONFIG_SYS_SCSI_MAX_LUN) -#define CONFIG_SUPPORT_VFAT +#include <config_distro_defaults.h> + +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 1) \ + func(MMC, mmc, 0) \ + func(USB, usb, 0) \ + func(SCSI, scsi, 0) \ + func(PXE, pxe, na) \ + func(DHCP, dhcp, na) + +#include <config_distro_bootcmd.h> + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "scriptaddr=0x4d00000\0" \ + "pxefile_addr_r=0x4e00000\0" \ + "fdt_addr_r=0x4f00000\0" \ + "kernel_addr_r=0x5000000\0" \ + "ramdisk_addr_r=0x8000000\0" \ + BOOTENV #endif /* _CONFIG_MVEBU_ARMADA_37XX_H */ diff --git a/include/configs/mvebu_armada-8k.h b/include/configs/mvebu_armada-8k.h index 7f143164c3..86e0d43821 100644 --- a/include/configs/mvebu_armada-8k.h +++ b/include/configs/mvebu_armada-8k.h @@ -105,8 +105,6 @@ #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ CONFIG_SYS_SCSI_MAX_LUN) -#define CONFIG_SUPPORT_VFAT - /* * PCI configuration */ diff --git a/include/configs/mx25pdk.h b/include/configs/mx25pdk.h index 8e8946a6b4..f82c4ccbde 100644 --- a/include/configs/mx25pdk.h +++ b/include/configs/mx25pdk.h @@ -65,11 +65,6 @@ #define CONFIG_CMDLINE_EDITING #define CONFIG_SYS_LONGHELP -/* U-Boot commands */ - -/* Filesystem support */ -#define CONFIG_FS_EXT4 - /* Ethernet */ #define CONFIG_FEC_MXC #define CONFIG_FEC_MXC_PHYADDR 0x1f diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h index 906e677cd1..1eaaf013f7 100644 --- a/include/configs/mx6sxsabresd.h +++ b/include/configs/mx6sxsabresd.h @@ -145,19 +145,12 @@ #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC4_BASE_ADDR /* I2C Configs */ -#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_MXC #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ #define CONFIG_SYS_I2C_SPEED 100000 -/* PMIC */ -#define CONFIG_POWER -#define CONFIG_POWER_I2C -#define CONFIG_POWER_PFUZE100 -#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 - /* Network */ #define CONFIG_FEC_MXC #define CONFIG_MII @@ -210,7 +203,7 @@ #endif #endif -#define CONFIG_ENV_OFFSET (8 * SZ_64K) +#define CONFIG_ENV_OFFSET (14 * SZ_64K) #define CONFIG_ENV_SIZE SZ_8K #define CONFIG_SYS_FSL_USDHC_NUM 3 diff --git a/include/configs/mx6ullevk.h b/include/configs/mx6ullevk.h index 8787df4907..6a48742fd0 100644 --- a/include/configs/mx6ullevk.h +++ b/include/configs/mx6ullevk.h @@ -164,4 +164,14 @@ #define CONFIG_SOFT_SPI +#ifdef CONFIG_FSL_QSPI +#define CONFIG_SYS_FSL_QSPI_AHB +#define CONFIG_SF_DEFAULT_BUS 0 +#define CONFIG_SF_DEFAULT_CS 0 +#define CONFIG_SF_DEFAULT_SPEED 40000000 +#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 +#define FSL_QSPI_FLASH_NUM 1 +#define FSL_QSPI_FLASH_SIZE SZ_32M +#endif + #endif diff --git a/include/configs/nas220.h b/include/configs/nas220.h index 089263f96f..90be7bd010 100644 --- a/include/configs/nas220.h +++ b/include/configs/nas220.h @@ -91,7 +91,6 @@ #ifdef CONFIG_CMD_USB #define CONFIG_USB_EHCI_KIRKWOOD /* on Kirkwood platform */ #define CONFIG_EHCI_IS_TDI -#define CONFIG_SUPPORT_VFAT #endif /* CONFIG_CMD_USB */ /* diff --git a/include/configs/nokia_rx51.h b/include/configs/nokia_rx51.h index b7fe7341e4..00509e8508 100644 --- a/include/configs/nokia_rx51.h +++ b/include/configs/nokia_rx51.h @@ -82,12 +82,6 @@ #define CONFIG_ENV_OVERWRITE #define CONFIG_SYS_BAUDRATE_TABLE { 4800, 9600, 19200, 38400, 57600, 115200 } -/* USB */ -#define CONFIG_USB_MUSB_UDC -#define CONFIG_USB_MUSB_HCD -#define CONFIG_USB_OMAP3 -#define CONFIG_TWL4030_USB - /* USB device configuration */ #define CONFIG_USB_DEVICE #define CONFIG_USBD_VENDORID 0x0421 diff --git a/include/configs/nx25-ae250.h b/include/configs/nx25-ae250.h new file mode 100644 index 0000000000..b5237972c9 --- /dev/null +++ b/include/configs/nx25-ae250.h @@ -0,0 +1,126 @@ +/* + * Copyright (C) 2017 Andes Technology Corporation + * Rick Chen, Andes Technology Corporation <rick@andestech.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/* + * CPU and Board Configuration Options + */ +#define CONFIG_SKIP_LOWLEVEL_INIT + +#define CONFIG_CMDLINE_EDITING +#define CONFIG_BOOTP_SEND_HOSTNAME +#define CONFIG_BOOTP_SERVERIP + +#ifdef CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_SYS_TEXT_BASE 0x00000000 +#ifdef CONFIG_OF_CONTROL +#undef CONFIG_OF_SEPARATE +#define CONFIG_OF_EMBED +#endif +#else +#define CONFIG_SYS_TEXT_BASE 0x80000000 +#endif + +/* + * Miscellaneous configurable options + */ +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ + +/* + * Print Buffer Size + */ +#define CONFIG_SYS_PBSIZE \ + (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) + +/* + * max number of command args + */ +#define CONFIG_SYS_MAXARGS 16 + +/* + * Boot Argument Buffer Size + */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + +/* + * Size of malloc() pool + * 512kB is suggested, (CONFIG_ENV_SIZE + 128 * 1024) was not enough + */ +#define CONFIG_SYS_MALLOC_LEN (512 << 10) + +/* + * Physical Memory Map + */ +#define CONFIG_NR_DRAM_BANKS 2 +#define PHYS_SDRAM_0 0x00000000 /* SDRAM Bank #1 */ +#define PHYS_SDRAM_1 \ + (PHYS_SDRAM_0 + PHYS_SDRAM_0_SIZE) /* SDRAM Bank #2 */ +#define PHYS_SDRAM_0_SIZE 0x20000000 /* 512 MB */ +#define PHYS_SDRAM_1_SIZE 0x20000000 /* 512 MB */ +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_0 + +/* + * Serial console configuration + */ +#define CONFIG_CONS_INDEX 1 +#define CONFIG_SYS_NS16550_SERIAL +#ifndef CONFIG_DM_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE -4 +#endif +#define CONFIG_SYS_NS16550_CLK 19660800 + +/* + * SD (MMC) controller + */ +#define CONFIG_FTSDC010_NUMBER 1 +#define CONFIG_FTSDC010_SDIO + +/* Init Stack Pointer */ +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000000 - \ + GENERATED_GBL_DATA_SIZE) + +/* + * Load address and memory test area should agree with + * arch/riscv/config.mk. Be careful not to overwrite U-Boot itself. + */ +#define CONFIG_SYS_LOAD_ADDR 0x100000 /* SDRAM */ + +/* + * memtest works on 512 MB in DRAM + */ +#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_0 +#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_0 + PHYS_SDRAM_0_SIZE) + +/* environments */ +#define CONFIG_ENV_SPI_BUS 0 +#define CONFIG_ENV_SPI_CS 0 +#define CONFIG_ENV_SPI_MAX_HZ 50000000 +#define CONFIG_ENV_SPI_MODE 0 +#define CONFIG_ENV_SECT_SIZE 0x1000 +#define CONFIG_ENV_OVERWRITE + +/* SPI FLASH */ +#define CONFIG_SF_DEFAULT_BUS 0 +#define CONFIG_SF_DEFAULT_CS 0 +#define CONFIG_SF_DEFAULT_SPEED 1000000 +#define CONFIG_SF_DEFAULT_MODE 0 + +/* + * For booting Linux, the board info and command line data + * have to be in the first 16 MB of memory, since this is + * the maximum mapped by the Linux kernel during initialization. + */ + +/* Initial Memory map for Linux*/ +#define CONFIG_SYS_BOOTMAPSZ (64 << 20) +/* Increase max gunzip size */ +#define CONFIG_SYS_BOOTM_LEN (64 << 20) + +#endif /* __CONFIG_H */ diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h index 394bfb7434..d3dfe60bb0 100644 --- a/include/configs/omap3_beagle.h +++ b/include/configs/omap3_beagle.h @@ -14,57 +14,66 @@ #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ +#include <configs/ti_omap3_common.h> + /* - * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM - * 64 bytes before this address should be set aside for u-boot.img's - * header. That is 0x800FFFC0--0x80100000 should not be used for any - * other needs. We use this rather than the inherited defines from - * ti_armv7_common.h for backwards compatibility. + * We are only ever GP parts and will utilize all of the "downloaded image" + * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB). */ -#define CONFIG_SYS_TEXT_BASE 0x80100000 -#define CONFIG_SPL_BSS_START_ADDR 0x80000000 -#define CONFIG_SPL_BSS_MAX_SIZE (512 << 10) /* 512 KB */ -#define CONFIG_SYS_SPL_MALLOC_START 0x80208000 -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 +#undef CONFIG_SPL_TEXT_BASE +#define CONFIG_SPL_TEXT_BASE 0x40200000 -#include <configs/ti_omap3_common.h> +#define CONFIG_SPL_FRAMEWORK #define CONFIG_MISC_INIT_R +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG +#define CONFIG_REVISION_TAG -#define CONFIG_REVISION_TAG 1 +/* NAND */ +#if defined(CONFIG_NAND) +#define CONFIG_SYS_FLASH_BASE NAND_BASE +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_5_ADDR_CYCLE +#define CONFIG_SYS_NAND_PAGE_COUNT 64 +#define CONFIG_SYS_NAND_PAGE_SIZE 2048 +#define CONFIG_SYS_NAND_OOBSIZE 64 +#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) +#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS +#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\ + 10, 11, 12, 13} +#define CONFIG_SYS_NAND_ECCSIZE 512 +#define CONFIG_SYS_NAND_ECCBYTES 3 +#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW +#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 +#define CONFIG_ENV_IS_IN_NAND 1 +#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ +#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ +#define CONFIG_ENV_OFFSET 0x260000 +#define CONFIG_ENV_ADDR 0x260000 #define CONFIG_ENV_OVERWRITE +#define CONFIG_MTD_PARTITIONS /* required for UBI partition support */ +/* NAND: SPL falcon mode configs */ +#if defined(CONFIG_SPL_OS_BOOT) +#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000 +#endif /* CONFIG_SPL_OS_BOOT */ +#endif /* CONFIG_NAND */ -/* Status LED */ - -/* Enable Multi Bus support for I2C */ -#define CONFIG_I2C_MULTI_BUS 1 - -/* Probe all devices */ -#define CONFIG_SYS_I2C_NOPROBES {{0x0, 0x0}} - -/* USB */ -#define CONFIG_USB_MUSB_OMAP2PLUS -#define CONFIG_USB_MUSB_PIO_ONLY -#define CONFIG_TWL4030_USB 1 +/* MUSB */ +#define CONFIG_USB_OMAP3 /* USB EHCI */ - #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 147 -/* commands to include */ - -#define CONFIG_VIDEO_OMAP3 /* DSS Support */ +/* Enable Multi Bus support for I2C */ +#define CONFIG_I2C_MULTI_BUS -/* - * TWL4030 - */ -#define CONFIG_TWL4030_LED 1 +/* DSS Support */ +#define CONFIG_VIDEO_OMAP3 -/* - * Board NAND Info. - */ -#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ - /* devices */ +/* TWL4030 LED Support */ +#define CONFIG_TWL4030_LED #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) @@ -91,6 +100,7 @@ "run bootscript; " \ "else " \ "if run loadimage; then " \ + "run loadfdt;" \ "run mmcboot;" \ "fi;" \ "fi; " \ @@ -105,13 +115,8 @@ #include <config_distro_bootcmd.h> #define CONFIG_EXTRA_ENV_SETTINGS \ - "loadaddr=0x80200000\0" \ - "kernel_addr_r=0x80200000\0" \ - "rdaddr=0x81000000\0" \ - "initrd_addr_r=0x81000000\0" \ + DEFAULT_LINUX_BOOT_ENV \ "fdt_high=0xffffffff\0" \ - "fdtaddr=0x80f80000\0" \ - "fdt_addr_r=0x80f80000\0" \ "usbtty=cdc_acm\0" \ "bootfile=uImage\0" \ "ramdisk=ramdisk.gz\0" \ @@ -127,7 +132,7 @@ "defaultdisplay=dvi\0" \ "mmcdev=0\0" \ "mmcroot=/dev/mmcblk0p2 rw\0" \ - "mmcrootfstype=ext3 rootwait\0" \ + "mmcrootfstype=ext4 rootwait\0" \ "nandroot=ubi0:rootfs ubi.mtd=4\0" \ "nandrootfstype=ubifs\0" \ "ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=0x81000000,64M\0" \ @@ -190,10 +195,10 @@ "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \ "source ${loadaddr}\0" \ "loadfdt=run validatefdt; load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \ - "mmcboot=echo Booting from mmc ...; " \ + "mmcboot=echo Booting ${bootfile} with DT from mmc${mmcdev} ...; " \ "run mmcargs; " \ - "bootm ${loadaddr}\0" \ - "mmcbootz=echo Booting with DT from mmc${mmcdev} ...; " \ + "bootm ${loadaddr} - ${fdtaddr}\0" \ + "mmcbootz=echo Booting ${bootfile} with DT from mmc${mmcdev} ...; " \ "run mmcargs; " \ "bootz ${loadaddr} - ${fdtaddr}\0" \ "nandboot=echo Booting from nand ...; " \ @@ -209,51 +214,4 @@ "userbutton_nonxm=gpio input 7;\0" \ BOOTENV -/* - * OMAP3 has 12 GP timers, they can be driven by the system clock - * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). - * This rate is divided by a local divisor. - */ -#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ - -/*----------------------------------------------------------------------- - * FLASH and environment organization - */ - -/* **** PISMO SUPPORT *** */ -#if defined(CONFIG_CMD_NAND) -#define CONFIG_SYS_FLASH_BASE NAND_BASE -#endif - -/* Monitor at start of flash */ -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE -#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP - -#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ -#define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */ - -#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ -#define CONFIG_ENV_OFFSET 0x260000 -#define CONFIG_ENV_ADDR 0x260000 - -/* Defines for SPL */ - -/* NAND boot config */ -#define CONFIG_SYS_NAND_5_ADDR_CYCLE -#define CONFIG_SYS_NAND_PAGE_COUNT 64 -#define CONFIG_SYS_NAND_PAGE_SIZE 2048 -#define CONFIG_SYS_NAND_OOBSIZE 64 -#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) -#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 -#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\ - 10, 11, 12, 13} -#define CONFIG_SYS_NAND_ECCSIZE 512 -#define CONFIG_SYS_NAND_ECCBYTES 3 -#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW -#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 -/* NAND: SPL falcon mode configs */ -#ifdef CONFIG_SPL_OS_BOOT -#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000 -#endif - #endif /* __CONFIG_H */ diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h index d95ccdf035..ba67e33c38 100644 --- a/include/configs/omap3_evm.h +++ b/include/configs/omap3_evm.h @@ -74,9 +74,6 @@ #endif /* CONFIG_NAND */ /* MUSB */ -#define CONFIG_USB_OMAP3 -#define CONFIG_USB_MUSB_OMAP2PLUS -#define CONFIG_USB_MUSB_PIO_ONLY /* USB EHCI */ #define CONFIG_SYS_USB_FAT_BOOT_PARTITION 1 @@ -89,28 +86,35 @@ #define MEM_LAYOUT_ENV_SETTINGS \ DEFAULT_LINUX_BOOT_ENV -#if defined(CONFIG_NAND) +#if defined(CONFIG_NAND) && defined(CONFIG_CMD_UBI) +/* NAND boot with uImage from NAND 'kernel' partition */ #define BOOTENV_DEV_NAND(devtypeu, devtypel, instance) \ "bootcmd_" #devtypel #instance "=" \ "run nandboot\0" - #define BOOTENV_DEV_NAME_NAND(devtypeu, devtypel, instance) \ #devtypel #instance " " -#endif /* CONFIG_NAND */ +/* NAND boot with zImage from UBIFS '/boot/zImage' */ +#define BOOTENV_DEV_UBIFS_NAND(devtypeu, devtypel, instance) \ + "bootcmd_" #devtypel #instance "=" \ + "run nandbootubifs\0" +#define BOOTENV_DEV_NAME_UBIFS_NAND(devtypeu, devtypel, instance) \ + #devtypel #instance " " +#endif /* CONFIG_NAND && CONFIG_CMD_UBI */ + +/* MMC boot with uImage from MMC 0:2 '/boot/uImage' */ #define BOOTENV_DEV_UIMAGE_MMC(devtypeu, devtypel, instance) \ "bootcmd_" #devtypel #instance "=" \ "setenv mmcdev " #instance"; " \ "run mmcboot\0" - #define BOOTENV_DEV_NAME_UIMAGE_MMC(devtypeu, devtypel, instance) \ #devtypel #instance " " +/* MMC boot with zImage from MMC 0:2 '/boot/zImage' */ #define BOOTENV_DEV_ZIMAGE_MMC(devtypeu, devtypel, instance) \ "bootcmd_" #devtypel #instance "=" \ "setenv mmcdev " #instance"; " \ "run mmcbootz\0" - #define BOOTENV_DEV_NAME_ZIMAGE_MMC(devtypeu, devtypel, instance) \ #devtypel #instance " " @@ -118,6 +122,7 @@ func(MMC, mmc, 0) \ func(ZIMAGE_MMC, zimage_mmc, 0) \ func(UIMAGE_MMC, uimage_mmc, 0) \ + func(UBIFS_NAND, ubifs_nand, 0) \ func(NAND, nand, 0) #include <config_distro_bootcmd.h> @@ -128,9 +133,11 @@ "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ "fdt_high=0xffffffff\0" \ + "bootdir=/boot\0" \ "bootenv=uEnv.txt\0" \ "optargs=\0" \ "mmcdev=0\0" \ + "mmcpart=2\0" \ "console=ttyO0,115200n8\0" \ "mmcargs=setenv bootargs console=${console} " \ "${mtdparts} " \ @@ -143,39 +150,52 @@ "root=ubi0:rootfs rw ubi.mtd=rootfs noinitrd " \ "rootfstype=ubifs rootwait\0" \ "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \ + "ext4bootenv=ext4load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${bootdir}/${bootenv}\0" \ "importbootenv=echo Importing environment from mmc ...; " \ "env import -t ${loadaddr} ${filesize}\0" \ - "mmcbootenv=" \ - "mmc dev ${mmcdev}; " \ - "if mmc rescan && run loadbootenv; then " \ - "run importbootenv; " \ + "mmcbootenv=mmc dev ${mmcdev}; " \ + "if mmc rescan; then " \ + "run loadbootenv && run importbootenv; " \ + "run ext4bootenv && run importbootenv; " \ "if test -n $uenvcmd; then " \ "echo Running uenvcmd ...; " \ "run uenvcmd; " \ "fi; " \ "fi\0" \ "loaduimage=setenv bootfile uImage; " \ - "fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ + "ext4load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${bootdir}/${bootfile}\0" \ "loadzimage=setenv bootfile zImage; " \ - "fatload mmc ${mmcdev} ${loadaddr} zImage\0" \ - "loaddtb=fatload mmc ${mmcdev} ${fdtaddr} ${fdtfile}\0" \ + "ext4load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${bootdir}/${bootfile}\0" \ + "loaddtb=ext4load mmc ${mmcdev}:${mmcpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \ + "loadubizimage=setenv bootfile zImage; " \ + "ubifsload ${loadaddr} ${bootdir}/${bootfile}\0" \ + "loadubidtb=ubifsload ${fdtaddr} ${bootdir}/${fdtfile}\0" \ "mmcboot=run mmcbootenv; " \ "if run loaduimage && run loaddtb; then " \ - "echo Booting ${bootfile} from mmc ...; " \ + "echo Booting ${bootdir}/${bootfile} from mmc ${mmcdev}:${mmcpart} ...; " \ "run mmcargs; " \ "bootm ${loadaddr} - ${fdtaddr}; " \ "fi\0" \ "mmcbootz=run mmcbootenv; " \ "if run loadzimage && run loaddtb; then " \ - "echo Booting ${bootfile} from mmc ...; " \ + "echo Booting ${bootdir}/${bootfile} from mmc ${mmcdev}:${mmcpart} ...; " \ "run mmcargs; " \ - "bootz ${loadaddr} - ${fdtaddr};" \ + "bootz ${loadaddr} - ${fdtaddr}; " \ "fi\0" \ - "nandboot=echo Booting uImage from nand ...; " \ - "run nandargs; " \ + "nandboot=" \ "nand read ${loadaddr} kernel; " \ "nand read ${fdtaddr} dtb; " \ + "echo Booting uImage from NAND MTD 'kernel' partition ...; " \ + "run nandargs; " \ "bootm ${loadaddr} - ${fdtaddr}\0" \ + "nandbootubifs=" \ + "ubi part rootfs; " \ + "ubifsmount ubi0:rootfs; " \ + "if run loadubizimage && run loadubidtb; then " \ + "echo Booting ${bootdir}/${bootfile} from NAND ubi0:rootfs ...; " \ + "run nandargs; " \ + "bootz ${loadaddr} - ${fdtaddr}; " \ + "fi\0" \ BOOTENV #endif /* __CONFIG_H */ diff --git a/include/configs/omap3_igep00x0.h b/include/configs/omap3_igep00x0.h index 91b3a23d29..76d8e13d52 100644 --- a/include/configs/omap3_igep00x0.h +++ b/include/configs/omap3_igep00x0.h @@ -41,11 +41,6 @@ #define GPIO_IGEP00X0_BOARD_DETECTION 28 #define GPIO_IGEP00X0_REVISION_DETECTION 129 -/* USB */ -#define CONFIG_USB_MUSB_UDC 1 -#define CONFIG_USB_OMAP3 1 -#define CONFIG_TWL4030_USB 1 - /* USB device configuration */ #define CONFIG_USB_DEVICE 1 #define CONFIG_USB_TTY 1 diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h index b095814cda..70745a882c 100644 --- a/include/configs/omap3_logic.h +++ b/include/configs/omap3_logic.h @@ -49,18 +49,9 @@ /* Hardware drivers */ -#define CONFIG_USB_OMAP3 - /* I2C */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM AT24C64 */ -/* USB */ -#define CONFIG_USB_MUSB_OMAP2PLUS -#define CONFIG_USB_MUSB_PIO_ONLY - -/* TWL4030 */ -#define CONFIG_TWL4030_USB - /* Board NAND Info. */ #ifdef CONFIG_NAND #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ diff --git a/include/configs/omap3_zoom1.h b/include/configs/omap3_zoom1.h index d1ff48d39f..cc7c2fdf04 100644 --- a/include/configs/omap3_zoom1.h +++ b/include/configs/omap3_zoom1.h @@ -34,11 +34,6 @@ * Hardware drivers */ -/* USB */ -#define CONFIG_USB_MUSB_UDC 1 -#define CONFIG_USB_OMAP3 1 -#define CONFIG_TWL4030_USB 1 - /* USB device configuration */ #define CONFIG_USB_DEVICE 1 #define CONFIG_USB_TTY 1 diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h index 5dba7d279a..2cb99119a1 100644 --- a/include/configs/omapl138_lcdk.h +++ b/include/configs/omapl138_lcdk.h @@ -24,7 +24,6 @@ */ #define CONFIG_MACH_OMAPL138_LCDK #define CONFIG_ARM926EJS /* arm926ejs CPU core */ -#define CONFIG_SOC_DA8XX /* TI DA8xx SoC */ #define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID) #define CONFIG_SYS_OSCIN_FREQ 24000000 #define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE @@ -129,7 +128,6 @@ #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } #define CONFIG_SPI -#define CONFIG_DAVINCI_SPI #define CONFIG_SYS_SPI_BASE DAVINCI_SPI1_BASE #define CONFIG_SYS_SPI_CLK clk_get(DAVINCI_SPI1_CLKID) #define CONFIG_SF_DEFAULT_SPEED 30000000 diff --git a/include/configs/openrd.h b/include/configs/openrd.h index 1bea7f58cb..0165d9cf0e 100644 --- a/include/configs/openrd.h +++ b/include/configs/openrd.h @@ -19,7 +19,6 @@ */ #define CONFIG_SHEEVA_88SV131 1 /* CPU Core subversion */ #define CONFIG_KW88F6281 1 /* SOC Name */ -#define CONFIG_MACH_OPENRD_BASE /* Machine type */ #define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ /* diff --git a/include/configs/p2771-0000.h b/include/configs/p2771-0000.h index 564069a665..29940a63de 100644 --- a/include/configs/p2771-0000.h +++ b/include/configs/p2771-0000.h @@ -24,9 +24,32 @@ /* PCI host support */ +#define BOARD_EXTRA_ENV_SETTINGS \ + "calculated_vars=kernel_addr_r fdt_addr_r scriptaddr pxefile_addr_r " \ + "ramdisk_addr_r\0" \ + "kernel_addr_r_align=00200000\0" \ + "kernel_addr_r_offset=00080000\0" \ + "kernel_addr_r_size=02000000\0" \ + "kernel_addr_r_aliases=loadaddr\0" \ + "fdt_addr_r_align=00200000\0" \ + "fdt_addr_r_offset=00000000\0" \ + "fdt_addr_r_size=00200000\0" \ + "scriptaddr_align=00200000\0" \ + "scriptaddr_offset=00000000\0" \ + "scriptaddr_size=00200000\0" \ + "pxefile_addr_r_align=00200000\0" \ + "pxefile_addr_r_offset=00000000\0" \ + "pxefile_addr_r_size=00200000\0" \ + "ramdisk_addr_r_align=00200000\0" \ + "ramdisk_addr_r_offset=00000000\0" \ + "ramdisk_addr_r_size=02000000\0" + #include "tegra-common-post.h" /* Crystal is 38.4MHz. clk_m runs at half that rate */ #define COUNTER_FREQUENCY 19200000 +#undef CONFIG_NR_DRAM_BANKS +#define CONFIG_NR_DRAM_BANKS (1024 + 2) + #endif diff --git a/include/configs/pcm051.h b/include/configs/pcm051.h index 79f3f48df8..c6ff1e1165 100644 --- a/include/configs/pcm051.h +++ b/include/configs/pcm051.h @@ -126,8 +126,6 @@ /* * USB configuration */ -#define CONFIG_USB_MUSB_DSPS -#define CONFIG_USB_MUSB_PIO_ONLY #define CONFIG_AM335X_USB0 #define CONFIG_AM335X_USB0_MODE MUSB_PERIPHERAL #define CONFIG_AM335X_USB1 diff --git a/include/configs/pengwyn.h b/include/configs/pengwyn.h index 8afd64e810..d9a50cacf2 100644 --- a/include/configs/pengwyn.h +++ b/include/configs/pengwyn.h @@ -162,8 +162,6 @@ * board schematic and physical port wired to each. Then for host we * add mass storage support. */ -#define CONFIG_USB_MUSB_DSPS -#define CONFIG_USB_MUSB_PIO_ONLY #define CONFIG_USB_MUSB_DISABLE_BULK_COMBINE_SPLIT #define CONFIG_AM335X_USB0 #define CONFIG_AM335X_USB0_MODE MUSB_PERIPHERAL diff --git a/include/configs/pic32mzdask.h b/include/configs/pic32mzdask.h index 97636fee38..7a959c4315 100644 --- a/include/configs/pic32mzdask.h +++ b/include/configs/pic32mzdask.h @@ -80,16 +80,6 @@ /*-------------------------------------------------- * USB Configuration */ -#define CONFIG_USB_MUSB_PIO_ONLY - -/*----------------------------------------------------------------------- - * File System Configuration - */ -/* FAT FS */ -#define CONFIG_SUPPORT_VFAT - -/* EXT4 FS */ -#define CONFIG_FS_EXT4 /* ------------------------------------------------- * Environment diff --git a/include/configs/poplar.h b/include/configs/poplar.h index 1c39ed153f..acdce29ba9 100644 --- a/include/configs/poplar.h +++ b/include/configs/poplar.h @@ -18,7 +18,7 @@ #define CONFIG_NR_DRAM_BANKS 2 /* SYS */ -#define CONFIG_SYS_BOOTM_LEN 0x1400000 +#define CONFIG_SYS_BOOTM_LEN SZ_64M #define CONFIG_SYS_INIT_SP_ADDR 0x200000 #define CONFIG_SYS_LOAD_ADDR 0x800000 #define CONFIG_SYS_MALLOC_LEN SZ_32M @@ -66,7 +66,6 @@ #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_ENV_OFFSET (0x780 * 512) /* env_mmc_blknum */ #define CONFIG_ENV_SIZE 0x10000 /* env_mmc_nblks bytes */ -#define CONFIG_FAT_WRITE #define CONFIG_ENV_VARS_UBOOT_CONFIG /* Monitor Command Prompt */ diff --git a/include/configs/porter.h b/include/configs/porter.h index 451d9dd66f..10dce6b476 100644 --- a/include/configs/porter.h +++ b/include/configs/porter.h @@ -45,7 +45,6 @@ #define CONFIG_SPI_FLASH_QUAD /* SH Ether */ -#define CONFIG_SH_ETHER #define CONFIG_SH_ETHER_USE_PORT 0 #define CONFIG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII diff --git a/include/configs/r0p7734.h b/include/configs/r0p7734.h index 1fef8b5f92..f9800ec168 100644 --- a/include/configs/r0p7734.h +++ b/include/configs/r0p7734.h @@ -10,7 +10,6 @@ #define __R0P7734_H #define CONFIG_CPU_SH7734 1 -#define CONFIG_R0P7734 1 #define CONFIG_400MHZ_MODE 1 #define CONFIG_SYS_TEXT_BASE 0x8FFC0000 @@ -19,7 +18,6 @@ #undef CONFIG_SHOW_BOOT_PROGRESS /* Ether */ -#define CONFIG_SH_ETHER 1 #define CONFIG_SH_ETHER_USE_PORT (0) #define CONFIG_SH_ETHER_PHY_ADDR (0x0) #define CONFIG_PHY_SMSC 1 diff --git a/include/configs/r2dplus.h b/include/configs/r2dplus.h index cdbe96ebc6..6ca66b8832 100644 --- a/include/configs/r2dplus.h +++ b/include/configs/r2dplus.h @@ -2,8 +2,6 @@ #define __CONFIG_H #define CONFIG_CPU_SH7751 1 -#define CONFIG_CPU_SH_TYPE_R 1 -#define CONFIG_R2DPLUS 1 #define __LITTLE_ENDIAN__ 1 #define CONFIG_DISPLAY_BOARDINFO diff --git a/include/configs/rcar-gen2-common.h b/include/configs/rcar-gen2-common.h index 2c10e6152d..d7792978f7 100644 --- a/include/configs/rcar-gen2-common.h +++ b/include/configs/rcar-gen2-common.h @@ -11,11 +11,6 @@ #include <asm/arch/rmobile.h> -/* Support File sytems */ -#define CONFIG_SUPPORT_VFAT -#define CONFIG_FS_EXT4 -#define CONFIG_EXT4_WRITE - #define CONFIG_CMDLINE_TAG #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_INITRD_TAG diff --git a/include/configs/rcar-gen3-common.h b/include/configs/rcar-gen3-common.h index 30a98b8ada..e9e5fecc12 100644 --- a/include/configs/rcar-gen3-common.h +++ b/include/configs/rcar-gen3-common.h @@ -17,11 +17,6 @@ /* boot option */ #define CONFIG_SUPPORT_RAW_INITRD -/* Support File sytems */ -#define CONFIG_SUPPORT_VFAT -#define CONFIG_FS_EXT4 -#define CONFIG_EXT4_WRITE - #define CONFIG_CMDLINE_TAG #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_INITRD_TAG diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h index e915a562b9..8889046f2b 100644 --- a/include/configs/rk3128_common.h +++ b/include/configs/rk3128_common.h @@ -30,9 +30,6 @@ /* MMC/SD IP block */ #define CONFIG_BOUNCE_BUFFER -#define CONFIG_SUPPORT_VFAT -#define CONFIG_FS_EXT4 - /* RAW SD card / eMMC locations. */ #define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10) diff --git a/include/configs/rk3188_common.h b/include/configs/rk3188_common.h index 0cb0762345..9ab5502422 100644 --- a/include/configs/rk3188_common.h +++ b/include/configs/rk3188_common.h @@ -58,7 +58,6 @@ #ifndef CONFIG_SPL_BUILD /* usb otg */ -#define CONFIG_ROCKCHIP_USB2_PHY /* usb host support */ #define ENV_MEM_LAYOUT_SETTINGS \ diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h index e2f070fd1c..c2bd378437 100644 --- a/include/configs/rk3288_common.h +++ b/include/configs/rk3288_common.h @@ -58,7 +58,6 @@ #ifndef CONFIG_SPL_BUILD /* usb otg */ -#define CONFIG_ROCKCHIP_USB2_PHY /* usb mass storage */ #define CONFIG_USB_FUNCTION_MASS_STORAGE diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h index af556323f8..eba5a22e06 100644 --- a/include/configs/rk3328_common.h +++ b/include/configs/rk3328_common.h @@ -24,9 +24,6 @@ /* MMC/SD IP block */ #define CONFIG_BOUNCE_BUFFER -#define CONFIG_SUPPORT_VFAT -#define CONFIG_FS_EXT4 - /* RAW SD card / eMMC locations. */ #define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10) diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h index 561bfa73b6..95f544ee58 100644 --- a/include/configs/rk3399_common.h +++ b/include/configs/rk3399_common.h @@ -38,9 +38,6 @@ #define CONFIG_BOUNCE_BUFFER #define CONFIG_ROCKCHIP_SDHCI_MAX_FREQ 200000000 -#define CONFIG_SUPPORT_VFAT -#define CONFIG_FS_EXT4 - /* RAW SD card / eMMC locations. */ #define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10) diff --git a/include/configs/rsk7203.h b/include/configs/rsk7203.h index 215767cf0a..a5aa11ce1b 100644 --- a/include/configs/rsk7203.h +++ b/include/configs/rsk7203.h @@ -11,7 +11,6 @@ #define __RSK7203_H #define CONFIG_CPU_SH7203 1 -#define CONFIG_RSK7203 1 #define CONFIG_LOADADDR 0x0C100000 /* RSK7203_SDRAM_BASE + 1MB */ diff --git a/include/configs/rsk7264.h b/include/configs/rsk7264.h index 11b8e0a179..2ecc328166 100644 --- a/include/configs/rsk7264.h +++ b/include/configs/rsk7264.h @@ -12,7 +12,6 @@ #define __RSK7264_H #define CONFIG_CPU_SH7264 1 -#define CONFIG_RSK7264 1 #define CONFIG_DISPLAY_BOARDINFO diff --git a/include/configs/rsk7269.h b/include/configs/rsk7269.h index 709563d7d8..88d50ef9b9 100644 --- a/include/configs/rsk7269.h +++ b/include/configs/rsk7269.h @@ -11,7 +11,6 @@ #define __RSK7269_H #define CONFIG_CPU_SH7269 1 -#define CONFIG_RSK7269 1 #define CONFIG_DISPLAY_BOARDINFO diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index 86835e735e..c31896ddf8 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -15,7 +15,6 @@ #define CONFIG_SAMSUNG 1 /* in a SAMSUNG core */ #define CONFIG_S5P 1 /* which is in a S5P Family */ #define CONFIG_S5PC110 1 /* which is in a S5PC110 */ -#define CONFIG_MACH_GONI 1 /* working with Goni */ #include <linux/sizes.h> #include <asm/arch/cpu.h> /* get chip and board defs */ @@ -188,11 +187,6 @@ #define CONFIG_SAMSUNG_ONENAND 1 #define CONFIG_SYS_ONENAND_BASE 0xB0000000 -/* write support for filesystems */ -#define CONFIG_EXT4_WRITE - -/* GPT */ - #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - 0x1000000) #define CONFIG_USB_GADGET_DWC2_OTG_PHY diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h index f0426567fd..cfb3e7affd 100644 --- a/include/configs/sandbox.h +++ b/include/configs/sandbox.h @@ -25,8 +25,6 @@ #define CONFIG_LMB -#define CONFIG_FS_EXT4 -#define CONFIG_EXT4_WRITE #define CONFIG_HOST_MAX_DEVICES 4 /* diff --git a/include/configs/sbc8349.h b/include/configs/sbc8349.h index 328cdf4757..7f1620db02 100644 --- a/include/configs/sbc8349.h +++ b/include/configs/sbc8349.h @@ -21,7 +21,6 @@ #define CONFIG_E300 1 /* E300 Family */ #define CONFIG_MPC834x 1 /* MPC834x family */ #define CONFIG_MPC8349 1 /* MPC8349 specific */ -#define CONFIG_SBC8349 1 /* WRS SBC8349 board specific */ #define CONFIG_SYS_TEXT_BASE 0xFF800000 diff --git a/include/configs/sbc8548.h b/include/configs/sbc8548.h index a2a715b99d..041e69e1f7 100644 --- a/include/configs/sbc8548.h +++ b/include/configs/sbc8548.h @@ -36,7 +36,6 @@ /* * High Level Configuration Options */ -#define CONFIG_SBC8548 1 /* SBC8548 board specific */ /* * If you want to boot from the SODIMM flash, instead of the soldered diff --git a/include/configs/sbc8641d.h b/include/configs/sbc8641d.h index 817c9d920d..03709adb2d 100644 --- a/include/configs/sbc8641d.h +++ b/include/configs/sbc8641d.h @@ -21,7 +21,6 @@ #define __CONFIG_H /* High Level Configuration Options */ -#define CONFIG_SBC8641D 1 /* SBC8641D board specific */ #define CONFIG_MP 1 /* support multiple processors */ #define CONFIG_LINUX_RESET_VEC 0x100 /* Reset vector used by Linux */ diff --git a/include/configs/sh7752evb.h b/include/configs/sh7752evb.h index 13d22a2f17..ee57eb2fd1 100644 --- a/include/configs/sh7752evb.h +++ b/include/configs/sh7752evb.h @@ -10,7 +10,6 @@ #define __SH7752EVB_H #define CONFIG_CPU_SH7752 1 -#define CONFIG_SH7752EVB 1 #define CONFIG_SYS_TEXT_BASE 0x5ff80000 @@ -48,7 +47,6 @@ #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) /* Ether */ -#define CONFIG_SH_ETHER 1 #define CONFIG_SH_ETHER_USE_PORT 0 #define CONFIG_SH_ETHER_PHY_ADDR 18 #define CONFIG_SH_ETHER_CACHE_WRITEBACK 1 diff --git a/include/configs/sh7753evb.h b/include/configs/sh7753evb.h index 66f8c7a227..e7f9f61974 100644 --- a/include/configs/sh7753evb.h +++ b/include/configs/sh7753evb.h @@ -10,7 +10,6 @@ #define __SH7753EVB_H #define CONFIG_CPU_SH7753 1 -#define CONFIG_SH7753EVB 1 #define CONFIG_SYS_TEXT_BASE 0x5ff80000 @@ -48,7 +47,6 @@ #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) /* Ether */ -#define CONFIG_SH_ETHER 1 #define CONFIG_SH_ETHER_USE_PORT 0 #define CONFIG_SH_ETHER_PHY_ADDR 18 #define CONFIG_SH_ETHER_CACHE_WRITEBACK 1 diff --git a/include/configs/sh7757lcr.h b/include/configs/sh7757lcr.h index 43de7e533e..a2b3307804 100644 --- a/include/configs/sh7757lcr.h +++ b/include/configs/sh7757lcr.h @@ -10,7 +10,6 @@ #define __SH7757LCR_H #define CONFIG_CPU_SH7757 1 -#define CONFIG_SH7757LCR 1 #define CONFIG_SH7757LCR_DDR_ECC 1 #define CONFIG_SYS_TEXT_BASE 0x8ef80000 @@ -49,7 +48,6 @@ #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) /* Ether */ -#define CONFIG_SH_ETHER 1 #define CONFIG_SH_ETHER_USE_PORT 0 #define CONFIG_SH_ETHER_PHY_ADDR 1 #define CONFIG_SH_ETHER_CACHE_WRITEBACK 1 diff --git a/include/configs/sh7763rdp.h b/include/configs/sh7763rdp.h index 61fb64e7d3..de4a587914 100644 --- a/include/configs/sh7763rdp.h +++ b/include/configs/sh7763rdp.h @@ -11,7 +11,6 @@ #define __SH7763RDP_H #define CONFIG_CPU_SH7763 1 -#define CONFIG_SH7763RDP 1 #define __LITTLE_ENDIAN 1 #define CONFIG_ENV_OVERWRITE 1 @@ -78,7 +77,6 @@ #define CONFIG_SYS_TMU_CLK_DIV (4) /* 4 (default), 16, 64, 256 or 1024 */ /* Ether */ -#define CONFIG_SH_ETHER 1 #define CONFIG_SH_ETHER_USE_PORT (1) #define CONFIG_SH_ETHER_PHY_ADDR (0x01) #define CONFIG_BITBANGMII diff --git a/include/configs/sh7785lcr.h b/include/configs/sh7785lcr.h index f77e47ac58..c90cbe1ede 100644 --- a/include/configs/sh7785lcr.h +++ b/include/configs/sh7785lcr.h @@ -10,7 +10,6 @@ #define __SH7785LCR_H #define CONFIG_CPU_SH7785 1 -#define CONFIG_SH7785LCR 1 #define CONFIG_EXTRA_ENV_SETTINGS \ "bootdevice=0:1\0" \ diff --git a/include/configs/sheevaplug.h b/include/configs/sheevaplug.h index 9acd4d32b3..ebed1d526c 100644 --- a/include/configs/sheevaplug.h +++ b/include/configs/sheevaplug.h @@ -14,7 +14,6 @@ * High Level Configuration Options (easy to change) */ #define CONFIG_FEROCEON_88FR131 1 /* CPU Core subversion */ -#define CONFIG_MACH_SHEEVAPLUG /* Machine type */ /* * Commands configuration diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h index 78708a23ce..85b64123a0 100644 --- a/include/configs/siemens-am33x-common.h +++ b/include/configs/siemens-am33x-common.h @@ -168,8 +168,6 @@ /* * USB configuration */ -#define CONFIG_USB_MUSB_DSPS -#define CONFIG_USB_MUSB_PIO_ONLY #define CONFIG_USB_MUSB_DISABLE_BULK_COMBINE_SPLIT #define CONFIG_AM335X_USB0 diff --git a/include/configs/silk.h b/include/configs/silk.h index 0384325cb5..79a4f06c0b 100644 --- a/include/configs/silk.h +++ b/include/configs/silk.h @@ -45,7 +45,6 @@ #define CONFIG_SPI_FLASH_QUAD /* SH Ether */ -#define CONFIG_SH_ETHER #define CONFIG_SH_ETHER_USE_PORT 0 #define CONFIG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII diff --git a/include/configs/sksimx6.h b/include/configs/sksimx6.h new file mode 100644 index 0000000000..c635e9f1b5 --- /dev/null +++ b/include/configs/sksimx6.h @@ -0,0 +1,101 @@ +/* + * Copyright (C) Stefano Babic <sbabic@denx.de> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + + +#ifndef __SKSIMX6_CONFIG_H +#define __SKSIMX6_CONFIG_H + +#include <config_distro_defaults.h> + +#include "mx6_common.h" +#include "imx6_spl.h" + +/* Thermal */ +#define CONFIG_IMX_THERMAL + +/* Serial */ +#define CONFIG_MXC_UART +#define CONFIG_MXC_UART_BASE UART1_BASE + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (8 * SZ_1M) + +/* Ethernet */ +#define IMX_FEC_BASE ENET_BASE_ADDR +#define CONFIG_FEC_XCV_TYPE RGMII +#define CONFIG_ETHPRIME "FEC" +#define CONFIG_FEC_MXC_PHYADDR 0x01 + +#define CONFIG_MII +#define CONFIG_PHY_MICREL_KSZ9021 + +/* I2C Configs */ +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_MXC_I2C2 +#define CONFIG_SYS_I2C_SPEED 100000 + +/* Filesystem support */ + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* MMC Configs */ +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CONFIG_SYS_FSL_USDHC_NUM 1 + +/* Environment organization */ +#define CONFIG_ENV_SIZE (16 * 1024) +#define CONFIG_ENV_OFFSET (6 * 64 * 1024) +#define CONFIG_SYS_MMC_ENV_DEV 0 +#define CONFIG_SYS_REDUNDAND_ENVIRONMENT +#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \ + CONFIG_ENV_SIZE) +#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE + +/* Default environment */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + "addcons=setenv bootargs ${bootargs} " \ + "console=${console},${baudrate}\0" \ + "addip=setenv bootargs ${bootargs} " \ + "ip=${ipaddr}:${serverip}:${gatewayip}:" \ + "${netmask}:${hostname}:${netdev}:off\0" \ + "addmisc=setenv bootargs ${bootargs} ${miscargs}\0" \ + "bootcmd=run mmcboot\0" \ + "bootfile=uImage\0" \ + "bootimage=uImage\0" \ + "console=ttymxc0\0" \ + "fdt_addr_r=0x18000000\0" \ + "fdt_file=imx6dl-sks-cts.dtb\0" \ + "fdt_high=0xffffffff\0" \ + "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ + "miscargs=quiet\0" \ + "mmcargs=setenv bootargs root=${mmcroot} rw rootwait\0" \ + "mmcboot=if run mmcload;then " \ + "run mmcargs addcons addmisc;" \ + "bootm;fi\0" \ + "mmcload=mmc rescan;" \ + "load mmc 0:${mmcpart} ${kernel_addr_r} boot/fitImage\0"\ + "mmcpart=1\0" \ + "mmcroot=/dev/mmcblk0p1\0" \ + "net_nfs=tftp ${kernel_addr_r} ${board_name}/${bootfile};" \ + "tftp ${fdt_addr_r} ${board_name}/${fdt_file};" \ + "run nfsargs addip addcons addmisc;" \ + "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \ + "nfsargs=setenv bootargs root=/dev/nfs " \ + "nfsroot=${serverip}:${nfsroot},v3 panic=1\0" + +#endif diff --git a/include/configs/sniper.h b/include/configs/sniper.h index 580994280b..0ed72cf901 100644 --- a/include/configs/sniper.h +++ b/include/configs/sniper.h @@ -110,14 +110,6 @@ 115200 } /* - * USB gadget - */ - -#define CONFIG_USB_MUSB_PIO_ONLY -#define CONFIG_USB_MUSB_OMAP2PLUS -#define CONFIG_TWL4030_USB - -/* * Environment */ diff --git a/include/configs/stm32f429-discovery.h b/include/configs/stm32f429-discovery.h index 024d75af3b..1ad36986ae 100644 --- a/include/configs/stm32f429-discovery.h +++ b/include/configs/stm32f429-discovery.h @@ -24,7 +24,6 @@ * Configuration of the external SDRAM memory */ #define CONFIG_NR_DRAM_BANKS 1 -#define CONFIG_SYS_RAM_SIZE (8 << 20) #define CONFIG_SYS_RAM_CS 1 #define CONFIG_SYS_RAM_FREQ_DIV 2 #define CONFIG_SYS_RAM_BASE 0xD0000000 @@ -42,9 +41,7 @@ #define CONFIG_RED_LED 110 #define CONFIG_GREEN_LED 109 -#define CONFIG_STM32_GPIO #define CONFIG_STM32_FLASH -#define CONFIG_STM32_SERIAL #define CONFIG_STM32_HSE_HZ 8000000 diff --git a/include/configs/stm32f469-discovery.h b/include/configs/stm32f469-discovery.h new file mode 100644 index 0000000000..140999994b --- /dev/null +++ b/include/configs/stm32f469-discovery.h @@ -0,0 +1,68 @@ +/* + * Copyright (C) STMicroelectronics SA 2017 + * Author(s): Patrice CHOTARD, <patrice.chotard@st.com> for STMicroelectronics. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#define CONFIG_STM32F4DISCOVERY + +#define CONFIG_MISC_INIT_R + +#define CONFIG_SYS_FLASH_BASE 0x08000000 + +#define CONFIG_SYS_INIT_SP_ADDR 0x10010000 +#define CONFIG_SYS_TEXT_BASE 0x08000000 + +#define CONFIG_SYS_ICACHE_OFF +#define CONFIG_SYS_DCACHE_OFF + +/* + * Configuration of the external SDRAM memory + */ +#define CONFIG_NR_DRAM_BANKS 1 +#define CONFIG_SYS_RAM_FREQ_DIV 2 +#define CONFIG_SYS_RAM_BASE 0x00000000 +#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_RAM_BASE +#define CONFIG_SYS_LOAD_ADDR 0x00400000 +#define CONFIG_LOADADDR 0x00400000 + +#define CONFIG_SYS_MAX_FLASH_SECT 12 +#define CONFIG_SYS_MAX_FLASH_BANKS 2 + +#define CONFIG_ENV_OFFSET (256 << 10) +#define CONFIG_ENV_SECT_SIZE (128 << 10) +#define CONFIG_ENV_SIZE (8 << 10) + +#define CONFIG_STM32_FLASH + +#define CONFIG_STM32_HSE_HZ 8000000 +#define CONFIG_SYS_CLK_FREQ 180000000 /* 180 MHz */ +#define CONFIG_SYS_HZ_CLOCK 1000000 /* Timer is clocked at 1MHz */ + +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG +#define CONFIG_REVISION_TAG + +#define CONFIG_SYS_CBSIZE 1024 + +#define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024) + +#define CONFIG_BOOTCOMMAND \ + "run boot_sd" + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "boot_sd=mmc dev 0;fatload mmc 0 0x00700000 stm32f469-disco.dtb; fatload mmc 0 0x00008000 zImage; icache off; bootz 0x00008000 - 0x00700000" + +/* + * Command line configuration. + */ +#define CONFIG_SYS_LONGHELP +#define CONFIG_AUTO_COMPLETE +#define CONFIG_CMDLINE_EDITING + +#endif /* __CONFIG_H */ diff --git a/include/configs/stmark2.h b/include/configs/stmark2.h index 75ca1ff2f6..cefadc1e81 100644 --- a/include/configs/stmark2.h +++ b/include/configs/stmark2.h @@ -9,7 +9,6 @@ #ifndef __STMARK2_CONFIG_H #define __STMARK2_CONFIG_H -#define CONFIG_STMARK2 #define CONFIG_HOSTNAME stmark2 #define CONFIG_MCFUART diff --git a/include/configs/stout.h b/include/configs/stout.h index 9422c042f3..789f364168 100644 --- a/include/configs/stout.h +++ b/include/configs/stout.h @@ -48,7 +48,6 @@ #define CONFIG_SPI_FLASH_QUAD /* SH Ether */ -#define CONFIG_SH_ETHER #define CONFIG_SH_ETHER_USE_PORT 0 #define CONFIG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 3855c564f9..582aba298a 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -302,10 +302,6 @@ extern int soft_i2c_gpio_scl; #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 #endif -#ifdef CONFIG_USB_MUSB_SUNXI -#define CONFIG_USB_MUSB_PIO_ONLY -#endif - #ifdef CONFIG_USB_MUSB_GADGET #define CONFIG_USB_FUNCTION_MASS_STORAGE #endif diff --git a/include/configs/tegra-common-post.h b/include/configs/tegra-common-post.h index 743be6bb56..aea8f1fb8e 100644 --- a/include/configs/tegra-common-post.h +++ b/include/configs/tegra-common-post.h @@ -113,11 +113,6 @@ #ifdef CONFIG_CMD_I2C #endif -/* remove partitions/filesystems */ -#ifdef CONFIG_FS_EXT4 -#undef CONFIG_FS_EXT4 -#endif - /* remove USB */ #ifdef CONFIG_USB_EHCI_TEGRA #undef CONFIG_USB_EHCI_TEGRA diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h index 3cdd9741b2..2d98a6fa64 100644 --- a/include/configs/tegra-common.h +++ b/include/configs/tegra-common.h @@ -78,17 +78,21 @@ #define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* 256M */ +#ifndef CONFIG_ARM64 #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_STACKBASE #define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE - \ GENERATED_GBL_DATA_SIZE) +#endif +#ifndef CONFIG_ARM64 /* Defines for SPL */ #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_TEXT_BASE - \ CONFIG_SPL_TEXT_BASE) #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000 +#endif /* Misc utility code */ #define CONFIG_BOUNCE_BUFFER diff --git a/include/configs/tegra186-common.h b/include/configs/tegra186-common.h index 98e4fc2d25..1c8772a117 100644 --- a/include/configs/tegra186-common.h +++ b/include/configs/tegra186-common.h @@ -14,11 +14,6 @@ */ #define V_NS16550_CLK 408000000 /* 408MHz (pllp_out0) */ -/* - * Miscellaneous configurable options - */ -#define CONFIG_STACKBASE 0x82800000 /* 40MB */ - /*----------------------------------------------------------------------- * Physical Memory Map */ @@ -60,9 +55,4 @@ "fdt_addr_r=0x82000000\0" \ "ramdisk_addr_r=0x82100000\0" -/* Defines for SPL */ -#define CONFIG_SPL_TEXT_BASE 0x80108000 -#define CONFIG_SYS_SPL_MALLOC_START 0x80090000 -#define CONFIG_SPL_STACK 0x800ffffc - #endif diff --git a/include/configs/tegra210-common.h b/include/configs/tegra210-common.h index 4c05576a90..35735f3b78 100644 --- a/include/configs/tegra210-common.h +++ b/include/configs/tegra210-common.h @@ -15,11 +15,6 @@ */ #define V_NS16550_CLK 408000000 /* 408MHz (pllp_out0) */ -/* - * Miscellaneous configurable options - */ -#define CONFIG_STACKBASE 0x82800000 /* 40MB */ - /*----------------------------------------------------------------------- * Physical Memory Map */ @@ -60,11 +55,6 @@ "fdt_addr_r=0x82000000\0" \ "ramdisk_addr_r=0x82100000\0" -/* Defines for SPL */ -#define CONFIG_SPL_TEXT_BASE 0x80108000 -#define CONFIG_SYS_SPL_MALLOC_START 0x80090000 -#define CONFIG_SPL_STACK 0x800ffffc - /* For USB EHCI controller */ #define CONFIG_EHCI_IS_TDI #define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10 diff --git a/include/configs/theadorable.h b/include/configs/theadorable.h index 6e95aa1626..438abf10cc 100644 --- a/include/configs/theadorable.h +++ b/include/configs/theadorable.h @@ -67,9 +67,6 @@ #define CONFIG_SYS_SATA_MAX_DEVICE 1 #define CONFIG_LBA48 -/* Additional FS support/configuration */ -#define CONFIG_SUPPORT_VFAT - /* PCIe support */ #ifdef CONFIG_CMD_PCI #ifndef CONFIG_SPL_BUILD diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h index 562bb65636..bbed17a25f 100644 --- a/include/configs/ti_armv7_keystone2.h +++ b/include/configs/ti_armv7_keystone2.h @@ -78,7 +78,6 @@ #endif /* SPI Configuration */ -#define CONFIG_DAVINCI_SPI #define CONFIG_SYS_SPI_CLK ks_clk_get_rate(KS2_CLK1_6) #define CONFIG_SF_DEFAULT_SPEED 30000000 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED @@ -266,7 +265,7 @@ "${bootdir}/${fit_bootfile}\0" \ "get_uboot_net=dhcp ${loadaddr} ${tftp_root}/${name_uboot}\0" \ "get_uboot_nfs=nfs ${loadaddr} ${nfs_root}/boot/${name_uboot}\0" \ - "burn_uboot_spi=sf probe; sf erase 0 0x90000; " \ + "burn_uboot_spi=sf probe; sf erase 0 0x100000; " \ "sf write ${loadaddr} 0 ${filesize}\0" \ "burn_uboot_nand=nand erase 0 0x100000; " \ "nand write ${loadaddr} 0 ${filesize}\0" \ diff --git a/include/configs/ti_omap4_common.h b/include/configs/ti_omap4_common.h index 91b2132455..844a9e55b3 100644 --- a/include/configs/ti_omap4_common.h +++ b/include/configs/ti_omap4_common.h @@ -61,8 +61,6 @@ #endif /* USB */ -#define CONFIG_USB_MUSB_UDC 1 -#define CONFIG_USB_OMAP3 1 /* USB device configuration */ #define CONFIG_USB_DEVICE 1 diff --git a/include/configs/turris_omnia.h b/include/configs/turris_omnia.h index 3dbd2cacba..40d94a2d24 100644 --- a/include/configs/turris_omnia.h +++ b/include/configs/turris_omnia.h @@ -59,9 +59,6 @@ #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ CONFIG_SYS_SCSI_MAX_LUN) -/* Additional FS support/configuration */ -#define CONFIG_SUPPORT_VFAT - /* USB/EHCI configuration */ #define CONFIG_EHCI_IS_TDI diff --git a/include/configs/vct.h b/include/configs/vct.h index 00ad134382..a5b5aafb40 100644 --- a/include/configs/vct.h +++ b/include/configs/vct.h @@ -72,7 +72,6 @@ * Commands */ #if defined(CONFIG_CMD_USB) -#define CONFIG_SUPPORT_VFAT /* * USB/EHCI diff --git a/include/configs/ve8313.h b/include/configs/ve8313.h index 3ac11ccb8f..94a59f3e90 100644 --- a/include/configs/ve8313.h +++ b/include/configs/ve8313.h @@ -19,7 +19,6 @@ #define CONFIG_E300 1 #define CONFIG_MPC831x 1 #define CONFIG_MPC8313 1 -#define CONFIG_VE8313 1 #ifndef CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_TEXT_BASE 0xfe000000 diff --git a/include/configs/x600.h b/include/configs/x600.h index 7363057a5c..4aa5a2a924 100644 --- a/include/configs/x600.h +++ b/include/configs/x600.h @@ -96,10 +96,6 @@ #define CONFIG_USB_EHCI_SPEAR #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 -/* Filesystem support (for USB key) */ -#define CONFIG_SUPPORT_VFAT - - /* * U-Boot Environment placing definitions. */ diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h index 064c546403..994214ea48 100644 --- a/include/configs/x86-common.h +++ b/include/configs/x86-common.h @@ -58,8 +58,6 @@ #define CONFIG_CMDLINE_EDITING #define CONFIG_AUTO_COMPLETE -#define CONFIG_SUPPORT_VFAT - /*----------------------------------------------------------------------- * Command line configuration. */ diff --git a/include/configs/xpedite517x.h b/include/configs/xpedite517x.h index 4326984b06..f95d47a9a0 100644 --- a/include/configs/xpedite517x.h +++ b/include/configs/xpedite517x.h @@ -14,7 +14,6 @@ /* * High Level Configuration Options */ -#define CONFIG_XPEDITE5140 1 /* MPC8641HPCN board specific */ #define CONFIG_SYS_BOARD_NAME "XPedite5170" #define CONFIG_SYS_FORM_3U_VPX 1 #define CONFIG_LINUX_RESET_VEC 0x100 /* Reset vector used by Linux */ diff --git a/include/configs/xpedite520x.h b/include/configs/xpedite520x.h index 5a56162e7c..c0df5ef02b 100644 --- a/include/configs/xpedite520x.h +++ b/include/configs/xpedite520x.h @@ -14,7 +14,6 @@ /* * High Level Configuration Options */ -#define CONFIG_XPEDITE5200 1 #define CONFIG_SYS_BOARD_NAME "XPedite5200" #define CONFIG_SYS_FORM_PMC_XMC 1 #define CONFIG_BOARD_EARLY_INIT_R /* Call board_pre_init */ diff --git a/include/configs/xpedite550x.h b/include/configs/xpedite550x.h index 624e9a82d0..b5e8231873 100644 --- a/include/configs/xpedite550x.h +++ b/include/configs/xpedite550x.h @@ -14,7 +14,6 @@ /* * High Level Configuration Options */ -#define CONFIG_XPEDITE550X 1 #define CONFIG_SYS_BOARD_NAME "XPedite5500" #define CONFIG_SYS_FORM_PMC_XMC 1 #define CONFIG_PRPMC_PCI_ALIAS "pci0" /* Processor PMC interface on pci0 */ diff --git a/include/configs/zmx25.h b/include/configs/zmx25.h index 1ae1ca4317..f9783a21c2 100644 --- a/include/configs/zmx25.h +++ b/include/configs/zmx25.h @@ -82,7 +82,6 @@ #define CONFIG_MXC_USB_PORTSC MXC_EHCI_MODE_SERIAL #define CONFIG_MXC_USB_FLAGS (MXC_EHCI_INTERNAL_PHY | MXC_EHCI_IPPUE_DOWN) #define CONFIG_EHCI_IS_TDI -#define CONFIG_SUPPORT_VFAT #endif /* CONFIG_CMD_USB */ /* SDRAM */ diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index b10cb3f572..28cee15b37 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -124,10 +124,6 @@ # define DFU_ALT_INFO #endif -#if defined(CONFIG_MMC_SDHCI_ZYNQ) || defined(CONFIG_ZYNQ_USB) -# define CONFIG_SUPPORT_VFAT -#endif - #if defined(CONFIG_ZYNQ_I2C0) || defined(CONFIG_ZYNQ_I2C1) #define CONFIG_SYS_I2C_ZYNQ #endif diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h index 8b9932a569..c359a60f95 100644 --- a/include/dm/ofnode.h +++ b/include/dm/ofnode.h @@ -652,4 +652,17 @@ int ofnode_read_resource_byname(ofnode node, const char *name, ofnode_valid(node); \ node = ofnode_next_subnode(node)) +/** + * ofnode_translate_address() - Tranlate a device-tree address + * + * Translate an address from the device-tree into a CPU physical address. This + * function walks up the tree and applies the various bus mappings along the + * way. + * + * @ofnode: Device tree node giving the context in which to translate the + * address + * @in_addr: pointer to the address to translate + * @return the translated address; OF_BAD_ADDR on error + */ +u64 ofnode_translate_address(ofnode node, const fdt32_t *in_addr); #endif diff --git a/include/dm/pinctrl.h b/include/dm/pinctrl.h index 0eb4b924d4..c6c8f6158d 100644 --- a/include/dm/pinctrl.h +++ b/include/dm/pinctrl.h @@ -137,6 +137,12 @@ struct pinctrl_ops { /** * Generic pin configuration paramters * + * enum pin_config_param - possible pin configuration parameters + * @PIN_CONFIG_BIAS_BUS_HOLD: the pin will be set to weakly latch so that it + * weakly drives the last value on a tristate bus, also known as a "bus + * holder", "bus keeper" or "repeater". This allows another device on the + * bus to change the value by driving the bus high or low and switching to + * tristate. The argument is ignored. * @PIN_CONFIG_BIAS_DISABLE: disable any pin bias on the pin, a * transition from say pull-up to pull-down implies that you disable * pull-up in the process, this setting disables all biasing. @@ -146,14 +152,6 @@ struct pinctrl_ops { * if for example some other pin is going to drive the signal connected * to it for a while. Pins used for input are usually always high * impedance. - * @PIN_CONFIG_BIAS_BUS_HOLD: the pin will be set to weakly latch so that it - * weakly drives the last value on a tristate bus, also known as a "bus - * holder", "bus keeper" or "repeater". This allows another device on the - * bus to change the value by driving the bus high or low and switching to - * tristate. The argument is ignored. - * @PIN_CONFIG_BIAS_PULL_UP: the pin will be pulled up (usually with high - * impedance to VDD). If the argument is != 0 pull-up is enabled, - * if it is 0, pull-up is total, i.e. the pin is connected to VDD. * @PIN_CONFIG_BIAS_PULL_DOWN: the pin will be pulled down (usually with high * impedance to GROUND). If the argument is != 0 pull-down is enabled, * if it is 0, pull-down is total, i.e. the pin is connected to GROUND. @@ -165,10 +163,9 @@ struct pinctrl_ops { * If the argument is != 0 pull up/down is enabled, if it is 0, the * configuration is ignored. The proper way to disable it is to use * @PIN_CONFIG_BIAS_DISABLE. - * @PIN_CONFIG_DRIVE_PUSH_PULL: the pin will be driven actively high and - * low, this is the most typical case and is typically achieved with two - * active transistors on the output. Setting this config will enable - * push-pull mode, the argument is ignored. + * @PIN_CONFIG_BIAS_PULL_UP: the pin will be pulled up (usually with high + * impedance to VDD). If the argument is != 0 pull-up is enabled, + * if it is 0, pull-up is total, i.e. the pin is connected to VDD. * @PIN_CONFIG_DRIVE_OPEN_DRAIN: the pin will be driven with open drain (open * collector) which means it is usually wired with other output ports * which are then pulled up with an external resistor. Setting this @@ -176,59 +173,82 @@ struct pinctrl_ops { * @PIN_CONFIG_DRIVE_OPEN_SOURCE: the pin will be driven with open source * (open emitter). Setting this config will enable open source mode, the * argument is ignored. + * @PIN_CONFIG_DRIVE_PUSH_PULL: the pin will be driven actively high and + * low, this is the most typical case and is typically achieved with two + * active transistors on the output. Setting this config will enable + * push-pull mode, the argument is ignored. * @PIN_CONFIG_DRIVE_STRENGTH: the pin will sink or source at most the current * passed as argument. The argument is in mA. + * @PIN_CONFIG_INPUT_DEBOUNCE: this will configure the pin to debounce mode, + * which means it will wait for signals to settle when reading inputs. The + * argument gives the debounce time in usecs. Setting the + * argument to zero turns debouncing off. * @PIN_CONFIG_INPUT_ENABLE: enable the pin's input. Note that this does not * affect the pin's ability to drive output. 1 enables input, 0 disables * input. - * @PIN_CONFIG_INPUT_SCHMITT_ENABLE: control schmitt-trigger mode on the pin. - * If the argument != 0, schmitt-trigger mode is enabled. If it's 0, - * schmitt-trigger mode is disabled. * @PIN_CONFIG_INPUT_SCHMITT: this will configure an input pin to run in * schmitt-trigger mode. If the schmitt-trigger has adjustable hysteresis, * the threshold value is given on a custom format as argument when * setting pins to this mode. - * @PIN_CONFIG_INPUT_DEBOUNCE: this will configure the pin to debounce mode, - * which means it will wait for signals to settle when reading inputs. The - * argument gives the debounce time in usecs. Setting the - * argument to zero turns debouncing off. + * @PIN_CONFIG_INPUT_SCHMITT_ENABLE: control schmitt-trigger mode on the pin. + * If the argument != 0, schmitt-trigger mode is enabled. If it's 0, + * schmitt-trigger mode is disabled. + * @PIN_CONFIG_LOW_POWER_MODE: this will configure the pin for low power + * operation, if several modes of operation are supported these can be + * passed in the argument on a custom form, else just use argument 1 + * to indicate low power mode, argument 0 turns low power mode off. + * @PIN_CONFIG_OUTPUT_ENABLE: this will enable the pin's output mode + * without driving a value there. For most platforms this reduces to + * enable the output buffers and then let the pin controller current + * configuration (eg. the currently selected mux function) drive values on + * the line. Use argument 1 to enable output mode, argument 0 to disable + * it. + * @PIN_CONFIG_OUTPUT: this will configure the pin as an output and drive a + * value on the line. Use argument 1 to indicate high level, argument 0 to + * indicate low level. (Please see Documentation/driver-api/pinctl.rst, + * section "GPIO mode pitfalls" for a discussion around this parameter.) * @PIN_CONFIG_POWER_SOURCE: if the pin can select between different power * supplies, the argument to this parameter (on a custom format) tells * the driver which alternative power source to use. + * @PIN_CONFIG_SLEEP_HARDWARE_STATE: indicate this is sleep related state. * @PIN_CONFIG_SLEW_RATE: if the pin can select slew rate, the argument to * this parameter (on a custom format) tells the driver which alternative * slew rate to use. - * @PIN_CONFIG_LOW_POWER_MODE: this will configure the pin for low power - * operation, if several modes of operation are supported these can be - * passed in the argument on a custom form, else just use argument 1 - * to indicate low power mode, argument 0 turns low power mode off. - * @PIN_CONFIG_OUTPUT: this will configure the pin as an output. Use argument - * 1 to indicate high level, argument 0 to indicate low level. (Please - * see Documentation/pinctrl.txt, section "GPIO mode pitfalls" for a - * discussion around this parameter.) + * @PIN_CONFIG_SKEW_DELAY: if the pin has programmable skew rate (on inputs) + * or latch delay (on outputs) this parameter (in a custom format) + * specifies the clock skew or latch delay. It typically controls how + * many double inverters are put in front of the line. * @PIN_CONFIG_END: this is the last enumerator for pin configurations, if * you need to pass in custom configurations to the pin controller, use * PIN_CONFIG_END+1 as the base offset. + * @PIN_CONFIG_MAX: this is the maximum configuration value that can be + * presented using the packed format. */ -#define PIN_CONFIG_BIAS_DISABLE 0 -#define PIN_CONFIG_BIAS_HIGH_IMPEDANCE 1 -#define PIN_CONFIG_BIAS_BUS_HOLD 2 -#define PIN_CONFIG_BIAS_PULL_UP 3 -#define PIN_CONFIG_BIAS_PULL_DOWN 4 -#define PIN_CONFIG_BIAS_PULL_PIN_DEFAULT 5 -#define PIN_CONFIG_DRIVE_PUSH_PULL 6 -#define PIN_CONFIG_DRIVE_OPEN_DRAIN 7 -#define PIN_CONFIG_DRIVE_OPEN_SOURCE 8 -#define PIN_CONFIG_DRIVE_STRENGTH 9 -#define PIN_CONFIG_INPUT_ENABLE 10 -#define PIN_CONFIG_INPUT_SCHMITT_ENABLE 11 -#define PIN_CONFIG_INPUT_SCHMITT 12 -#define PIN_CONFIG_INPUT_DEBOUNCE 13 -#define PIN_CONFIG_POWER_SOURCE 14 -#define PIN_CONFIG_SLEW_RATE 15 -#define PIN_CONFIG_LOW_POWER_MODE 16 -#define PIN_CONFIG_OUTPUT 17 -#define PIN_CONFIG_END 0x7FFF +enum pin_config_param { + PIN_CONFIG_BIAS_BUS_HOLD, + PIN_CONFIG_BIAS_DISABLE, + PIN_CONFIG_BIAS_HIGH_IMPEDANCE, + PIN_CONFIG_BIAS_PULL_DOWN, + PIN_CONFIG_BIAS_PULL_PIN_DEFAULT, + PIN_CONFIG_BIAS_PULL_UP, + PIN_CONFIG_DRIVE_OPEN_DRAIN, + PIN_CONFIG_DRIVE_OPEN_SOURCE, + PIN_CONFIG_DRIVE_PUSH_PULL, + PIN_CONFIG_DRIVE_STRENGTH, + PIN_CONFIG_INPUT_DEBOUNCE, + PIN_CONFIG_INPUT_ENABLE, + PIN_CONFIG_INPUT_SCHMITT, + PIN_CONFIG_INPUT_SCHMITT_ENABLE, + PIN_CONFIG_LOW_POWER_MODE, + PIN_CONFIG_OUTPUT_ENABLE, + PIN_CONFIG_OUTPUT, + PIN_CONFIG_POWER_SOURCE, + PIN_CONFIG_SLEEP_HARDWARE_STATE, + PIN_CONFIG_SLEW_RATE, + PIN_CONFIG_SKEW_DELAY, + PIN_CONFIG_END = 0x7F, + PIN_CONFIG_MAX = 0xFF, +}; #if CONFIG_IS_ENABLED(PINCTRL_GENERIC) /** diff --git a/include/dm/read.h b/include/dm/read.h index 8114037e97..f1f0dfd4a3 100644 --- a/include/dm/read.h +++ b/include/dm/read.h @@ -46,6 +46,16 @@ static inline bool dev_of_valid(struct udevice *dev) #ifndef CONFIG_DM_DEV_READ_INLINE /** + * dev_read_u32() - read a 32-bit integer from a device's DT property + * + * @dev: device to read DT property from + * @propname: name of the property to read from + * @outp: place to put value (if found) + * @return 0 if OK, -ve on error + */ +int dev_read_u32(struct udevice *dev, const char *propname, u32 *outp); + +/** * dev_read_u32_default() - read a 32-bit integer from a device's DT property * * @dev: device to read DT property from @@ -410,8 +420,26 @@ int dev_read_resource(struct udevice *dev, uint index, struct resource *res); int dev_read_resource_byname(struct udevice *dev, const char *name, struct resource *res); +/** + * dev_translate_address() - Tranlate a device-tree address + * + * Translate an address from the device-tree into a CPU physical address. This + * function walks up the tree and applies the various bus mappings along the + * way. + * + * @dev: device giving the context in which to translate the address + * @in_addr: pointer to the address to translate + * @return the translated address; OF_BAD_ADDR on error + */ +u64 dev_translate_address(struct udevice *dev, const fdt32_t *in_addr); #else /* CONFIG_DM_DEV_READ_INLINE is enabled */ +static inline int dev_read_u32(struct udevice *dev, + const char *propname, u32 *outp) +{ + return ofnode_read_u32(dev_ofnode(dev), propname, outp); +} + static inline int dev_read_u32_default(struct udevice *dev, const char *propname, int def) { @@ -582,6 +610,11 @@ static inline int dev_read_resource_byname(struct udevice *dev, return ofnode_read_resource_byname(dev_ofnode(dev), name, res); } +static inline u64 dev_translate_address(struct udevice *dev, const fdt32_t *in_addr) +{ + return ofnode_translate_address(dev_ofnode(dev), in_addr); +} + #endif /* CONFIG_DM_DEV_READ_INLINE */ /** diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h index 3fc20834ae..07fabc3ce6 100644 --- a/include/dm/uclass-id.h +++ b/include/dm/uclass-id.h @@ -34,6 +34,7 @@ enum uclass_id { UCLASS_CROS_EC, /* Chrome OS EC */ UCLASS_DISPLAY, /* Display (e.g. DisplayPort, HDMI) */ UCLASS_DMA, /* Direct Memory Access */ + UCLASS_EFI, /* EFI managed devices */ UCLASS_ETH, /* Ethernet device */ UCLASS_GPIO, /* Bank of general-purpose I/O pins */ UCLASS_FIRMWARE, /* Firmware */ diff --git a/include/dm/uclass.h b/include/dm/uclass.h index 18188497c2..709f661f20 100644 --- a/include/dm/uclass.h +++ b/include/dm/uclass.h @@ -72,11 +72,11 @@ struct udevice; * then this will be automatically allocated. * @per_child_auto_alloc_size: Each child device (of a parent in this * uclass) can hold parent data for the device/uclass. This value is only - * used as a falback if this member is 0 in the driver. + * used as a fallback if this member is 0 in the driver. * @per_child_platdata_auto_alloc_size: A bus likes to store information about * its children. If non-zero this is the size of this data, to be allocated * in the child device's parent_platdata pointer. This value is only used as - * a falback if this member is 0 in the driver. + * a fallback if this member is 0 in the driver. * @ops: Uclass operations, providing the consistent interface to devices * within the uclass. * @flags: Flags for this uclass (DM_UC_...) diff --git a/include/dt-bindings/clock/snps,hsdk-cgu.h b/include/dt-bindings/clock/snps,hsdk-cgu.h index 813ab71531..2cfe34eb35 100644 --- a/include/dt-bindings/clock/snps,hsdk-cgu.h +++ b/include/dt-bindings/clock/snps,hsdk-cgu.h @@ -33,8 +33,10 @@ #define CLK_SYS_UART_REF 18 #define CLK_SYS_EBI_REF 19 #define CLK_TUN_PLL 20 -#define CLK_TUN 21 -#define CLK_HDMI_PLL 22 -#define CLK_HDMI 23 +#define CLK_TUN_TUN 21 +#define CLK_TUN_ROM 22 +#define CLK_TUN_PWM 23 +#define CLK_HDMI_PLL 24 +#define CLK_HDMI 25 #endif /* __DT_BINDINGS_CLK_HSDK_CGU_H_ */ diff --git a/include/dt-bindings/leds/leds-pca9532.h b/include/dt-bindings/leds/leds-pca9532.h new file mode 100644 index 0000000000..4d917aab7e --- /dev/null +++ b/include/dt-bindings/leds/leds-pca9532.h @@ -0,0 +1,18 @@ +/* + * This header provides constants for pca9532 LED bindings. + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef _DT_BINDINGS_LEDS_PCA9532_H +#define _DT_BINDINGS_LEDS_PCA9532_H + +#define PCA9532_TYPE_NONE 0 +#define PCA9532_TYPE_LED 1 +#define PCA9532_TYPE_N2100_BEEP 2 +#define PCA9532_TYPE_GPIO 3 +#define PCA9532_LED_TIMER2 4 + +#endif /* _DT_BINDINGS_LEDS_PCA9532_H */ diff --git a/include/dt-bindings/memory/stm32-sdram.h b/include/dt-bindings/memory/stm32-sdram.h index c2b911febf..ab91d2b7f6 100644 --- a/include/dt-bindings/memory/stm32-sdram.h +++ b/include/dt-bindings/memory/stm32-sdram.h @@ -30,8 +30,10 @@ /* Timing = value +1 cycles */ #define TMRD_1 (1 - 1) #define TMRD_2 (2 - 1) +#define TMRD_3 (3 - 1) #define TXSR_1 (1 - 1) #define TXSR_6 (6 - 1) +#define TXSR_7 (7 - 1) #define TRAS_1 (1 - 1) #define TRAS_4 (4 - 1) #define TRC_6 (6 - 1) diff --git a/include/dt-bindings/mfd/stm32f4-rcc.h b/include/dt-bindings/mfd/stm32f4-rcc.h new file mode 100644 index 0000000000..36448a5619 --- /dev/null +++ b/include/dt-bindings/mfd/stm32f4-rcc.h @@ -0,0 +1,108 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * This header provides constants for the STM32F4 RCC IP + */ + +#ifndef _DT_BINDINGS_MFD_STM32F4_RCC_H +#define _DT_BINDINGS_MFD_STM32F4_RCC_H + +/* AHB1 */ +#define STM32F4_RCC_AHB1_GPIOA 0 +#define STM32F4_RCC_AHB1_GPIOB 1 +#define STM32F4_RCC_AHB1_GPIOC 2 +#define STM32F4_RCC_AHB1_GPIOD 3 +#define STM32F4_RCC_AHB1_GPIOE 4 +#define STM32F4_RCC_AHB1_GPIOF 5 +#define STM32F4_RCC_AHB1_GPIOG 6 +#define STM32F4_RCC_AHB1_GPIOH 7 +#define STM32F4_RCC_AHB1_GPIOI 8 +#define STM32F4_RCC_AHB1_GPIOJ 9 +#define STM32F4_RCC_AHB1_GPIOK 10 +#define STM32F4_RCC_AHB1_CRC 12 +#define STM32F4_RCC_AHB1_BKPSRAM 18 +#define STM32F4_RCC_AHB1_CCMDATARAM 20 +#define STM32F4_RCC_AHB1_DMA1 21 +#define STM32F4_RCC_AHB1_DMA2 22 +#define STM32F4_RCC_AHB1_DMA2D 23 +#define STM32F4_RCC_AHB1_ETHMAC 25 +#define STM32F4_RCC_AHB1_ETHMACTX 26 +#define STM32F4_RCC_AHB1_ETHMACRX 27 +#define STM32F4_RCC_AHB1_ETHMACPTP 28 +#define STM32F4_RCC_AHB1_OTGHS 29 +#define STM32F4_RCC_AHB1_OTGHSULPI 30 + +#define STM32F4_AHB1_RESET(bit) (STM32F4_RCC_AHB1_##bit + (0x10 * 8)) +#define STM32F4_AHB1_CLOCK(bit) (STM32F4_RCC_AHB1_##bit) + +/* AHB2 */ +#define STM32F4_RCC_AHB2_DCMI 0 +#define STM32F4_RCC_AHB2_CRYP 4 +#define STM32F4_RCC_AHB2_HASH 5 +#define STM32F4_RCC_AHB2_RNG 6 +#define STM32F4_RCC_AHB2_OTGFS 7 + +#define STM32F4_AHB2_RESET(bit) (STM32F4_RCC_AHB2_##bit + (0x14 * 8)) +#define STM32F4_AHB2_CLOCK(bit) (STM32F4_RCC_AHB2_##bit + 0x20) + +/* AHB3 */ +#define STM32F4_RCC_AHB3_FMC 0 +#define STM32F4_RCC_AHB3_QSPI 1 + +#define STM32F4_AHB3_RESET(bit) (STM32F4_RCC_AHB3_##bit + (0x18 * 8)) +#define STM32F4_AHB3_CLOCK(bit) (STM32F4_RCC_AHB3_##bit + 0x40) + +/* APB1 */ +#define STM32F4_RCC_APB1_TIM2 0 +#define STM32F4_RCC_APB1_TIM3 1 +#define STM32F4_RCC_APB1_TIM4 2 +#define STM32F4_RCC_APB1_TIM5 3 +#define STM32F4_RCC_APB1_TIM6 4 +#define STM32F4_RCC_APB1_TIM7 5 +#define STM32F4_RCC_APB1_TIM12 6 +#define STM32F4_RCC_APB1_TIM13 7 +#define STM32F4_RCC_APB1_TIM14 8 +#define STM32F4_RCC_APB1_WWDG 11 +#define STM32F4_RCC_APB1_SPI2 14 +#define STM32F4_RCC_APB1_SPI3 15 +#define STM32F4_RCC_APB1_UART2 17 +#define STM32F4_RCC_APB1_UART3 18 +#define STM32F4_RCC_APB1_UART4 19 +#define STM32F4_RCC_APB1_UART5 20 +#define STM32F4_RCC_APB1_I2C1 21 +#define STM32F4_RCC_APB1_I2C2 22 +#define STM32F4_RCC_APB1_I2C3 23 +#define STM32F4_RCC_APB1_CAN1 25 +#define STM32F4_RCC_APB1_CAN2 26 +#define STM32F4_RCC_APB1_PWR 28 +#define STM32F4_RCC_APB1_DAC 29 +#define STM32F4_RCC_APB1_UART7 30 +#define STM32F4_RCC_APB1_UART8 31 + +#define STM32F4_APB1_RESET(bit) (STM32F4_RCC_APB1_##bit + (0x20 * 8)) +#define STM32F4_APB1_CLOCK(bit) (STM32F4_RCC_APB1_##bit + 0x80) + +/* APB2 */ +#define STM32F4_RCC_APB2_TIM1 0 +#define STM32F4_RCC_APB2_TIM8 1 +#define STM32F4_RCC_APB2_USART1 4 +#define STM32F4_RCC_APB2_USART6 5 +#define STM32F4_RCC_APB2_ADC1 8 +#define STM32F4_RCC_APB2_ADC2 9 +#define STM32F4_RCC_APB2_ADC3 10 +#define STM32F4_RCC_APB2_SDIO 11 +#define STM32F4_RCC_APB2_SPI1 12 +#define STM32F4_RCC_APB2_SPI4 13 +#define STM32F4_RCC_APB2_SYSCFG 14 +#define STM32F4_RCC_APB2_TIM9 16 +#define STM32F4_RCC_APB2_TIM10 17 +#define STM32F4_RCC_APB2_TIM11 18 +#define STM32F4_RCC_APB2_SPI5 20 +#define STM32F4_RCC_APB2_SPI6 21 +#define STM32F4_RCC_APB2_SAI1 22 +#define STM32F4_RCC_APB2_LTDC 26 +#define STM32F4_RCC_APB2_DSI 27 + +#define STM32F4_APB2_RESET(bit) (STM32F4_RCC_APB2_##bit + (0x24 * 8)) +#define STM32F4_APB2_CLOCK(bit) (STM32F4_RCC_APB2_##bit + 0xA0) + +#endif /* _DT_BINDINGS_MFD_STM32F4_RCC_H */ diff --git a/include/dt-bindings/pinctrl/stm32-pinfunc.h b/include/dt-bindings/pinctrl/stm32-pinfunc.h new file mode 100644 index 0000000000..b8dfe31821 --- /dev/null +++ b/include/dt-bindings/pinctrl/stm32-pinfunc.h @@ -0,0 +1,30 @@ +#ifndef _DT_BINDINGS_STM32_PINFUNC_H +#define _DT_BINDINGS_STM32_PINFUNC_H + +/* define PIN modes */ +#define GPIO 0x0 +#define AF0 0x1 +#define AF1 0x2 +#define AF2 0x3 +#define AF3 0x4 +#define AF4 0x5 +#define AF5 0x6 +#define AF6 0x7 +#define AF7 0x8 +#define AF8 0x9 +#define AF9 0xa +#define AF10 0xb +#define AF11 0xc +#define AF12 0xd +#define AF13 0xe +#define AF14 0xf +#define AF15 0x10 +#define ANALOG 0x11 + +/* define Pins number*/ +#define PIN_NO(port, line) (((port) - 'A') * 0x10 + (line)) + +#define STM32_PINMUX(port, line, mode) (((PIN_NO(port, line)) << 8) | (mode)) + +#endif /* _DT_BINDINGS_STM32_PINFUNC_H */ + diff --git a/include/dt-bindings/pinctrl/stm32f746-pinfunc.h b/include/dt-bindings/pinctrl/stm32f746-pinfunc.h index 6348c6a830..549323ffe9 100644 --- a/include/dt-bindings/pinctrl/stm32f746-pinfunc.h +++ b/include/dt-bindings/pinctrl/stm32f746-pinfunc.h @@ -154,7 +154,6 @@ #define STM32F746_PA15_FUNC_EVENTOUT 0xf10 #define STM32F746_PA15_FUNC_ANALOG 0xf11 - #define STM32F746_PB0_FUNC_GPIO 0x1000 #define STM32F746_PB0_FUNC_TIM1_CH2N 0x1002 #define STM32F746_PB0_FUNC_TIM3_CH3 0x1003 @@ -188,6 +187,9 @@ #define STM32F746_PB3_FUNC_TIM2_CH2 0x1302 #define STM32F746_PB3_FUNC_SPI1_SCK_I2S1_CK 0x1306 #define STM32F746_PB3_FUNC_SPI3_SCK_I2S3_CK 0x1307 + +#define STM32F769_PB3_FUNC_SDMMC2_D2 0x130b + #define STM32F746_PB3_FUNC_EVENTOUT 0x1310 #define STM32F746_PB3_FUNC_ANALOG 0x1311 @@ -197,6 +199,9 @@ #define STM32F746_PB4_FUNC_SPI1_MISO 0x1406 #define STM32F746_PB4_FUNC_SPI3_MISO 0x1407 #define STM32F746_PB4_FUNC_SPI2_NSS_I2S2_WS 0x1408 + +#define STM32F769_PB4_FUNC_SDMMC2_D3 0x140b + #define STM32F746_PB4_FUNC_EVENTOUT 0x1410 #define STM32F746_PB4_FUNC_ANALOG 0x1411 @@ -505,6 +510,9 @@ #define STM32F746_PD6_FUNC_SPI3_MOSI_I2S3_SD 0x3606 #define STM32F746_PD6_FUNC_SAI1_SD_A 0x3607 #define STM32F746_PD6_FUNC_USART2_RX 0x3608 + +#define STM32F769_PD6_FUNC_SDMMC2_CLK 0x360c + #define STM32F746_PD6_FUNC_FMC_NWAIT 0x360d #define STM32F746_PD6_FUNC_DCMI_D10 0x360e #define STM32F746_PD6_FUNC_LCD_B2 0x360f @@ -514,6 +522,9 @@ #define STM32F746_PD7_FUNC_GPIO 0x3700 #define STM32F746_PD7_FUNC_USART2_CK 0x3708 #define STM32F746_PD7_FUNC_SPDIFRX_IN0 0x3709 + +#define STM32F769_PD7_FUNC_SDMMC2_CMD 0x370c + #define STM32F746_PD7_FUNC_FMC_NE1 0x370d #define STM32F746_PD7_FUNC_EVENTOUT 0x3710 #define STM32F746_PD7_FUNC_ANALOG 0x3711 @@ -893,6 +904,9 @@ #define STM32F746_PG9_FUNC_USART6_RX 0x6909 #define STM32F746_PG9_FUNC_QUADSPI_BK2_IO2 0x690a #define STM32F746_PG9_FUNC_SAI2_FS_B 0x690b + +#define STM32F769_PG9_FUNC_SDMMC2_D0 0x690c + #define STM32F746_PG9_FUNC_FMC_NE2_FMC_NCE 0x690d #define STM32F746_PG9_FUNC_DCMI_VSYNC 0x690e #define STM32F746_PG9_FUNC_EVENTOUT 0x6910 @@ -901,6 +915,9 @@ #define STM32F746_PG10_FUNC_GPIO 0x6a00 #define STM32F746_PG10_FUNC_LCD_G3 0x6a0a #define STM32F746_PG10_FUNC_SAI2_SD_B 0x6a0b + +#define STM32F769_PG10_FUNC_SDMMC2_D1 0x6a0c + #define STM32F746_PG10_FUNC_FMC_NE3 0x6a0d #define STM32F746_PG10_FUNC_DCMI_D2 0x6a0e #define STM32F746_PG10_FUNC_LCD_B2 0x6a0f diff --git a/include/efi_api.h b/include/efi_api.h index 584016dc30..205f8f1f70 100644 --- a/include/efi_api.h +++ b/include/efi_api.h @@ -84,11 +84,12 @@ struct efi_boot_services { efi_status_t (EFIAPI *reinstall_protocol_interface)( void *handle, const efi_guid_t *protocol, void *old_interface, void *new_interface); - efi_status_t (EFIAPI *uninstall_protocol_interface)(void *handle, - const efi_guid_t *protocol, void *protocol_interface); - efi_status_t (EFIAPI *handle_protocol)(efi_handle_t, - const efi_guid_t *protocol, - void **protocol_interface); + efi_status_t (EFIAPI *uninstall_protocol_interface)( + efi_handle_t handle, const efi_guid_t *protocol, + void *protocol_interface); + efi_status_t (EFIAPI *handle_protocol)( + efi_handle_t handle, const efi_guid_t *protocol, + void **protocol_interface); void *reserved; efi_status_t (EFIAPI *register_protocol_notify)( const efi_guid_t *protocol, struct efi_event *event, @@ -113,7 +114,7 @@ struct efi_boot_services { efi_status_t (EFIAPI *exit)(efi_handle_t handle, efi_status_t exit_status, unsigned long exitdata_size, s16 *exitdata); - efi_status_t (EFIAPI *unload_image)(void *image_handle); + efi_status_t (EFIAPI *unload_image)(efi_handle_t image_handle); efi_status_t (EFIAPI *exit_boot_services)(efi_handle_t, unsigned long); efi_status_t (EFIAPI *get_next_monotonic_count)(u64 *count); @@ -125,8 +126,10 @@ struct efi_boot_services { efi_handle_t *driver_image_handle, struct efi_device_path *remaining_device_path, bool recursive); - efi_status_t (EFIAPI *disconnect_controller)(void *controller_handle, - void *driver_image_handle, void *child_handle); + efi_status_t (EFIAPI *disconnect_controller)( + efi_handle_t controller_handle, + efi_handle_t driver_image_handle, + efi_handle_t child_handle); #define EFI_OPEN_PROTOCOL_BY_HANDLE_PROTOCOL 0x00000001 #define EFI_OPEN_PROTOCOL_GET_PROTOCOL 0x00000002 #define EFI_OPEN_PROTOCOL_TEST_PROTOCOL 0x00000004 @@ -137,9 +140,10 @@ struct efi_boot_services { const efi_guid_t *protocol, void **interface, efi_handle_t agent_handle, efi_handle_t controller_handle, u32 attributes); - efi_status_t (EFIAPI *close_protocol)(void *handle, - const efi_guid_t *protocol, void *agent_handle, - void *controller_handle); + efi_status_t (EFIAPI *close_protocol)( + efi_handle_t handle, const efi_guid_t *protocol, + efi_handle_t agent_handle, + efi_handle_t controller_handle); efi_status_t(EFIAPI *open_protocol_information)(efi_handle_t handle, const efi_guid_t *protocol, struct efi_open_protocol_info_entry **entry_buffer, @@ -243,11 +247,11 @@ struct efi_system_table { struct efi_table_hdr hdr; unsigned long fw_vendor; /* physical addr of wchar_t vendor string */ u32 fw_revision; - unsigned long con_in_handle; + efi_handle_t con_in_handle; struct efi_simple_input_interface *con_in; - unsigned long con_out_handle; + efi_handle_t con_out_handle; struct efi_simple_text_output_protocol *con_out; - unsigned long stderr_handle; + efi_handle_t stderr_handle; struct efi_simple_text_output_protocol *std_err; struct efi_runtime_services *runtime; struct efi_boot_services *boottime; @@ -329,12 +333,27 @@ struct efi_device_path_acpi_path { } __packed; #define DEVICE_PATH_TYPE_MESSAGING_DEVICE 0x03 +# define DEVICE_PATH_SUB_TYPE_MSG_ATAPI 0x01 +# define DEVICE_PATH_SUB_TYPE_MSG_SCSI 0x02 # define DEVICE_PATH_SUB_TYPE_MSG_USB 0x05 # define DEVICE_PATH_SUB_TYPE_MSG_MAC_ADDR 0x0b # define DEVICE_PATH_SUB_TYPE_MSG_USB_CLASS 0x0f # define DEVICE_PATH_SUB_TYPE_MSG_SD 0x1a # define DEVICE_PATH_SUB_TYPE_MSG_MMC 0x1d +struct efi_device_path_atapi { + struct efi_device_path dp; + u8 primary_secondary; + u8 slave_master; + u16 logical_unit_number; +} __packed; + +struct efi_device_path_scsi { + struct efi_device_path dp; + u16 target_id; + u16 logical_unit_number; +} __packed; + struct efi_device_path_usb { struct efi_device_path dp; u8 parent_port_number; @@ -405,18 +424,26 @@ struct efi_block_io_media u32 io_align; u8 pad2[4]; u64 last_block; + /* Added in revision 2 of the protocol */ + u64 lowest_aligned_lba; + u32 logical_blocks_per_physical_block; + /* Added in revision 3 of the protocol */ + u32 optimal_transfer_length_granualarity; }; +#define EFI_BLOCK_IO_PROTOCOL_REVISION2 0x00020001 +#define EFI_BLOCK_IO_PROTOCOL_REVISION3 0x0002001f + struct efi_block_io { u64 revision; struct efi_block_io_media *media; efi_status_t (EFIAPI *reset)(struct efi_block_io *this, char extended_verification); efi_status_t (EFIAPI *read_blocks)(struct efi_block_io *this, - u32 media_id, u64 lba, unsigned long buffer_size, + u32 media_id, u64 lba, efi_uintn_t buffer_size, void *buffer); efi_status_t (EFIAPI *write_blocks)(struct efi_block_io *this, - u32 media_id, u64 lba, unsigned long buffer_size, + u32 media_id, u64 lba, efi_uintn_t buffer_size, void *buffer); efi_status_t (EFIAPI *flush_blocks)(struct efi_block_io *this); }; @@ -790,4 +817,26 @@ struct efi_file_info { s16 file_name[0]; }; +#define EFI_DRIVER_BINDING_PROTOCOL_GUID \ + EFI_GUID(0x18a031ab, 0xb443, 0x4d1a,\ + 0xa5, 0xc0, 0x0c, 0x09, 0x26, 0x1e, 0x9f, 0x71) +struct efi_driver_binding_protocol { + efi_status_t (EFIAPI * supported)( + struct efi_driver_binding_protocol *this, + efi_handle_t controller_handle, + struct efi_device_path *remaining_device_path); + efi_status_t (EFIAPI * start)( + struct efi_driver_binding_protocol *this, + efi_handle_t controller_handle, + struct efi_device_path *remaining_device_path); + efi_status_t (EFIAPI * stop)( + struct efi_driver_binding_protocol *this, + efi_handle_t controller_handle, + efi_uintn_t number_of_children, + efi_handle_t *child_handle_buffer); + u32 version; + efi_handle_t image_handle; + efi_handle_t driver_binding_handle; +}; + #endif diff --git a/include/efi_driver.h b/include/efi_driver.h new file mode 100644 index 0000000000..2bbe26c6e3 --- /dev/null +++ b/include/efi_driver.h @@ -0,0 +1,30 @@ +/* + * EFI application loader + * + * Copyright (c) 2017 Heinrich Schuchardt + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _EFI_DRIVER_H +#define _EFI_DRIVER_H 1 + +#include <common.h> +#include <dm.h> +#include <efi_loader.h> + +struct efi_driver_ops { + const efi_guid_t *protocol; + const efi_guid_t *child_protocol; + int (*bind)(efi_handle_t handle, void *interface); +}; + +/* + * This structure adds internal fields to the driver binding protocol. + */ +struct efi_driver_binding_extended_protocol { + struct efi_driver_binding_protocol bp; + const struct efi_driver_ops *ops; +}; + +#endif /* _EFI_DRIVER_H */ diff --git a/include/efi_loader.h b/include/efi_loader.h index 6185055e78..21c03c5c28 100644 --- a/include/efi_loader.h +++ b/include/efi_loader.h @@ -69,10 +69,11 @@ const char *__efi_nesting_dec(void); } while(0) /* - * Write GUID + * Write an indented message with EFI prefix */ -#define EFI_PRINT_GUID(txt, guid) ({ \ - debug("%sEFI: %s %pUl\n", __efi_nesting(), txt, guid); \ +#define EFI_PRINT(format, ...) ({ \ + debug("%sEFI: " format, __efi_nesting(), \ + ##__VA_ARGS__); \ }) extern struct efi_runtime_services efi_runtime_services; @@ -85,9 +86,13 @@ extern const struct efi_device_path_to_text_protocol efi_device_path_to_text; uint16_t *efi_dp_str(struct efi_device_path *dp); +/* GUID of the EFI_BLOCK_IO_PROTOCOL */ +extern const efi_guid_t efi_block_io_guid; extern const efi_guid_t efi_global_variable_guid; extern const efi_guid_t efi_guid_console_control; extern const efi_guid_t efi_guid_device_path; +/* GUID of the EFI_DRIVER_BINDING_PROTOCOL */ +extern const efi_guid_t efi_guid_driver_binding_protocol; extern const efi_guid_t efi_guid_loaded_image; extern const efi_guid_t efi_guid_device_path_to_text_protocol; extern const efi_guid_t efi_simple_file_system_protocol_guid; @@ -97,14 +102,27 @@ extern unsigned int __efi_runtime_start, __efi_runtime_stop; extern unsigned int __efi_runtime_rel_start, __efi_runtime_rel_stop; /* + * When a protocol is opened a open protocol info entry is created. + * These are maintained in a list. + */ +struct efi_open_protocol_info_item { + /* Link to the list of open protocol info entries of a protocol */ + struct list_head link; + struct efi_open_protocol_info_entry info; +}; + +/* * When the UEFI payload wants to open a protocol on an object to get its * interface (usually a struct with callback functions), this struct maps the - * protocol GUID to the respective protocol interface */ + * protocol GUID to the respective protocol interface + */ struct efi_handler { /* Link to the list of protocols of a handle */ struct list_head link; const efi_guid_t *guid; void *protocol_interface; + /* Link to the list of open protocol info items */ + struct list_head open_infos; }; /* @@ -156,6 +174,10 @@ extern struct list_head efi_obj_list; int efi_console_register(void); /* Called by bootefi to make all disk storage accessible as EFI objects */ int efi_disk_register(void); +/* Create handles and protocols for the partitions of a block device */ +int efi_disk_create_partitions(efi_handle_t parent, struct blk_desc *desc, + const char *if_typename, int diskid, + const char *pdevname); /* Called by bootefi to make GOP (graphical) interface available */ int efi_gop_register(void); /* Called by bootefi to make the network interface available */ @@ -189,23 +211,25 @@ void efi_set_bootdev(const char *dev, const char *devnr, const char *path); /* Add a new object to the object list. */ void efi_add_handle(struct efi_object *obj); /* Create handle */ -efi_status_t efi_create_handle(void **handle); +efi_status_t efi_create_handle(efi_handle_t *handle); /* Delete handle */ void efi_delete_handle(struct efi_object *obj); /* Call this to validate a handle and find the EFI object for it */ -struct efi_object *efi_search_obj(const void *handle); +struct efi_object *efi_search_obj(const efi_handle_t handle); /* Find a protocol on a handle */ -efi_status_t efi_search_protocol(const void *handle, +efi_status_t efi_search_protocol(const efi_handle_t handle, const efi_guid_t *protocol_guid, struct efi_handler **handler); /* Install new protocol on a handle */ -efi_status_t efi_add_protocol(const void *handle, const efi_guid_t *protocol, +efi_status_t efi_add_protocol(const efi_handle_t handle, + const efi_guid_t *protocol, void *protocol_interface); /* Delete protocol from a handle */ -efi_status_t efi_remove_protocol(const void *handle, const efi_guid_t *protocol, +efi_status_t efi_remove_protocol(const efi_handle_t handle, + const efi_guid_t *protocol, void *protocol_interface); /* Delete all protocols from a handle */ -efi_status_t efi_remove_all_protocols(const void *handle); +efi_status_t efi_remove_all_protocols(const efi_handle_t handle); /* Call this to create an event */ efi_status_t efi_create_event(uint32_t type, efi_uintn_t notify_tpl, void (EFIAPI *notify_function) ( @@ -216,7 +240,7 @@ efi_status_t efi_create_event(uint32_t type, efi_uintn_t notify_tpl, efi_status_t efi_set_timer(struct efi_event *event, enum efi_timer_delay type, uint64_t trigger_time); /* Call this to signal an event */ -void efi_signal_event(struct efi_event *event); +void efi_signal_event(struct efi_event *event, bool check_tpl); /* open file system: */ struct efi_simple_file_system_protocol *efi_simple_file_system( @@ -247,6 +271,8 @@ efi_status_t efi_get_memory_map(efi_uintn_t *memory_map_size, /* Adds a range into the EFI memory map */ uint64_t efi_add_memory_map(uint64_t start, uint64_t pages, int memory_type, bool overlap_only_ram); +/* Called by board init to initialize the EFI drivers */ +int efi_driver_init(void); /* Called by board init to initialize the EFI memory map */ int efi_memory_init(void); /* Adds new or overrides configuration table entry to the system table */ @@ -280,15 +306,20 @@ struct efi_device_path *efi_dp_append_node(const struct efi_device_path *dp, struct efi_device_path *efi_dp_from_dev(struct udevice *dev); struct efi_device_path *efi_dp_from_part(struct blk_desc *desc, int part); +/* Create a device node for a block device partition. */ +struct efi_device_path *efi_dp_part_node(struct blk_desc *desc, int part); struct efi_device_path *efi_dp_from_file(struct blk_desc *desc, int part, const char *path); struct efi_device_path *efi_dp_from_eth(void); struct efi_device_path *efi_dp_from_mem(uint32_t mem_type, uint64_t start_address, uint64_t end_address); -void efi_dp_split_file_path(struct efi_device_path *full_path, - struct efi_device_path **device_path, - struct efi_device_path **file_path); +/* Determine the last device path node that is not the end node. */ +const struct efi_device_path *efi_dp_last_node( + const struct efi_device_path *dp); +efi_status_t efi_dp_split_file_path(struct efi_device_path *full_path, + struct efi_device_path **device_path, + struct efi_device_path **file_path); #define EFI_DP_TYPE(_dp, _type, _subtype) \ (((_dp)->type == DEVICE_PATH_TYPE_##_type) && \ diff --git a/include/efi_selftest.h b/include/efi_selftest.h index be5ba4bfa9..08dd8e43ad 100644 --- a/include/efi_selftest.h +++ b/include/efi_selftest.h @@ -19,13 +19,19 @@ #define EFI_ST_FAILURE 1 /* + * Prints a message. + */ +#define efi_st_printf(...) \ + (efi_st_printc(-1, __VA_ARGS__)) + +/* * Prints an error message. * * @... format string followed by fields to print */ #define efi_st_error(...) \ - (efi_st_printf("%s(%u):\nERROR: ", __FILE__, __LINE__), \ - efi_st_printf(__VA_ARGS__)) \ + (efi_st_printc(EFI_LIGHTRED, "%s(%u):\nERROR: ", __FILE__, __LINE__), \ + efi_st_printc(EFI_LIGHTRED, __VA_ARGS__)) /* * Prints a TODO message. @@ -33,8 +39,8 @@ * @... format string followed by fields to print */ #define efi_st_todo(...) \ - (efi_st_printf("%s(%u):\nTODO: ", __FILE__, __LINE__), \ - efi_st_printf(__VA_ARGS__)) \ + (efi_st_printc(EFI_YELLOW, "%s(%u):\nTODO: ", __FILE__, __LINE__), \ + efi_st_printc(EFI_YELLOW, __VA_ARGS__)) \ /* * A test may be setup and executed at boottime, @@ -61,14 +67,15 @@ extern struct efi_simple_input_interface *con_in; void efi_st_exit_boot_services(void); /* - * Print a pointer to an u16 string + * Print a colored message * - * @pointer: pointer - * @buf: pointer to buffer address - * on return position of terminating zero word + * @color color, see constants in efi_api.h, use -1 for no color + * @fmt printf format + * @... arguments to be printed + * on return position of terminating zero word */ -void efi_st_printf(const char *fmt, ...) - __attribute__ ((format (__printf__, 1, 2))); +void efi_st_printc(int color, const char *fmt, ...) + __attribute__ ((format (__printf__, 2, 3))); /* * Compare memory. diff --git a/include/elf.h b/include/elf.h index aaecac799e..fe2128f378 100644 --- a/include/elf.h +++ b/include/elf.h @@ -613,6 +613,11 @@ unsigned long elf_hash(const unsigned char *name); #define R_AARCH64_NONE 0 /* No relocation. */ #define R_AARCH64_RELATIVE 1027 /* Adjust by program base. */ +/* RISC-V relocations */ +#define R_RISCV_32 1 +#define R_RISCV_64 2 +#define R_RISCV_RELATIVE 3 + #ifndef __ASSEMBLER__ int valid_elf_image(unsigned long addr); #endif diff --git a/include/environment/ti/boot.h b/include/environment/ti/boot.h index 799d9840aa..0a2342061c 100644 --- a/include/environment/ti/boot.h +++ b/include/environment/ti/boot.h @@ -67,7 +67,7 @@ "setenv fdtfile dra72-evm.dtb; fi;" \ "if test $board_name = dra71x; then " \ "setenv fdtfile dra71-evm.dtb; fi;" \ - "if test $board_name = dra76x; then " \ + "if test $board_name = dra76x_acd; then " \ "setenv fdtfile dra76-evm.dtb; fi;" \ "if test $board_name = beagle_x15; then " \ "setenv fdtfile am57xx-beagle-x15.dtb; fi;" \ @@ -77,6 +77,8 @@ "setenv fdtfile am57xx-beagle-x15-revc.dtb; fi;" \ "if test $board_name = am572x_idk; then " \ "setenv fdtfile am572x-idk.dtb; fi;" \ + "if test $board_name = am574x_idk; then " \ + "setenv fdtfile am574x-idk.dtb; fi;" \ "if test $board_name = am57xx_evm; then " \ "setenv fdtfile am57xx-beagle-x15.dtb; fi;" \ "if test $board_name = am57xx_evm_reva3; then " \ diff --git a/include/fat.h b/include/fat.h index bdeda95e6d..fa956441c6 100644 --- a/include/fat.h +++ b/include/fat.h @@ -13,7 +13,6 @@ #include <asm/byteorder.h> #include <fs.h> -#define CONFIG_SUPPORT_VFAT /* Maximum Long File Name length supported here is 128 UTF-16 code units */ #define VFAT_MAXLEN_BYTES 256 /* Maximum LFN buffer in bytes */ #define VFAT_MAXSEQ 9 /* Up to 9 of 13 2-byte UTF-16 entries */ diff --git a/include/fdtdec.h b/include/fdtdec.h index 0fb3e07212..4afb9ac501 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -990,7 +990,8 @@ int fdtdec_setup(void); /** * Board-specific FDT initialization. Returns the address to a device tree blob. - * Called when CONFIG_OF_BOARD is defined. + * Called when CONFIG_OF_BOARD is defined, or if CONFIG_OF_SEPARATE is defined + * and the board implements it. */ void *board_fdt_blob_setup(void); diff --git a/include/fsl_qbman.h b/include/fsl_qbman.h new file mode 100644 index 0000000000..06262ec00f --- /dev/null +++ b/include/fsl_qbman.h @@ -0,0 +1,75 @@ +/* + * Copyright 2017 NXP + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __FSL_QBMAN_H__ +#define __FSL_QBMAN_H__ +void fdt_fixup_qportals(void *blob); +void fdt_fixup_bportals(void *blob); +void inhibit_portals(void __iomem *addr, int max_portals, + int arch_max_portals, int portal_cinh_size); +void setup_qbman_portals(void); + +struct ccsr_qman { +#ifdef CONFIG_SYS_FSL_QMAN_V3 + u8 res0[0x200]; +#else + struct { + u32 qcsp_lio_cfg; /* 0x0 - SW Portal n LIO cfg */ + u32 qcsp_io_cfg; /* 0x4 - SW Portal n IO cfg */ + u32 res; + u32 qcsp_dd_cfg; /* 0xc - SW Portal Dynamic Debug cfg */ + } qcsp[32]; +#endif + /* Not actually reserved, but irrelevant to u-boot */ + u8 res[0xbf8 - 0x200]; + u32 ip_rev_1; + u32 ip_rev_2; + u32 fqd_bare; /* FQD Extended Base Addr Register */ + u32 fqd_bar; /* FQD Base Addr Register */ + u8 res1[0x8]; + u32 fqd_ar; /* FQD Attributes Register */ + u8 res2[0xc]; + u32 pfdr_bare; /* PFDR Extended Base Addr Register */ + u32 pfdr_bar; /* PFDR Base Addr Register */ + u8 res3[0x8]; + u32 pfdr_ar; /* PFDR Attributes Register */ + u8 res4[0x4c]; + u32 qcsp_bare; /* QCSP Extended Base Addr Register */ + u32 qcsp_bar; /* QCSP Base Addr Register */ + u8 res5[0x78]; + u32 ci_sched_cfg; /* Initiator Scheduling Configuration */ + u32 srcidr; /* Source ID Register */ + u32 liodnr; /* LIODN Register */ + u8 res6[4]; + u32 ci_rlm_cfg; /* Initiator Read Latency Monitor Cfg */ + u32 ci_rlm_avg; /* Initiator Read Latency Monitor Avg */ + u8 res7[0x2e8]; +#ifdef CONFIG_SYS_FSL_QMAN_V3 + struct { + u32 qcsp_lio_cfg; /* 0x0 - SW Portal n LIO cfg */ + u32 qcsp_io_cfg; /* 0x4 - SW Portal n IO cfg */ + u32 res; + u32 qcsp_dd_cfg; /* 0xc - SW Portal n Dynamic Debug cfg*/ + } qcsp[50]; +#endif +}; + +struct ccsr_bman { + /* Not actually reserved, but irrelevant to u-boot */ + u8 res[0xbf8]; + u32 ip_rev_1; + u32 ip_rev_2; + u32 fbpr_bare; /* FBPR Extended Base Addr Register */ + u32 fbpr_bar; /* FBPR Base Addr Register */ + u8 res1[0x8]; + u32 fbpr_ar; /* FBPR Attributes Register */ + u8 res2[0xf0]; + u32 srcidr; /* Source ID Register */ + u32 liodnr; /* LIODN Register */ + u8 res7[0x2f4]; +}; + +#endif /* __FSL_QBMAN_H__ */ diff --git a/include/image.h b/include/image.h index a128a623e5..b2b23a96f1 100644 --- a/include/image.h +++ b/include/image.h @@ -190,6 +190,7 @@ enum { IH_ARCH_ARC, /* Synopsys DesignWare ARC */ IH_ARCH_X86_64, /* AMD x86_64, Intel and Via */ IH_ARCH_XTENSA, /* Xtensa */ + IH_ARCH_RISCV, /* RISC-V */ IH_ARCH_COUNT, }; @@ -577,7 +578,7 @@ int boot_get_ramdisk(int argc, char * const argv[], bootm_headers_t *images, * boot_get_loadable() will take the given FIT configuration, and look * for a field named "loadables". Loadables, is a list of elements in * the FIT given as strings. exe: - * loadables = "linux_kernel@1", "fdt@2"; + * loadables = "linux_kernel", "fdt-2"; * this function will attempt to parse each string, and load the * corresponding element from the FIT into memory. Once placed, * no aditional actions are taken. @@ -603,10 +604,10 @@ int boot_get_setup_fit(bootm_headers_t *images, uint8_t arch, * @param images Boot images structure * @param addr Address of FIT in memory * @param fit_unamep On entry this is the requested image name - * (e.g. "kernel@1") or NULL to use the default. On exit + * (e.g. "kernel") or NULL to use the default. On exit * points to the selected image name * @param fit_uname_configp On entry this is the requested configuration - * name (e.g. "conf@1") or NULL to use the default. On + * name (e.g. "conf-1") or NULL to use the default. On * exit points to the selected configuration name. * @param arch Expected architecture (IH_ARCH_...) * @param datap Returns address of loaded image @@ -631,10 +632,10 @@ int boot_get_fdt_fit(bootm_headers_t *images, ulong addr, * @param images Boot images structure * @param addr Address of FIT in memory * @param fit_unamep On entry this is the requested image name - * (e.g. "kernel@1") or NULL to use the default. On exit + * (e.g. "kernel") or NULL to use the default. On exit * points to the selected image name * @param fit_uname_configp On entry this is the requested configuration - * name (e.g. "conf@1") or NULL to use the default. On + * name (e.g. "conf-1") or NULL to use the default. On * exit points to the selected configuration name. * @param arch Expected architecture (IH_ARCH_...) * @param image_type Required image type (IH_TYPE_...). If this is @@ -657,25 +658,25 @@ int fit_image_load(bootm_headers_t *images, ulong addr, /** * fit_get_node_from_config() - Look up an image a FIT by type * - * This looks in the selected conf@ node (images->fit_uname_cfg) for a + * This looks in the selected conf- node (images->fit_uname_cfg) for a * particular image type (e.g. "kernel") and then finds the image that is * referred to. * * For example, for something like: * * images { - * kernel@1 { + * kernel { * ... * }; * }; * configurations { - * conf@1 { - * kernel = "kernel@1"; + * conf-1 { + * kernel = "kernel"; * }; * }; * * the function will return the node offset of the kernel@1 node, assuming - * that conf@1 is the chosen configuration. + * that conf-1 is the chosen configuration. * * @param images Boot images structure * @param prop_name Property name to look up (FIT_..._PROP) @@ -1021,10 +1022,10 @@ int fit_conf_get_node(const void *fit, const char *conf_uname); * @noffset: Offset of conf@xxx node to check * @prop_name: Property to read from the conf node * - * The conf@ nodes contain references to other nodes, using properties - * like 'kernel = "kernel@1"'. Given such a property name (e.g. "kernel"), + * The conf- nodes contain references to other nodes, using properties + * like 'kernel = "kernel"'. Given such a property name (e.g. "kernel"), * return the offset of the node referred to (e.g. offset of node - * "/images/kernel@1". + * "/images/kernel". */ int fit_conf_get_prop_node(const void *fit, int noffset, const char *prop_name); diff --git a/include/linux/kernel.h b/include/linux/kernel.h index 87d2d9554d..04a09eb4f6 100644 --- a/include/linux/kernel.h +++ b/include/linux/kernel.h @@ -38,6 +38,7 @@ #define REPEAT_BYTE(x) ((~0ul / 0xff) * (x)) #define ALIGN(x,a) __ALIGN_MASK((x),(typeof(x))(a)-1) +#define ALIGN_DOWN(x, a) ALIGN((x) - ((a) - 1), (a)) #define __ALIGN_MASK(x,mask) (((x)+(mask))&~(mask)) #define PTR_ALIGN(p, a) ((typeof(p))ALIGN((unsigned long)(p), (a))) #define IS_ALIGNED(x, a) (((x) & ((typeof(x))(a) - 1)) == 0) diff --git a/include/mmc.h b/include/mmc.h index 010ebe048c..a46eaed746 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -15,6 +15,13 @@ #include <linux/compiler.h> #include <part.h> +#if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT) +#define MMC_SUPPORTS_TUNING +#endif +#if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT) +#define MMC_SUPPORTS_TUNING +#endif + /* SD/MMC version bits; 8 flags, 8 major, 8 minor, 8 change */ #define SD_VERSION_SD (1U << 31) #define MMC_VERSION_MMC (1U << 30) @@ -52,12 +59,17 @@ #define MMC_VERSION_5_0 MAKE_MMC_VERSION(5, 0, 0) #define MMC_VERSION_5_1 MAKE_MMC_VERSION(5, 1, 0) -#define MMC_MODE_HS (1 << 0) -#define MMC_MODE_HS_52MHz (1 << 1) -#define MMC_MODE_4BIT (1 << 2) -#define MMC_MODE_8BIT (1 << 3) -#define MMC_MODE_SPI (1 << 4) -#define MMC_MODE_DDR_52MHz (1 << 5) +#define MMC_CAP(mode) (1 << mode) +#define MMC_MODE_HS (MMC_CAP(MMC_HS) | MMC_CAP(SD_HS)) +#define MMC_MODE_HS_52MHz MMC_CAP(MMC_HS_52) +#define MMC_MODE_DDR_52MHz MMC_CAP(MMC_DDR_52) +#define MMC_MODE_HS200 MMC_CAP(MMC_HS_200) + +#define MMC_MODE_8BIT BIT(30) +#define MMC_MODE_4BIT BIT(29) +#define MMC_MODE_1BIT BIT(28) +#define MMC_MODE_SPI BIT(27) + #define SD_DATA_4BIT 0x00040000 @@ -82,6 +94,8 @@ #define MMC_CMD_SET_BLOCKLEN 16 #define MMC_CMD_READ_SINGLE_BLOCK 17 #define MMC_CMD_READ_MULTIPLE_BLOCK 18 +#define MMC_CMD_SEND_TUNING_BLOCK 19 +#define MMC_CMD_SEND_TUNING_BLOCK_HS200 21 #define MMC_CMD_SET_BLOCK_COUNT 23 #define MMC_CMD_WRITE_SINGLE_BLOCK 24 #define MMC_CMD_WRITE_MULTIPLE_BLOCK 25 @@ -109,12 +123,34 @@ #define SD_CMD_APP_SEND_OP_COND 41 #define SD_CMD_APP_SEND_SCR 51 +static inline bool mmc_is_tuning_cmd(uint cmdidx) +{ + if ((cmdidx == MMC_CMD_SEND_TUNING_BLOCK_HS200) || + (cmdidx == MMC_CMD_SEND_TUNING_BLOCK)) + return true; + return false; +} + /* SCR definitions in different words */ #define SD_HIGHSPEED_BUSY 0x00020000 #define SD_HIGHSPEED_SUPPORTED 0x00020000 +#define UHS_SDR12_BUS_SPEED 0 +#define HIGH_SPEED_BUS_SPEED 1 +#define UHS_SDR25_BUS_SPEED 1 +#define UHS_SDR50_BUS_SPEED 2 +#define UHS_SDR104_BUS_SPEED 3 +#define UHS_DDR50_BUS_SPEED 4 + +#define SD_MODE_UHS_SDR12 BIT(UHS_SDR12_BUS_SPEED) +#define SD_MODE_UHS_SDR25 BIT(UHS_SDR25_BUS_SPEED) +#define SD_MODE_UHS_SDR50 BIT(UHS_SDR50_BUS_SPEED) +#define SD_MODE_UHS_SDR104 BIT(UHS_SDR104_BUS_SPEED) +#define SD_MODE_UHS_DDR50 BIT(UHS_DDR50_BUS_SPEED) + #define OCR_BUSY 0x80000000 #define OCR_HCS 0x40000000 +#define OCR_S18R 0x1000000 #define OCR_VOLTAGE_MASK 0x007FFF80 #define OCR_ACCESS_MODE 0x60000000 @@ -206,11 +242,23 @@ #define EXT_CSD_CARD_TYPE_DDR_52 (EXT_CSD_CARD_TYPE_DDR_1_8V \ | EXT_CSD_CARD_TYPE_DDR_1_2V) +#define EXT_CSD_CARD_TYPE_HS200_1_8V BIT(4) /* Card can run at 200MHz */ + /* SDR mode @1.8V I/O */ +#define EXT_CSD_CARD_TYPE_HS200_1_2V BIT(5) /* Card can run at 200MHz */ + /* SDR mode @1.2V I/O */ +#define EXT_CSD_CARD_TYPE_HS200 (EXT_CSD_CARD_TYPE_HS200_1_8V | \ + EXT_CSD_CARD_TYPE_HS200_1_2V) + #define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */ #define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */ #define EXT_CSD_BUS_WIDTH_8 2 /* Card is in 8 bit mode */ #define EXT_CSD_DDR_BUS_WIDTH_4 5 /* Card is in 4 bit DDR mode */ #define EXT_CSD_DDR_BUS_WIDTH_8 6 /* Card is in 8 bit DDR mode */ +#define EXT_CSD_DDR_FLAG BIT(2) /* Flag for DDR mode */ + +#define EXT_CSD_TIMING_LEGACY 0 /* no high speed */ +#define EXT_CSD_TIMING_HS 1 /* HS */ +#define EXT_CSD_TIMING_HS200 2 /* HS200 */ #define EXT_CSD_BOOT_ACK_ENABLE (1 << 6) #define EXT_CSD_BOOT_PARTITION_ENABLE (1 << 3) @@ -265,6 +313,20 @@ #define ENHNCD_SUPPORT (0x2) #define PART_ENH_ATTRIB (0x1f) +#define MMC_QUIRK_RETRY_SEND_CID BIT(0) +#define MMC_QUIRK_RETRY_SET_BLOCKLEN BIT(1) + +enum mmc_voltage { + MMC_SIGNAL_VOLTAGE_000 = 0, + MMC_SIGNAL_VOLTAGE_120 = 1, + MMC_SIGNAL_VOLTAGE_180 = 2, + MMC_SIGNAL_VOLTAGE_330 = 4, +}; + +#define MMC_ALL_SIGNAL_VOLTAGE (MMC_SIGNAL_VOLTAGE_120 |\ + MMC_SIGNAL_VOLTAGE_180 |\ + MMC_SIGNAL_VOLTAGE_330) + /* Maximum block size for MMC */ #define MMC_MAX_BLOCK_LEN 512 @@ -347,6 +409,14 @@ struct dm_mmc_ops { int (*set_ios)(struct udevice *dev); /** + * send_init_stream() - send the initialization stream: 74 clock cycles + * This is used after power up before sending the first command + * + * @dev: Device to update + */ + void (*send_init_stream)(struct udevice *dev); + + /** * get_cd() - See whether a card is present * * @dev: Device to check @@ -361,6 +431,30 @@ struct dm_mmc_ops { * @return 0 if write-enabled, 1 if write-protected, -ve on error */ int (*get_wp)(struct udevice *dev); + +#ifdef MMC_SUPPORTS_TUNING + /** + * execute_tuning() - Start the tuning process + * + * @dev: Device to start the tuning + * @opcode: Command opcode to send + * @return 0 if OK, -ve on error + */ + int (*execute_tuning)(struct udevice *dev, uint opcode); +#endif + +#if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT) + /** + * wait_dat0() - wait until dat0 is in the target state + * (CLK must be running during the wait) + * + * @dev: Device to check + * @state: target state + * @timeout: timeout in us + * @return 0 if dat0 is in the target state, -ve on error + */ + int (*wait_dat0)(struct udevice *dev, int state, int timeout); +#endif }; #define mmc_get_ops(dev) ((struct dm_mmc_ops *)(dev)->driver->ops) @@ -368,13 +462,19 @@ struct dm_mmc_ops { int dm_mmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, struct mmc_data *data); int dm_mmc_set_ios(struct udevice *dev); +void dm_mmc_send_init_stream(struct udevice *dev); int dm_mmc_get_cd(struct udevice *dev); int dm_mmc_get_wp(struct udevice *dev); +int dm_mmc_execute_tuning(struct udevice *dev, uint opcode); +int dm_mmc_wait_dat0(struct udevice *dev, int state, int timeout); /* Transition functions for compatibility */ int mmc_set_ios(struct mmc *mmc); +void mmc_send_init_stream(struct mmc *mmc); int mmc_getcd(struct mmc *mmc); int mmc_getwp(struct mmc *mmc); +int mmc_execute_tuning(struct mmc *mmc, uint opcode); +int mmc_wait_dat0(struct mmc *mmc, int state, int timeout); #else struct mmc_ops { @@ -406,6 +506,50 @@ struct sd_ssr { unsigned int erase_offset; /* In milliseconds */ }; +enum bus_mode { + MMC_LEGACY, + SD_LEGACY, + MMC_HS, + SD_HS, + MMC_HS_52, + MMC_DDR_52, + UHS_SDR12, + UHS_SDR25, + UHS_SDR50, + UHS_DDR50, + UHS_SDR104, + MMC_HS_200, + MMC_MODES_END +}; + +const char *mmc_mode_name(enum bus_mode mode); +void mmc_dump_capabilities(const char *text, uint caps); + +static inline bool mmc_is_mode_ddr(enum bus_mode mode) +{ + if (mode == MMC_DDR_52) + return true; +#if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT) + else if (mode == UHS_DDR50) + return true; +#endif + else + return false; +} + +#define UHS_CAPS (MMC_CAP(UHS_SDR12) | MMC_CAP(UHS_SDR25) | \ + MMC_CAP(UHS_SDR50) | MMC_CAP(UHS_SDR104) | \ + MMC_CAP(UHS_DDR50)) + +static inline bool supports_uhs(uint caps) +{ +#if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT) + return (caps & UHS_CAPS) ? true : false; +#else + return false; +#endif +} + /* * With CONFIG_DM_MMC enabled, struct mmc can be accessed from the MMC device * with mmc_get_mmc_dev(). @@ -421,9 +565,12 @@ struct mmc { void *priv; uint has_init; int high_capacity; + bool clk_disable; /* true if the clock can be turned off */ uint bus_width; uint clock; + enum mmc_voltage signal_voltage; uint card_caps; + uint host_caps; uint ocr; uint dsr; uint dsr_imp; @@ -436,18 +583,27 @@ struct mmc { u8 wr_rel_set; u8 part_config; uint tran_speed; + uint legacy_speed; /* speed for the legacy mode provided by the card */ uint read_bl_len; +#if CONFIG_IS_ENABLED(MMC_WRITE) uint write_bl_len; uint erase_grp_size; /* in 512-byte sectors */ +#endif +#if CONFIG_IS_ENABLED(MMC_HW_PARTITIONING) uint hc_wp_grp_size; /* in 512-byte sectors */ +#endif +#if CONFIG_IS_ENABLED(MMC_WRITE) struct sd_ssr ssr; /* SD status register */ +#endif u64 capacity; u64 capacity_user; u64 capacity_boot; u64 capacity_rpmb; u64 capacity_gp[4]; +#ifndef CONFIG_SPL_BUILD u64 enh_user_start; u64 enh_user_size; +#endif #if !CONFIG_IS_ENABLED(BLK) struct blk_desc block_dev; #endif @@ -457,7 +613,21 @@ struct mmc { int ddr_mode; #if CONFIG_IS_ENABLED(DM_MMC) struct udevice *dev; /* Device for this MMC controller */ +#if CONFIG_IS_ENABLED(DM_REGULATOR) + struct udevice *vmmc_supply; /* Main voltage regulator (Vcc)*/ + struct udevice *vqmmc_supply; /* IO voltage regulator (Vccq)*/ #endif +#endif + u8 *ext_csd; + u32 cardtype; /* cardtype read from the MMC */ + enum mmc_voltage current_voltage; + enum bus_mode selected_mode; /* mode currently used */ + enum bus_mode best_mode; /* best mode is the supported mode with the + * highest bandwidth. It may not always be the + * operating mode due to limitations when + * accessing the boot partitions + */ + u32 quirks; }; struct mmc_hwpart_conf { @@ -507,8 +677,36 @@ void mmc_destroy(struct mmc *mmc); int mmc_unbind(struct udevice *dev); int mmc_initialize(bd_t *bis); int mmc_init(struct mmc *mmc); +int mmc_send_tuning(struct mmc *mmc, u32 opcode, int *cmd_error); + +/** + * mmc_of_parse() - Parse the device tree to get the capabilities of the host + * + * @dev: MMC device + * @cfg: MMC configuration + * @return 0 if OK, -ve on error + */ +int mmc_of_parse(struct udevice *dev, struct mmc_config *cfg); + int mmc_read(struct mmc *mmc, u64 src, uchar *dst, int size); -void mmc_set_clock(struct mmc *mmc, uint clock); + +/** + * mmc_voltage_to_mv() - Convert a mmc_voltage in mV + * + * @voltage: The mmc_voltage to convert + * @return the value in mV if OK, -EINVAL on error (invalid mmc_voltage value) + */ +int mmc_voltage_to_mv(enum mmc_voltage voltage); + +/** + * mmc_set_clock() - change the bus clock + * @mmc: MMC struct + * @clock: bus frequency in Hz + * @disable: flag indicating if the clock must on or off + * @return 0 if OK, -ve on error + */ +int mmc_set_clock(struct mmc *mmc, uint clock, bool disable); + struct mmc *find_mmc_device(int dev_num); int mmc_set_dev(int dev_num); void print_mmc_devices(char separator); diff --git a/include/pcmcia.h b/include/pcmcia.h index 94b54c210d..8df90ee2b7 100644 --- a/include/pcmcia.h +++ b/include/pcmcia.h @@ -60,115 +60,6 @@ typedef struct { ulong or; } pcmcia_win_t; -/* - * Definitions for PCMCIA control registers to operate in IDE mode - * - * All timing related setup (PCMCIA_SHT, PCMCIA_SST, PCMCIA_SL) - * to be done later (depending on CPU clock) - */ - -/* Window 0: - * Base: 0xFE100000 CS1 - * Port Size: 2 Bytes - * Port Size: 16 Bit - * Common Memory Space - */ - -#define CONFIG_SYS_PCMCIA_PBR0 0xFE100000 -#define CONFIG_SYS_PCMCIA_POR0 ( PCMCIA_BSIZE_2 \ - | PCMCIA_PPS_16 \ - | PCMCIA_PRS_MEM \ - | PCMCIA_SLOT_x \ - | PCMCIA_PV \ - ) - -/* Window 1: - * Base: 0xFE100080 CS1 - * Port Size: 8 Bytes - * Port Size: 8 Bit - * Common Memory Space - */ - -#define CONFIG_SYS_PCMCIA_PBR1 0xFE100080 -#define CONFIG_SYS_PCMCIA_POR1 ( PCMCIA_BSIZE_8 \ - | PCMCIA_PPS_8 \ - | PCMCIA_PRS_MEM \ - | PCMCIA_SLOT_x \ - | PCMCIA_PV \ - ) - -/* Window 2: - * Base: 0xFE100100 CS2 - * Port Size: 8 Bytes - * Port Size: 8 Bit - * Common Memory Space - */ - -#define CONFIG_SYS_PCMCIA_PBR2 0xFE100100 -#define CONFIG_SYS_PCMCIA_POR2 ( PCMCIA_BSIZE_8 \ - | PCMCIA_PPS_8 \ - | PCMCIA_PRS_MEM \ - | PCMCIA_SLOT_x \ - | PCMCIA_PV \ - ) - -/* Window 3: - * not used - */ -#define CONFIG_SYS_PCMCIA_PBR3 0 -#define CONFIG_SYS_PCMCIA_POR3 0 - -/* Window 4: - * Base: 0xFE100C00 CS1 - * Port Size: 2 Bytes - * Port Size: 16 Bit - * Common Memory Space - */ - -#define CONFIG_SYS_PCMCIA_PBR4 0xFE100C00 -#define CONFIG_SYS_PCMCIA_POR4 ( PCMCIA_BSIZE_2 \ - | PCMCIA_PPS_16 \ - | PCMCIA_PRS_MEM \ - | PCMCIA_SLOT_x \ - | PCMCIA_PV \ - ) - -/* Window 5: - * Base: 0xFE100C80 CS1 - * Port Size: 8 Bytes - * Port Size: 8 Bit - * Common Memory Space - */ - -#define CONFIG_SYS_PCMCIA_PBR5 0xFE100C80 -#define CONFIG_SYS_PCMCIA_POR5 ( PCMCIA_BSIZE_8 \ - | PCMCIA_PPS_8 \ - | PCMCIA_PRS_MEM \ - | PCMCIA_SLOT_x \ - | PCMCIA_PV \ - ) - -/* Window 6: - * Base: 0xFE100D00 CS2 - * Port Size: 8 Bytes - * Port Size: 8 Bit - * Common Memory Space - */ - -#define CONFIG_SYS_PCMCIA_PBR6 0xFE100D00 -#define CONFIG_SYS_PCMCIA_POR6 ( PCMCIA_BSIZE_8 \ - | PCMCIA_PPS_8 \ - | PCMCIA_PRS_MEM \ - | PCMCIA_SLOT_x \ - | PCMCIA_PV \ - ) - -/* Window 7: - * not used - */ -#define CONFIG_SYS_PCMCIA_PBR7 0 -#define CONFIG_SYS_PCMCIA_POR7 0 - /**********************************************************************/ /* diff --git a/include/phy.h b/include/phy.h index 50f1e12f8c..0543ec10c2 100644 --- a/include/phy.h +++ b/include/phy.h @@ -257,6 +257,7 @@ int gen10g_startup(struct phy_device *phydev); int gen10g_shutdown(struct phy_device *phydev); int gen10g_discover_mmds(struct phy_device *phydev); +int phy_b53_init(void); int phy_mv88e61xx_init(void); int phy_aquantia_init(void); int phy_atheros_init(void); diff --git a/include/power/s2mps11.h b/include/power/s2mps11.h index 5da47198a4..22b38fff70 100644 --- a/include/power/s2mps11.h +++ b/include/power/s2mps11.h @@ -106,4 +106,59 @@ enum s2mps11_reg { #define S2MPS11_LDO26_ENABLE 0xec +#define S2MPS11_LDO_NUM 26 +#define S2MPS11_BUCK_NUM 10 + +/* Driver name */ +#define S2MPS11_BUCK_DRIVER "s2mps11_buck" +#define S2MPS11_OF_BUCK_PREFIX "BUCK" +#define S2MPS11_LDO_DRIVER "s2mps11_ldo" +#define S2MPS11_OF_LDO_PREFIX "LDO" + +/* BUCK */ +#define S2MPS11_BUCK_VOLT_MASK 0xff +#define S2MPS11_BUCK9_VOLT_MASK 0x1f + +#define S2MPS11_BUCK_LSTEP 6250 +#define S2MPS11_BUCK_HSTEP 12500 +#define S2MPS11_BUCK9_STEP 25000 + +#define S2MPS11_BUCK_UV_MIN 600000 +#define S2MPS11_BUCK_UV_HMIN 750000 +#define S2MPS11_BUCK9_UV_MIN 1400000 + +#define S2MPS11_BUCK_VOLT_MAX_HEX 0xA0 +#define S2MPS11_BUCK5_VOLT_MAX_HEX 0xDF +#define S2MPS11_BUCK7_8_10_VOLT_MAX_HEX 0xDC +#define S2MPS11_BUCK9_VOLT_MAX_HEX 0x5F + +#define S2MPS11_BUCK_MODE_SHIFT 6 +#define S2MPS11_BUCK_MODE_MASK (0x3) +#define S2MPS11_BUCK_MODE_OFF (0x0 << 6) +#define S2MPS11_BUCK_MODE_STANDBY (0x1 << 6) +#define S2MPS11_BUCK_MODE_ON (0x3 << 6) + +/* LDO */ +#define S2MPS11_LDO_VOLT_MASK 0x3F +#define S2MPS11_LDO_VOLT_MAX_HEX 0x3F + +#define S2MPS11_LDO_STEP 25000 +#define S2MPS11_LDO_UV_MIN 800000 + +#define S2MPS11_LDO_MODE_MASK 0x3 +#define S2MPS11_LDO_MODE_SHIFT 6 + +#define S2MPS11_LDO_MODE_OFF (0x0 << 6) +#define S2MPS11_LDO_MODE_STANDBY (0x1 << 6) +#define S2MPS11_LDO_MODE_STANDBY_LPM (0x2 << 6) +#define S2MPS11_LDO_MODE_ON (0x3 << 6) + +enum { + OP_OFF = 0, + OP_LPM, + OP_STANDBY, + OP_STANDBY_LPM, + OP_ON, +}; + #endif |