diff options
Diffstat (limited to 'include/configs/MPC8548CDS.h')
| -rw-r--r-- | include/configs/MPC8548CDS.h | 41 |
1 files changed, 0 insertions, 41 deletions
diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 5c54bad496..f583aa8b36 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -19,15 +19,12 @@ #define CONFIG_PCI1 /* PCI controller 1 */ #define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ #undef CONFIG_PCI2 -#define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ #define CONFIG_INTERRUPTS /* enable pci, srio, ddr interrupts */ #ifndef __ASSEMBLY__ #include <linux/stringify.h> -extern unsigned long get_clock_freq(void); #endif -#define CONFIG_SYS_CLK_FREQ get_clock_freq() /* sysclk for MPC85xx */ /* * These can be toggled for performance analysis, otherwise use default. @@ -134,14 +131,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE #endif -#define CONFIG_SYS_BR0_PRELIM \ - (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS + 0x800000) | BR_PS_16 | BR_V) -#define CONFIG_SYS_BR1_PRELIM \ - (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) | BR_PS_16 | BR_V) - -#define CONFIG_SYS_OR0_PRELIM 0xff806e65 -#define CONFIG_SYS_OR1_PRELIM 0xff806e65 - #define CONFIG_SYS_FLASH_BANKS_LIST \ {CONFIG_SYS_FLASH_BASE_PHYS + 0x800000, CONFIG_SYS_FLASH_BASE_PHYS} #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* number of banks */ @@ -185,10 +174,6 @@ extern unsigned long get_clock_freq(void); * FIXME: the top 17 bits of BR2. */ -#define CONFIG_SYS_BR2_PRELIM \ - (BR_PHYS_ADDR(CONFIG_SYS_LBC_SDRAM_BASE_PHYS) \ - | BR_PS_32 | (3<<BR_MSEL_SHIFT) | BR_V) - /* * The SDRAM size in MB, CONFIG_SYS_LBC_SDRAM_SIZE, is 64. * @@ -203,8 +188,6 @@ extern unsigned long get_clock_freq(void); * 1111 1100 0000 0000 0110 1001 0000 0001 = fc006901 */ -#define CONFIG_SYS_OR2_PRELIM 0xfc006901 - #define CONFIG_SYS_LBC_LCRR 0x00030004 /* LB clock ratio reg */ #define CONFIG_SYS_LBC_LBCR 0x00000000 /* LB config reg */ #define CONFIG_SYS_LBC_LSRT 0x20000000 /* LB sdram refresh timer */ @@ -263,9 +246,6 @@ extern unsigned long get_clock_freq(void); #else #define CADMUS_BASE_ADDR_PHYS CADMUS_BASE_ADDR #endif -#define CONFIG_SYS_BR3_PRELIM \ - (BR_PHYS_ADDR(CADMUS_BASE_ADDR_PHYS) | BR_PS_8 | BR_V) -#define CONFIG_SYS_OR3_PRELIM 0xfff00ff7 #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ @@ -401,8 +381,6 @@ extern unsigned long get_clock_freq(void); */ #define CONFIG_BOOTP_BOOTFILESIZE -#undef CONFIG_WATCHDOG /* watchdog disabled */ - /* * Miscellaneous configurable options */ @@ -457,23 +435,4 @@ extern unsigned long get_clock_freq(void); "fdtaddr=1e00000\0" \ "fdtfile=mpc8548cds.dtb\0" -#define NFSBOOTCOMMAND \ - "setenv bootargs root=/dev/nfs rw " \ - "nfsroot=$serverip:$rootpath " \ - "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \ - "console=$consoledev,$baudrate $othbootargs;" \ - "tftp $loadaddr $bootfile;" \ - "tftp $fdtaddr $fdtfile;" \ - "bootm $loadaddr - $fdtaddr" - -#define RAMBOOTCOMMAND \ - "setenv bootargs root=/dev/ram rw " \ - "console=$consoledev,$baudrate $othbootargs;" \ - "tftp $ramdiskaddr $ramdiskfile;" \ - "tftp $loadaddr $bootfile;" \ - "tftp $fdtaddr $fdtfile;" \ - "bootm $loadaddr $ramdiskaddr $fdtaddr" - -#define CONFIG_BOOTCOMMAND NFSBOOTCOMMAND - #endif /* __CONFIG_H */ |