diff options
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/ddr/fsl/Kconfig | 7 | ||||
| -rw-r--r-- | drivers/dfu/dfu_sf.c | 1 | ||||
| -rw-r--r-- | drivers/fastboot/fb_command.c | 1 | ||||
| -rw-r--r-- | drivers/fastboot/fb_mmc.c | 1 | ||||
| -rw-r--r-- | drivers/fastboot/fb_nand.c | 1 | ||||
| -rw-r--r-- | drivers/gpio/Kconfig | 2 | ||||
| -rw-r--r-- | drivers/misc/cros_ec.c | 1 | ||||
| -rw-r--r-- | drivers/mtd/Kconfig | 32 | ||||
| -rw-r--r-- | drivers/mtd/Makefile | 1 | ||||
| -rw-r--r-- | drivers/mtd/pic32_flash.c | 448 | ||||
| -rw-r--r-- | drivers/mtd/spi/sf_dataflash.c | 1 | ||||
| -rw-r--r-- | drivers/mtd/spi/sf_mtd.c | 1 | ||||
| -rw-r--r-- | drivers/mtd/spi/spi-nor-core.c | 1 | ||||
| -rw-r--r-- | drivers/net/Kconfig | 9 | ||||
| -rw-r--r-- | drivers/net/fm/Makefile | 1 | ||||
| -rw-r--r-- | drivers/net/phy/Kconfig | 7 | ||||
| -rw-r--r-- | drivers/pwm/Kconfig | 1 | ||||
| -rw-r--r-- | drivers/xen/events.c | 5 |
18 files changed, 54 insertions, 467 deletions
diff --git a/drivers/ddr/fsl/Kconfig b/drivers/ddr/fsl/Kconfig index d93ed8d2fe..22400a9b8b 100644 --- a/drivers/ddr/fsl/Kconfig +++ b/drivers/ddr/fsl/Kconfig @@ -182,6 +182,13 @@ config SYS_DDR_RAW_TIMING timing parameters are extracted from datasheet and hard-coded into header files or board specific files. +config SYS_FSL_DDR_INTLV_256B + bool "Enforce 256-byte interleave" + help + DDR controller interleaving on 256-byte. This is a special + interleaving mode, handled by Dickens for Freescale layerscape SoCs + with ARM core. + endif menu "PowerPC / M68K initial memory controller definitions (FLASH, SDRAM, etc)" diff --git a/drivers/dfu/dfu_sf.c b/drivers/dfu/dfu_sf.c index 25a9c81850..2dae159370 100644 --- a/drivers/dfu/dfu_sf.c +++ b/drivers/dfu/dfu_sf.c @@ -4,7 +4,6 @@ */ #include <common.h> -#include <flash.h> #include <malloc.h> #include <errno.h> #include <div64.h> diff --git a/drivers/fastboot/fb_command.c b/drivers/fastboot/fb_command.c index 98eccc3455..bdfdf262c8 100644 --- a/drivers/fastboot/fb_command.c +++ b/drivers/fastboot/fb_command.c @@ -10,7 +10,6 @@ #include <fastboot-internal.h> #include <fb_mmc.h> #include <fb_nand.h> -#include <flash.h> #include <part.h> #include <stdlib.h> diff --git a/drivers/fastboot/fb_mmc.c b/drivers/fastboot/fb_mmc.c index c62e414306..033c510bc0 100644 --- a/drivers/fastboot/fb_mmc.c +++ b/drivers/fastboot/fb_mmc.c @@ -10,7 +10,6 @@ #include <fastboot.h> #include <fastboot-internal.h> #include <fb_mmc.h> -#include <flash.h> #include <image-sparse.h> #include <image.h> #include <log.h> diff --git a/drivers/fastboot/fb_nand.c b/drivers/fastboot/fb_nand.c index eb8a36f292..6d3a900c77 100644 --- a/drivers/fastboot/fb_nand.c +++ b/drivers/fastboot/fb_nand.c @@ -7,7 +7,6 @@ #include <config.h> #include <common.h> #include <blk.h> -#include <flash.h> #include <fastboot.h> #include <image-sparse.h> diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 82a8bca270..7e4c3577b3 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -70,7 +70,7 @@ config GPIO_HOG config SPL_GPIO_HOG bool "Enable GPIO hog support in SPL" - depends on SPL_GPIO_SUPPORT + depends on SPL_GPIO help Enable gpio hog support in SPL The GPIO chip may contain GPIO hog definitions. GPIO hogging diff --git a/drivers/misc/cros_ec.c b/drivers/misc/cros_ec.c index e131eccd28..621d175217 100644 --- a/drivers/misc/cros_ec.c +++ b/drivers/misc/cros_ec.c @@ -18,7 +18,6 @@ #include <common.h> #include <command.h> #include <dm.h> -#include <flash.h> #include <i2c.h> #include <cros_ec.h> #include <fdtdec.h> diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig index 3d1f6e43fd..fcdb450f77 100644 --- a/drivers/mtd/Kconfig +++ b/drivers/mtd/Kconfig @@ -106,6 +106,10 @@ config SYS_FLASH_USE_BUFFER_WRITE help Use buffered writes to flash. +config SYS_FLASH_EMPTY_INFO + bool "Enable displaying empty sectors in flash info" + depends on FLASH_CFI_DRIVER + config FLASH_CFI_MTD bool "Enable CFI MTD driver" depends on FLASH_CFI_DRIVER @@ -128,6 +132,21 @@ config SYS_FLASH_CFI Define if the flash driver uses extra elements in the common flash structure for storing flash geometry. +config SYS_FLASH_QUIET_TEST + bool "Disable printing a warning about not recognizing some flash banks" + depends on FLASH_CFI_DRIVER + help + If this option is enabled, the common CFI flash doesn't print it's + warning upon not recognized FLASH banks. This is useful, if some of + the configured banks are only optionally available. + +config SYS_FLASH_CHECKSUM + bool "Compute and print flash CRC if 'flashchecksum' is set in the environment" + depends on MTD_NOR_FLASH + help + If the variable flashchecksum is set in the environment, perform a CRC + of the flash and print the value to console. + config ALTERA_QSPI bool "Altera Generic Quad SPI Controller" depends on DM_MTD @@ -138,14 +157,6 @@ config ALTERA_QSPI NOR flash to parallel flash interface. Please find details on the "Embedded Peripherals IP User Guide" of Altera. -config FLASH_PIC32 - bool "Microchip PIC32 Flash driver" - depends on MACH_PIC32 && DM_MTD - select USE_SYS_MAX_FLASH_BANKS - help - This enables access to Microchip PIC32 internal non-CFI flash - chips through PIC32 Non-Volatile-Memory Controller. - config RENESAS_RPC_HF bool "Renesas RCar Gen3 RPC HyperFlash driver" depends on RCAR_GEN3 && DM_MTD @@ -168,6 +179,11 @@ config STM32_FLASH This is the driver of embedded flash for some STMicroelectronics STM32 MCU. +config SYS_MAX_FLASH_SECT + int "Maximumm number of sectors on a flash chip" + depends on MTD_NOR_FLASH || FLASH_CFI_DRIVER + default 512 + config SAMSUNG_ONENAND bool "Samsung OneNAND driver support" diff --git a/drivers/mtd/Makefile b/drivers/mtd/Makefile index ce0451108e..3a78590aaa 100644 --- a/drivers/mtd/Makefile +++ b/drivers/mtd/Makefile @@ -11,7 +11,6 @@ mtd-$(CONFIG_ALTERA_QSPI) += altera_qspi.o mtd-$(CONFIG_FLASH_CFI_DRIVER) += cfi_flash.o mtd-$(CONFIG_FLASH_CFI_MTD) += cfi_mtd.o mtd-$(CONFIG_FLASH_CFI_LEGACY) += jedec_flash.o -mtd-$(CONFIG_FLASH_PIC32) += pic32_flash.o mtd-$(CONFIG_STM32_FLASH) += stm32_flash.o mtd-$(CONFIG_RENESAS_RPC_HF) += renesas_rpc_hf.o mtd-$(CONFIG_HBMC_AM654) += hbmc-am654.o diff --git a/drivers/mtd/pic32_flash.c b/drivers/mtd/pic32_flash.c deleted file mode 100644 index ea0dbe9eee..0000000000 --- a/drivers/mtd/pic32_flash.c +++ /dev/null @@ -1,448 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2015 - * Cristian Birsan <cristian.birsan@microchip.com> - * Purna Chandra Mandal <purna.mandal@microchip.com> - */ - -#include <common.h> -#include <cpu_func.h> -#include <dm.h> -#include <fdt_support.h> -#include <flash.h> -#include <init.h> -#include <irq_func.h> -#include <asm/global_data.h> -#include <linux/bitops.h> -#include <mach/pic32.h> -#include <wait_bit.h> - -DECLARE_GLOBAL_DATA_PTR; - -/* NVM Controller registers */ -struct pic32_reg_nvm { - struct pic32_reg_atomic ctrl; - struct pic32_reg_atomic key; - struct pic32_reg_atomic addr; - struct pic32_reg_atomic data; -}; - -/* NVM operations */ -#define NVMOP_NOP 0 -#define NVMOP_WORD_WRITE 1 -#define NVMOP_PAGE_ERASE 4 - -/* NVM control bits */ -#define NVM_WR BIT(15) -#define NVM_WREN BIT(14) -#define NVM_WRERR BIT(13) -#define NVM_LVDERR BIT(12) - -/* NVM programming unlock register */ -#define LOCK_KEY 0x0 -#define UNLOCK_KEY1 0xaa996655 -#define UNLOCK_KEY2 0x556699aa - -/* - * PIC32 flash banks consist of number of pages, each page - * into number of rows and rows into number of words. - * Here we will maintain page information instead of sector. - */ -flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; -static struct pic32_reg_nvm *nvm_regs_p; - -static inline void flash_initiate_operation(u32 nvmop) -{ - /* set operation */ - writel(nvmop, &nvm_regs_p->ctrl.raw); - - /* enable flash write */ - writel(NVM_WREN, &nvm_regs_p->ctrl.set); - - /* unlock sequence */ - writel(LOCK_KEY, &nvm_regs_p->key.raw); - writel(UNLOCK_KEY1, &nvm_regs_p->key.raw); - writel(UNLOCK_KEY2, &nvm_regs_p->key.raw); - - /* initiate operation */ - writel(NVM_WR, &nvm_regs_p->ctrl.set); -} - -static int flash_wait_till_busy(const char *func, ulong timeout) -{ - int ret = wait_for_bit_le32(&nvm_regs_p->ctrl.raw, - NVM_WR, false, timeout, false); - - return ret ? ERR_TIMEOUT : ERR_OK; -} - -static inline int flash_complete_operation(void) -{ - u32 tmp; - - tmp = readl(&nvm_regs_p->ctrl.raw); - if (tmp & NVM_WRERR) { - printf("Error in Block Erase - Lock Bit may be set!\n"); - flash_initiate_operation(NVMOP_NOP); - return ERR_PROTECTED; - } - - if (tmp & NVM_LVDERR) { - printf("Error in Block Erase - low-vol detected!\n"); - flash_initiate_operation(NVMOP_NOP); - return ERR_NOT_ERASED; - } - - /* disable flash write or erase operation */ - writel(NVM_WREN, &nvm_regs_p->ctrl.clr); - - return ERR_OK; -} - -/* - * Erase flash sectors, returns: - * ERR_OK - OK - * ERR_INVAL - invalid sector arguments - * ERR_TIMEOUT - write timeout - * ERR_NOT_ERASED - Flash not erased - * ERR_UNKNOWN_FLASH_VENDOR - incorrect flash - */ -int flash_erase(flash_info_t *info, int s_first, int s_last) -{ - ulong sect_start, sect_end, flags; - int prot, sect; - int rc; - - if ((info->flash_id & FLASH_VENDMASK) != FLASH_MAN_MCHP) { - printf("Can't erase unknown flash type %08lx - aborted\n", - info->flash_id); - return ERR_UNKNOWN_FLASH_VENDOR; - } - - if ((s_first < 0) || (s_first > s_last)) { - printf("- no sectors to erase\n"); - return ERR_INVAL; - } - - prot = 0; - for (sect = s_first; sect <= s_last; ++sect) { - if (info->protect[sect]) - prot++; - } - - if (prot) - printf("- Warning: %d protected sectors will not be erased!\n", - prot); - else - printf("\n"); - - /* erase on unprotected sectors */ - for (sect = s_first; sect <= s_last; sect++) { - if (info->protect[sect]) - continue; - - /* disable interrupts */ - flags = disable_interrupts(); - - /* write destination page address (physical) */ - sect_start = CPHYSADDR(info->start[sect]); - writel(sect_start, &nvm_regs_p->addr.raw); - - /* page erase */ - flash_initiate_operation(NVMOP_PAGE_ERASE); - - /* wait */ - rc = flash_wait_till_busy(__func__, - CONFIG_SYS_FLASH_ERASE_TOUT); - - /* re-enable interrupts if necessary */ - if (flags) - enable_interrupts(); - - if (rc != ERR_OK) - return rc; - - rc = flash_complete_operation(); - if (rc != ERR_OK) - return rc; - - /* - * flash content is updated but cache might contain stale - * data, so invalidate dcache. - */ - sect_end = info->start[sect] + info->size / info->sector_count; - invalidate_dcache_range(info->start[sect], sect_end); - } - - printf(" done\n"); - return ERR_OK; -} - -int page_erase(flash_info_t *info, int sect) -{ - return 0; -} - -/* Write a word to flash */ -static int write_word(flash_info_t *info, ulong dest, ulong word) -{ - ulong flags; - int rc; - - /* read flash to check if it is sufficiently erased */ - if ((readl((void __iomem *)dest) & word) != word) { - printf("Error, Flash not erased!\n"); - return ERR_NOT_ERASED; - } - - /* disable interrupts */ - flags = disable_interrupts(); - - /* update destination page address (physical) */ - writel(CPHYSADDR(dest), &nvm_regs_p->addr.raw); - writel(word, &nvm_regs_p->data.raw); - - /* word write */ - flash_initiate_operation(NVMOP_WORD_WRITE); - - /* wait for operation to complete */ - rc = flash_wait_till_busy(__func__, CONFIG_SYS_FLASH_WRITE_TOUT); - - /* re-enable interrupts if necessary */ - if (flags) - enable_interrupts(); - - if (rc != ERR_OK) - return rc; - - return flash_complete_operation(); -} - -/* - * Copy memory to flash, returns: - * ERR_OK - OK - * ERR_TIMEOUT - write timeout - * ERR_NOT_ERASED - Flash not erased - */ -int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt) -{ - ulong dst, tmp_le, len = cnt; - int i, l, rc; - uchar *cp; - - /* get lower word aligned address */ - dst = (addr & ~3); - - /* handle unaligned start bytes */ - l = addr - dst; - if (l != 0) { - tmp_le = 0; - for (i = 0, cp = (uchar *)dst; i < l; ++i, ++cp) - tmp_le |= *cp << (i * 8); - - for (; (i < 4) && (cnt > 0); ++i, ++src, --cnt, ++cp) - tmp_le |= *src << (i * 8); - - for (; (cnt == 0) && (i < 4); ++i, ++cp) - tmp_le |= *cp << (i * 8); - - rc = write_word(info, dst, tmp_le); - if (rc) - goto out; - - dst += 4; - } - - /* handle word aligned part */ - while (cnt >= 4) { - tmp_le = src[0] | src[1] << 8 | src[2] << 16 | src[3] << 24; - rc = write_word(info, dst, tmp_le); - if (rc) - goto out; - src += 4; - dst += 4; - cnt -= 4; - } - - if (cnt == 0) { - rc = ERR_OK; - goto out; - } - - /* handle unaligned tail bytes */ - tmp_le = 0; - for (i = 0, cp = (uchar *)dst; (i < 4) && (cnt > 0); ++i, ++cp) { - tmp_le |= *src++ << (i * 8); - --cnt; - } - - for (; i < 4; ++i, ++cp) - tmp_le |= *cp << (i * 8); - - rc = write_word(info, dst, tmp_le); -out: - /* - * flash content updated by nvm controller but CPU cache might - * have stale data, so invalidate dcache. - */ - invalidate_dcache_range(addr, addr + len); - - printf(" done\n"); - return rc; -} - -void flash_print_info(flash_info_t *info) -{ - int i; - - if (info->flash_id == FLASH_UNKNOWN) { - printf("missing or unknown FLASH type\n"); - return; - } - - switch (info->flash_id & FLASH_VENDMASK) { - case FLASH_MAN_MCHP: - printf("Microchip Technology "); - break; - default: - printf("Unknown Vendor "); - break; - } - - switch (info->flash_id & FLASH_TYPEMASK) { - case FLASH_MCHP100T: - printf("Internal (8 Mbit, 64 x 16k)\n"); - break; - default: - printf("Unknown Chip Type\n"); - break; - } - - printf(" Size: %ld MB in %d Sectors\n", - info->size >> 20, info->sector_count); - - printf(" Sector Start Addresses:"); - for (i = 0; i < info->sector_count; ++i) { - if ((i % 5) == 0) - printf("\n "); - - printf(" %08lX%s", info->start[i], - info->protect[i] ? " (RO)" : " "); - } - printf("\n"); -} - -unsigned long flash_init(void) -{ - unsigned long size = 0; - struct udevice *dev; - int bank; - - /* probe every MTD device */ - for (uclass_first_device(UCLASS_MTD, &dev); dev; - uclass_next_device(&dev)) { - /* nop */ - } - - /* calc total flash size */ - for (bank = 0; bank < CONFIG_SYS_MAX_FLASH_BANKS; ++bank) - size += flash_info[bank].size; - - return size; -} - -static void pic32_flash_bank_init(flash_info_t *info, - ulong base, ulong size) -{ - ulong sect_size; - int sect; - - /* device & manufacturer code */ - info->flash_id = FLASH_MAN_MCHP | FLASH_MCHP100T; - info->sector_count = CONFIG_SYS_MAX_FLASH_SECT; - info->size = size; - - /* update sector (i.e page) info */ - sect_size = info->size / info->sector_count; - for (sect = 0; sect < info->sector_count; sect++) { - info->start[sect] = base; - /* protect each sector by default */ - info->protect[sect] = 1; - base += sect_size; - } -} - -static int pic32_flash_probe(struct udevice *dev) -{ - void *blob = (void *)gd->fdt_blob; - int node = dev_of_offset(dev); - const char *list, *end; - const fdt32_t *cell; - unsigned long addr, size; - int parent, addrc, sizec; - flash_info_t *info; - int len, idx; - - /* - * decode regs. there are multiple reg tuples, and they need to - * match with reg-names. - */ - parent = fdt_parent_offset(blob, node); - fdt_support_default_count_cells(blob, parent, &addrc, &sizec); - list = fdt_getprop(blob, node, "reg-names", &len); - if (!list) - return -ENOENT; - - end = list + len; - cell = fdt_getprop(blob, node, "reg", &len); - if (!cell) - return -ENOENT; - - for (idx = 0, info = &flash_info[0]; list < end;) { - addr = fdt_translate_address((void *)blob, node, cell + idx); - size = fdt_addr_to_cpu(cell[idx + addrc]); - len = strlen(list); - if (!strncmp(list, "nvm", len)) { - /* NVM controller */ - nvm_regs_p = ioremap(addr, size); - } else if (!strncmp(list, "bank", 4)) { - /* Flash bank: use kseg0 cached address */ - pic32_flash_bank_init(info, CKSEG0ADDR(addr), size); - info++; - } - idx += addrc + sizec; - list += len + 1; - } - - /* disable flash write/erase operations */ - writel(NVM_WREN, &nvm_regs_p->ctrl.clr); - -#if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) - /* monitor protection ON by default */ - flash_protect(FLAG_PROTECT_SET, - CONFIG_SYS_MONITOR_BASE, - CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1, - &flash_info[0]); -#endif - -#ifdef CONFIG_ENV_IS_IN_FLASH - /* ENV protection ON by default */ - flash_protect(FLAG_PROTECT_SET, - CONFIG_ENV_ADDR, - CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1, - &flash_info[0]); -#endif - return 0; -} - -static const struct udevice_id pic32_flash_ids[] = { - { .compatible = "microchip,pic32mzda-flash" }, - {} -}; - -U_BOOT_DRIVER(pic32_flash) = { - .name = "pic32_flash", - .id = UCLASS_MTD, - .of_match = pic32_flash_ids, - .probe = pic32_flash_probe, -}; diff --git a/drivers/mtd/spi/sf_dataflash.c b/drivers/mtd/spi/sf_dataflash.c index 85867817c7..e19e34244d 100644 --- a/drivers/mtd/spi/sf_dataflash.c +++ b/drivers/mtd/spi/sf_dataflash.c @@ -10,7 +10,6 @@ #include <dm.h> #include <errno.h> #include <fdtdec.h> -#include <flash.h> #include <log.h> #include <spi.h> #include <spi_flash.h> diff --git a/drivers/mtd/spi/sf_mtd.c b/drivers/mtd/spi/sf_mtd.c index 0aed28a52b..071b25ac67 100644 --- a/drivers/mtd/spi/sf_mtd.c +++ b/drivers/mtd/spi/sf_mtd.c @@ -4,7 +4,6 @@ */ #include <common.h> -#include <flash.h> #include <malloc.h> #include <linux/errno.h> #include <linux/mtd/mtd.h> diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index 8a226a7af5..26a356baf8 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -10,7 +10,6 @@ */ #include <common.h> -#include <flash.h> #include <log.h> #include <watchdog.h> #include <dm.h> diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index 5d90a924aa..93e7dbe976 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -357,6 +357,9 @@ config FEC_MXC config FMAN_ENET bool "Freescale FMan ethernet support" depends on ARM || PPC + select SYS_FMAN_V3 if ARCH_B4420 || ARCH_B4860 || ARCH_LS1043A || \ + ARCH_LS1046A || ARCH_T1024 || ARCH_T1040 || ARCH_T1042 || \ + ARCH_T2080 || ARCH_T4240 help This driver support the Freescale FMan Ethernet controller @@ -370,6 +373,12 @@ config SYS_QE_FMAN_FW_LENGTH depends on FMAN_ENET || QE || U_QE default 0x10000 +config SYS_FMAN_V3 + bool + select FSL_MEMAC + help + SoC has FMan v3 with mEMAC + config FTMAC100 bool "Ftmac100 Ethernet Support" help diff --git a/drivers/net/fm/Makefile b/drivers/net/fm/Makefile index ae38412176..5a7d3037af 100644 --- a/drivers/net/fm/Makefile +++ b/drivers/net/fm/Makefile @@ -11,7 +11,6 @@ obj-y += tgec.o obj-y += tgec_phy.o # Soc have FMAN v3 with mEMAC -obj-$(CONFIG_SYS_FMAN_V3) += memac_phy.o obj-$(CONFIG_SYS_FMAN_V3) += memac.o # SoC specific SERDES support diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig index 33a4b6f30d..52ce08b3b3 100644 --- a/drivers/net/phy/Kconfig +++ b/drivers/net/phy/Kconfig @@ -345,6 +345,13 @@ config PHY_NCSI endif #PHYLIB +config FSL_MEMAC + bool "NXP mEMAC PHY support" + +config SYS_MEMAC_LITTLE_ENDIAN + bool "mEMAC is access in little endian mode" + depends on FSL_MEMAC || FSL_LS_MDIO + config PHY_RESET_DELAY int "Extra delay after reset before MII register access" default 0 diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig index 8fd5a2e205..6e79868d0e 100644 --- a/drivers/pwm/Kconfig +++ b/drivers/pwm/Kconfig @@ -12,6 +12,7 @@ config DM_PWM config PWM_ASPEED bool "Enable support for the Aspeed PWM" depends on DM_PWM + select SYSCON help This PWM is found on Ast2600 SoCs. It supports a programmable period and duty cycle. It provides 16 channels which can be independently diff --git a/drivers/xen/events.c b/drivers/xen/events.c index 5e90a65846..532216fece 100644 --- a/drivers/xen/events.c +++ b/drivers/xen/events.c @@ -23,7 +23,9 @@ #include <xen/events.h> #include <xen/hvm.h> +#if CONFIG_IS_ENABLED(XEN_SERIAL) extern u32 console_evtchn; +#endif /* CONFIG_IS_ENABLED(XEN_SERIAL) */ #define NR_EVS 1024 @@ -51,8 +53,11 @@ void unbind_all_ports(void) struct vcpu_info *vcpu_info = &s->vcpu_info[cpu]; for (i = 0; i < NR_EVS; i++) { +#if CONFIG_IS_ENABLED(XEN_SERIAL) if (i == console_evtchn) continue; +#endif /* CONFIG_IS_ENABLED(XEN_SERIAL) */ + if (test_and_clear_bit(i, bound_ports)) { printf("port %d still bound!\n", i); unbind_evtchn(i); |