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-rw-r--r--drivers/block/blk-uclass.c16
-rw-r--r--drivers/clk/clk-uclass.c20
-rw-r--r--drivers/clk/clk_k210.c2
-rw-r--r--drivers/clk/imx/clk-imx8mm.c86
-rw-r--r--drivers/clk/rockchip/clk_pll.c6
-rw-r--r--drivers/clk/rockchip/clk_rk3399.c2
-rw-r--r--drivers/core/Kconfig2
-rw-r--r--drivers/core/regmap.c23
-rw-r--r--drivers/core/uclass.c40
-rw-r--r--drivers/cpu/cpu-uclass.c20
-rw-r--r--drivers/crypto/fsl/fsl_rsa.c10
-rw-r--r--drivers/ddr/imx/imx8m/ddr_init.c8
-rw-r--r--drivers/dma/dma-uclass.c17
-rw-r--r--drivers/dma/sandbox-dma-test.c4
-rw-r--r--drivers/dma/ti-edma3.c33
-rw-r--r--drivers/dma/ti/k3-udma.c4
-rw-r--r--drivers/gpio/Kconfig6
-rw-r--r--drivers/gpio/Makefile1
-rw-r--r--drivers/gpio/adp5585_gpio.c238
-rw-r--r--drivers/input/Kconfig9
-rw-r--r--drivers/input/Makefile1
-rw-r--r--drivers/mmc/Kconfig4
-rw-r--r--drivers/mmc/dw_mmc.c3
-rw-r--r--drivers/mmc/f_sdh30.c66
-rw-r--r--drivers/mmc/fsl_esdhc_imx.c4
-rw-r--r--drivers/mmc/ftsdc010_mci.c2
-rw-r--r--drivers/mmc/mmc.c6
-rw-r--r--drivers/mmc/omap_hsmmc.c2
-rw-r--r--drivers/mmc/sdhci.c8
-rw-r--r--drivers/mmc/stm32_sdmmc2.c20
-rw-r--r--drivers/net/ftgmac100.c14
-rw-r--r--drivers/net/phy/ncsi.c1
-rw-r--r--drivers/net/phy/phy.c9
-rw-r--r--drivers/pci/pci-uclass.c4
-rw-r--r--drivers/phy/ti/phy-j721e-wiz.c75
-rw-r--r--drivers/pinctrl/sunxi/pinctrl-sunxi.c1
-rw-r--r--drivers/ram/rockchip/Kconfig2
-rw-r--r--drivers/serial/serial-uclass.c2
-rw-r--r--drivers/serial/serial_bcm283x_mu.c2
-rw-r--r--drivers/serial/serial_bcm283x_pl011.c2
-rw-r--r--drivers/sysreset/sysreset_ast.c2
-rw-r--r--drivers/usb/gadget/ether.c11
-rw-r--r--drivers/video/exynos/exynos_fb.c14
-rw-r--r--drivers/video/imx/mxc_ipuv3_fb.c9
-rw-r--r--drivers/video/mali_dp.c2
-rw-r--r--drivers/video/stm32/stm32_dsi.c2
-rw-r--r--drivers/video/tegra124/dp.c4
-rw-r--r--drivers/virtio/virtio-uclass.c15
-rw-r--r--drivers/w1/w1-uclass.c20
-rw-r--r--drivers/watchdog/omap_wdt.c2
-rw-r--r--drivers/xen/pvblock.c5
51 files changed, 657 insertions, 204 deletions
diff --git a/drivers/block/blk-uclass.c b/drivers/block/blk-uclass.c
index 7d12d5413f..bcc14a684b 100644
--- a/drivers/block/blk-uclass.c
+++ b/drivers/block/blk-uclass.c
@@ -593,11 +593,9 @@ int blk_find_next(enum blk_flag_t flags, struct udevice **devp)
int blk_first_device_err(enum blk_flag_t flags, struct udevice **devp)
{
- int ret;
-
- for (ret = uclass_first_device_err(UCLASS_BLK, devp);
- !ret;
- ret = uclass_next_device_err(devp)) {
+ for (uclass_first_device(UCLASS_BLK, devp);
+ *devp;
+ uclass_next_device(devp)) {
if (!blk_flags_check(*devp, flags))
return 0;
}
@@ -607,11 +605,9 @@ int blk_first_device_err(enum blk_flag_t flags, struct udevice **devp)
int blk_next_device_err(enum blk_flag_t flags, struct udevice **devp)
{
- int ret;
-
- for (ret = uclass_next_device_err(devp);
- !ret;
- ret = uclass_next_device_err(devp)) {
+ for (uclass_next_device(devp);
+ *devp;
+ uclass_next_device(devp)) {
if (!blk_flags_check(*devp, flags))
return 0;
}
diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
index b89c77bf79..2f9635524c 100644
--- a/drivers/clk/clk-uclass.c
+++ b/drivers/clk/clk-uclass.c
@@ -505,7 +505,7 @@ struct clk *clk_get_parent(struct clk *clk)
return pclk;
}
-long long clk_get_parent_rate(struct clk *clk)
+ulong clk_get_parent_rate(struct clk *clk)
{
const struct clk_ops *ops;
struct clk *pclk;
@@ -544,6 +544,19 @@ ulong clk_round_rate(struct clk *clk, ulong rate)
return ops->round_rate(clk, rate);
}
+static void clk_get_priv(struct clk *clk, struct clk **clkp)
+{
+ *clkp = clk;
+
+ /* get private clock struct associated to the provided clock */
+ if (CONFIG_IS_ENABLED(CLK_CCF)) {
+ /* Take id 0 as a non-valid clk, such as dummy */
+ if (clk->id)
+ clk_get_by_id(clk->id, clkp);
+ }
+}
+
+/* clean cache, called with private clock struct */
static void clk_clean_rate_cache(struct clk *clk)
{
struct udevice *child_dev;
@@ -563,6 +576,7 @@ static void clk_clean_rate_cache(struct clk *clk)
ulong clk_set_rate(struct clk *clk, ulong rate)
{
const struct clk_ops *ops;
+ struct clk *clkp;
debug("%s(clk=%p, rate=%lu)\n", __func__, clk, rate);
if (!clk_valid(clk))
@@ -572,8 +586,10 @@ ulong clk_set_rate(struct clk *clk, ulong rate)
if (!ops->set_rate)
return -ENOSYS;
+ /* get private clock struct used for cache */
+ clk_get_priv(clk, &clkp);
/* Clean up cached rates for us and all child clocks */
- clk_clean_rate_cache(clk);
+ clk_clean_rate_cache(clkp);
return ops->set_rate(clk, rate);
}
diff --git a/drivers/clk/clk_k210.c b/drivers/clk/clk_k210.c
index 1961efaa5e..f7d36963f8 100644
--- a/drivers/clk/clk_k210.c
+++ b/drivers/clk/clk_k210.c
@@ -846,7 +846,7 @@ again:
error = DIV_ROUND_CLOSEST_ULL(f * inv_ratio, r * od);
/* The lower 16 bits are spurious */
- error = abs((error - BIT(32))) >> 16;
+ error = abs64((error - BIT_ULL(32))) >> 16;
if (error < best_error) {
best->r = r;
diff --git a/drivers/clk/imx/clk-imx8mm.c b/drivers/clk/imx/clk-imx8mm.c
index 542aa31f7a..b5c253e496 100644
--- a/drivers/clk/imx/clk-imx8mm.c
+++ b/drivers/clk/imx/clk-imx8mm.c
@@ -28,10 +28,10 @@ static const char *imx8mm_a53_sels[] = {"clock-osc-24m", "arm_pll_out", "sys_pll
static const char *imx8mm_ahb_sels[] = {"clock-osc-24m", "sys_pll1_133m", "sys_pll1_800m", "sys_pll1_400m",
"sys_pll2_125m", "sys_pll3_out", "audio_pll1_out", "video_pll1_out", };
+#ifndef CONFIG_SPL_BUILD
static const char *imx8mm_enet_axi_sels[] = {"clock-osc-24m", "sys_pll1_266m", "sys_pll1_800m", "sys_pll2_250m",
"sys_pll2_200m", "audio_pll1_out", "video_pll1_out", "sys_pll3_out", };
-#ifndef CONFIG_SPL_BUILD
static const char *imx8mm_enet_ref_sels[] = {"clock-osc-24m", "sys_pll2_125m", "sys_pll2_50m", "sys_pll2_100m",
"sys_pll1_160m", "audio_pll1_out", "video_pll1_out", "clk_ext4", };
@@ -66,6 +66,7 @@ static const char *imx8mm_i2c3_sels[] = {"clock-osc-24m", "sys_pll1_160m", "sys_
static const char *imx8mm_i2c4_sels[] = {"clock-osc-24m", "sys_pll1_160m", "sys_pll2_50m", "sys_pll3_out", "audio_pll1_out",
"video_pll1_out", "audio_pll2_out", "sys_pll1_133m", };
+#ifndef CONFIG_SPL_BUILD
static const char *imx8mm_pwm1_sels[] = {"clock-osc-24m", "sys_pll2_100m", "sys_pll1_160m", "sys_pll1_40m",
"sys_pll3_out", "clk_ext1", "sys_pll1_80m", "video_pll1_out", };
@@ -77,6 +78,7 @@ static const char *imx8mm_pwm3_sels[] = {"clock-osc-24m", "sys_pll2_100m", "sys_
static const char *imx8mm_pwm4_sels[] = {"clock-osc-24m", "sys_pll2_100m", "sys_pll1_160m", "sys_pll1_40m",
"sys_pll3_out", "clk_ext2", "sys_pll1_80m", "video_pll1_out", };
+#endif
static const char *imx8mm_wdog_sels[] = {"clock-osc-24m", "sys_pll1_133m", "sys_pll1_160m", "vpu_pll_out",
"sys_pll2_125m", "sys_pll3_out", "sys_pll1_80m", "sys_pll2_166m", };
@@ -84,8 +86,10 @@ static const char *imx8mm_wdog_sels[] = {"clock-osc-24m", "sys_pll1_133m", "sys_
static const char *imx8mm_usdhc3_sels[] = {"clock-osc-24m", "sys_pll1_400m", "sys_pll1_800m", "sys_pll2_500m",
"sys_pll3_out", "sys_pll1_266m", "audio_pll2_clk", "sys_pll1_100m", };
+#if CONFIG_IS_ENABLED(NXP_FSPI)
static const char *imx8mm_qspi_sels[] = {"clock-osc-24m", "sys_pll1_400m", "sys_pll2_333m", "sys_pll2_500m",
"audio_pll2_out", "sys_pll1_266m", "sys_pll3_out", "sys_pll1_100m", };
+#endif
static const char *imx8mm_usb_core_sels[] = {"clock-osc-24m", "sys_pll1_100m", "sys_pll1_40m", "sys_pll2_100m",
"sys_pll2_200m", "clk_ext2", "clk_ext3", "audio_pll2_out", };
@@ -93,6 +97,7 @@ static const char *imx8mm_usb_core_sels[] = {"clock-osc-24m", "sys_pll1_100m", "
static const char *imx8mm_usb_phy_sels[] = {"clock-osc-24m", "sys_pll1_100m", "sys_pll1_40m", "sys_pll2_100m",
"sys_pll2_200m", "clk_ext2", "clk_ext3", "audio_pll2_out", };
+#if CONFIG_IS_ENABLED(DM_SPI)
static const char *imx8mm_ecspi1_sels[] = {"clock-osc-24m", "sys_pll2_200m", "sys_pll1_40m", "sys_pll1_160m",
"sys_pll1_800m", "sys_pll3_out", "sys_pll2_250m", "audio_pll2_out", };
@@ -101,6 +106,7 @@ static const char *imx8mm_ecspi2_sels[] = {"clock-osc-24m", "sys_pll2_200m", "sy
static const char *imx8mm_ecspi3_sels[] = {"clock-osc-24m", "sys_pll2_200m", "sys_pll1_40m", "sys_pll1_160m",
"sys_pll1_800m", "sys_pll3_out", "sys_pll2_250m", "audio_pll2_out", };
+#endif
static int imx8mm_clk_probe(struct udevice *dev)
{
@@ -242,9 +248,6 @@ static int imx8mm_clk_probe(struct udevice *dev)
clk_dm(IMX8MM_CLK_IPG_ROOT,
imx_clk_divider2("ipg_root", "ahb", base + 0x9080, 0, 1));
- clk_dm(IMX8MM_CLK_ENET_AXI,
- imx8m_clk_composite("enet_axi", imx8mm_enet_axi_sels,
- base + 0x8880));
clk_dm(IMX8MM_CLK_NAND_USDHC_BUS,
imx8m_clk_composite_critical("nand_usdhc_bus",
imx8mm_nand_usdhc_sels,
@@ -267,38 +270,15 @@ static int imx8mm_clk_probe(struct udevice *dev)
imx8m_clk_composite("i2c3", imx8mm_i2c3_sels, base + 0xae00));
clk_dm(IMX8MM_CLK_I2C4,
imx8m_clk_composite("i2c4", imx8mm_i2c4_sels, base + 0xae80));
- clk_dm(IMX8MM_CLK_PWM1,
- imx8m_clk_composite("pwm1", imx8mm_pwm1_sels, base + 0xb380));
- clk_dm(IMX8MM_CLK_PWM2,
- imx8m_clk_composite("pwm2", imx8mm_pwm2_sels, base + 0xb400));
- clk_dm(IMX8MM_CLK_PWM3,
- imx8m_clk_composite("pwm3", imx8mm_pwm3_sels, base + 0xb480));
- clk_dm(IMX8MM_CLK_PWM4,
- imx8m_clk_composite("pwm4", imx8mm_pwm4_sels, base + 0xb500));
clk_dm(IMX8MM_CLK_WDOG,
imx8m_clk_composite("wdog", imx8mm_wdog_sels, base + 0xb900));
clk_dm(IMX8MM_CLK_USDHC3,
imx8m_clk_composite("usdhc3", imx8mm_usdhc3_sels,
base + 0xbc80));
- clk_dm(IMX8MM_CLK_QSPI,
- imx8m_clk_composite("qspi", imx8mm_qspi_sels, base + 0xab80));
clk_dm(IMX8MM_CLK_USB_CORE_REF,
imx8m_clk_composite("usb_core_ref", imx8mm_usb_core_sels, base + 0xb100));
clk_dm(IMX8MM_CLK_USB_PHY_REF,
imx8m_clk_composite("usb_phy_ref", imx8mm_usb_phy_sels, base + 0xb180));
- clk_dm(IMX8MM_CLK_ECSPI1,
- imx8m_clk_composite("ecspi1", imx8mm_ecspi1_sels, base + 0xb280));
- clk_dm(IMX8MM_CLK_ECSPI2,
- imx8m_clk_composite("ecspi2", imx8mm_ecspi2_sels, base + 0xb300));
- clk_dm(IMX8MM_CLK_ECSPI3,
- imx8m_clk_composite("ecspi3", imx8mm_ecspi3_sels, base + 0xc180));
-
- clk_dm(IMX8MM_CLK_ECSPI1_ROOT,
- imx_clk_gate4("ecspi1_root_clk", "ecspi1", base + 0x4070, 0));
- clk_dm(IMX8MM_CLK_ECSPI2_ROOT,
- imx_clk_gate4("ecspi2_root_clk", "ecspi2", base + 0x4080, 0));
- clk_dm(IMX8MM_CLK_ECSPI3_ROOT,
- imx_clk_gate4("ecspi3_root_clk", "ecspi3", base + 0x4090, 0));
clk_dm(IMX8MM_CLK_I2C1_ROOT,
imx_clk_gate4("i2c1_root_clk", "i2c1", base + 0x4170, 0));
clk_dm(IMX8MM_CLK_I2C2_ROOT,
@@ -309,14 +289,6 @@ static int imx8mm_clk_probe(struct udevice *dev)
imx_clk_gate4("i2c4_root_clk", "i2c4", base + 0x41a0, 0));
clk_dm(IMX8MM_CLK_OCOTP_ROOT,
imx_clk_gate4("ocotp_root_clk", "ipg_root", base + 0x4220, 0));
- clk_dm(IMX8MM_CLK_PWM1_ROOT,
- imx_clk_gate4("pwm1_root_clk", "pwm1", base + 0x4280, 0));
- clk_dm(IMX8MM_CLK_PWM2_ROOT,
- imx_clk_gate4("pwm2_root_clk", "pwm2", base + 0x4290, 0));
- clk_dm(IMX8MM_CLK_PWM3_ROOT,
- imx_clk_gate4("pwm3_root_clk", "pwm3", base + 0x42a0, 0));
- clk_dm(IMX8MM_CLK_PWM4_ROOT,
- imx_clk_gate4("pwm4_root_clk", "pwm4", base + 0x42b0, 0));
clk_dm(IMX8MM_CLK_USDHC1_ROOT,
imx_clk_gate4("usdhc1_root_clk", "usdhc1", base + 0x4510, 0));
clk_dm(IMX8MM_CLK_USDHC2_ROOT,
@@ -329,13 +301,14 @@ static int imx8mm_clk_probe(struct udevice *dev)
imx_clk_gate4("wdog3_root_clk", "wdog", base + 0x4550, 0));
clk_dm(IMX8MM_CLK_USDHC3_ROOT,
imx_clk_gate4("usdhc3_root_clk", "usdhc3", base + 0x45e0, 0));
- clk_dm(IMX8MM_CLK_QSPI_ROOT,
- imx_clk_gate4("qspi_root_clk", "qspi", base + 0x42f0, 0));
clk_dm(IMX8MM_CLK_USB1_CTRL_ROOT,
imx_clk_gate4("usb1_ctrl_root_clk", "usb_bus", base + 0x44d0, 0));
/* clks not needed in SPL stage */
#ifndef CONFIG_SPL_BUILD
+ clk_dm(IMX8MM_CLK_ENET_AXI,
+ imx8m_clk_composite("enet_axi", imx8mm_enet_axi_sels,
+ base + 0x8880));
clk_dm(IMX8MM_CLK_ENET_REF,
imx8m_clk_composite("enet_ref", imx8mm_enet_ref_sels,
base + 0xa980));
@@ -348,6 +321,45 @@ static int imx8mm_clk_probe(struct udevice *dev)
clk_dm(IMX8MM_CLK_ENET1_ROOT,
imx_clk_gate4("enet1_root_clk", "enet_axi",
base + 0x40a0, 0));
+ clk_dm(IMX8MM_CLK_PWM1,
+ imx8m_clk_composite("pwm1", imx8mm_pwm1_sels, base + 0xb380));
+ clk_dm(IMX8MM_CLK_PWM2,
+ imx8m_clk_composite("pwm2", imx8mm_pwm2_sels, base + 0xb400));
+ clk_dm(IMX8MM_CLK_PWM3,
+ imx8m_clk_composite("pwm3", imx8mm_pwm3_sels, base + 0xb480));
+ clk_dm(IMX8MM_CLK_PWM4,
+ imx8m_clk_composite("pwm4", imx8mm_pwm4_sels, base + 0xb500));
+ clk_dm(IMX8MM_CLK_PWM1_ROOT,
+ imx_clk_gate4("pwm1_root_clk", "pwm1", base + 0x4280, 0));
+ clk_dm(IMX8MM_CLK_PWM2_ROOT,
+ imx_clk_gate4("pwm2_root_clk", "pwm2", base + 0x4290, 0));
+ clk_dm(IMX8MM_CLK_PWM3_ROOT,
+ imx_clk_gate4("pwm3_root_clk", "pwm3", base + 0x42a0, 0));
+ clk_dm(IMX8MM_CLK_PWM4_ROOT,
+ imx_clk_gate4("pwm4_root_clk", "pwm4", base + 0x42b0, 0));
+#endif
+
+#if CONFIG_IS_ENABLED(DM_SPI)
+ clk_dm(IMX8MM_CLK_ECSPI1,
+ imx8m_clk_composite("ecspi1", imx8mm_ecspi1_sels, base + 0xb280));
+ clk_dm(IMX8MM_CLK_ECSPI2,
+ imx8m_clk_composite("ecspi2", imx8mm_ecspi2_sels, base + 0xb300));
+ clk_dm(IMX8MM_CLK_ECSPI3,
+ imx8m_clk_composite("ecspi3", imx8mm_ecspi3_sels, base + 0xc180));
+
+ clk_dm(IMX8MM_CLK_ECSPI1_ROOT,
+ imx_clk_gate4("ecspi1_root_clk", "ecspi1", base + 0x4070, 0));
+ clk_dm(IMX8MM_CLK_ECSPI2_ROOT,
+ imx_clk_gate4("ecspi2_root_clk", "ecspi2", base + 0x4080, 0));
+ clk_dm(IMX8MM_CLK_ECSPI3_ROOT,
+ imx_clk_gate4("ecspi3_root_clk", "ecspi3", base + 0x4090, 0));
+#endif
+
+#if CONFIG_IS_ENABLED(NXP_FSPI)
+ clk_dm(IMX8MM_CLK_QSPI,
+ imx8m_clk_composite("qspi", imx8mm_qspi_sels, base + 0xab80));
+ clk_dm(IMX8MM_CLK_QSPI_ROOT,
+ imx_clk_gate4("qspi_root_clk", "qspi", base + 0x42f0, 0));
#endif
return 0;
diff --git a/drivers/clk/rockchip/clk_pll.c b/drivers/clk/rockchip/clk_pll.c
index 8d2aaf5b84..09b97cf57a 100644
--- a/drivers/clk/rockchip/clk_pll.c
+++ b/drivers/clk/rockchip/clk_pll.c
@@ -31,7 +31,7 @@ static struct rockchip_pll_rate_table rockchip_auto_table;
#define RK3036_PLLCON1_DSMPD_SHIFT 12
#define RK3036_PLLCON2_FRAC_MASK 0xffffff
#define RK3036_PLLCON2_FRAC_SHIFT 0
-#define RK3036_PLLCON1_PWRDOWN_SHIT 13
+#define RK3036_PLLCON1_PWRDOWN_SHIFT 13
#define MHZ 1000000
#define KHZ 1000
@@ -207,7 +207,7 @@ static int rk3036_pll_set_rate(struct rockchip_pll_clock *pll,
/* Power down */
rk_setreg(base + pll->con_offset + 0x4,
- 1 << RK3036_PLLCON1_PWRDOWN_SHIT);
+ 1 << RK3036_PLLCON1_PWRDOWN_SHIFT);
rk_clrsetreg(base + pll->con_offset,
(RK3036_PLLCON0_POSTDIV1_MASK |
@@ -231,7 +231,7 @@ static int rk3036_pll_set_rate(struct rockchip_pll_clock *pll,
/* Power Up */
rk_clrreg(base + pll->con_offset + 0x4,
- 1 << RK3036_PLLCON1_PWRDOWN_SHIT);
+ 1 << RK3036_PLLCON1_PWRDOWN_SHIFT);
/* waiting for pll lock */
while (!(readl(base + pll->con_offset + 0x4) & (1 << pll->lock_shift)))
diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index 97bf1c6e15..eaeac451df 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -856,7 +856,7 @@ static ulong rk3399_ddr_set_clk(struct rockchip_cru *cru,
switch (set_rate) {
case 50 * MHz:
dpll_cfg = (struct pll_div)
- {.refdiv = 1, .fbdiv = 12, .postdiv1 = 3, .postdiv2 = 2};
+ {.refdiv = 2, .fbdiv = 75, .postdiv1 = 3, .postdiv2 = 6};
break;
case 200 * MHz:
dpll_cfg = (struct pll_div)
diff --git a/drivers/core/Kconfig b/drivers/core/Kconfig
index c9bf5de433..0dc442b921 100644
--- a/drivers/core/Kconfig
+++ b/drivers/core/Kconfig
@@ -1,7 +1,7 @@
menu "Generic Driver Options"
config DM
- bool "Enable Driver Model"
+ def_bool y
help
This config option enables Driver Model. This brings in the core
support, including scanning of platform data on start-up. If
diff --git a/drivers/core/regmap.c b/drivers/core/regmap.c
index 5ccbf9abb8..e33bb9d798 100644
--- a/drivers/core/regmap.c
+++ b/drivers/core/regmap.c
@@ -4,6 +4,8 @@
* Written by Simon Glass <sjg@chromium.org>
*/
+#define LOG_CATEGORY LOGC_DM
+
#include <common.h>
#include <dm.h>
#include <errno.h>
@@ -37,6 +39,22 @@ struct regmap_field {
DECLARE_GLOBAL_DATA_PTR;
/**
+ * do_range_check() - Control whether range checks are done
+ *
+ * Returns: true to do range checks, false to skip
+ *
+ * This is used to reduce code size on SPL where range checks are known not to
+ * be needed
+ *
+ * Add this to the top of the file to enable them: #define LOG_DEBUG
+ */
+static inline bool do_range_check(void)
+{
+ return _LOG_DEBUG || !IS_ENABLED(CONFIG_SPL);
+
+}
+
+/**
* regmap_alloc() - Allocate a regmap with a given number of ranges.
*
* @count: Number of ranges to be allocated for the regmap.
@@ -391,7 +409,7 @@ int regmap_raw_read_range(struct regmap *map, uint range_num, uint offset,
struct regmap_range *range;
void *ptr;
- if (range_num >= map->range_count) {
+ if (do_range_check() && range_num >= map->range_count) {
debug("%s: range index %d larger than range count\n",
__func__, range_num);
return -ERANGE;
@@ -399,7 +417,8 @@ int regmap_raw_read_range(struct regmap *map, uint range_num, uint offset,
range = &map->ranges[range_num];
offset <<= map->reg_offset_shift;
- if (offset + val_len > range->size || offset + val_len < offset) {
+ if (do_range_check() &&
+ (offset + val_len > range->size || offset + val_len < offset)) {
debug("%s: offset/size combination invalid\n", __func__);
return -ERANGE;
}
diff --git a/drivers/core/uclass.c b/drivers/core/uclass.c
index 08d9ed82de..b7d11bdd23 100644
--- a/drivers/core/uclass.c
+++ b/drivers/core/uclass.c
@@ -586,19 +586,6 @@ int uclass_first_device(enum uclass_id id, struct udevice **devp)
return uclass_get_device_tail(dev, ret, devp);
}
-int uclass_first_device_err(enum uclass_id id, struct udevice **devp)
-{
- int ret;
-
- ret = uclass_first_device(id, devp);
- if (ret)
- return ret;
- else if (!*devp)
- return -ENODEV;
-
- return 0;
-}
-
int uclass_next_device(struct udevice **devp)
{
struct udevice *dev = *devp;
@@ -611,11 +598,24 @@ int uclass_next_device(struct udevice **devp)
return uclass_get_device_tail(dev, ret, devp);
}
+int uclass_first_device_err(enum uclass_id id, struct udevice **devp)
+{
+ int ret;
+
+ ret = uclass_first_device_check(id, devp);
+ if (ret)
+ return ret;
+ else if (!*devp)
+ return -ENODEV;
+
+ return 0;
+}
+
int uclass_next_device_err(struct udevice **devp)
{
int ret;
- ret = uclass_next_device(devp);
+ ret = uclass_next_device_check(devp);
if (ret)
return ret;
else if (!*devp)
@@ -799,20 +799,18 @@ int uclass_pre_remove_device(struct udevice *dev)
int uclass_probe_all(enum uclass_id id)
{
struct udevice *dev;
- int ret;
+ int ret, err;
- ret = uclass_first_device(id, &dev);
- if (ret || !dev)
- return ret;
+ err = uclass_first_device_check(id, &dev);
/* Scanning uclass to probe all devices */
while (dev) {
- ret = uclass_next_device(&dev);
+ ret = uclass_next_device_check(&dev);
if (ret)
- return ret;
+ err = ret;
}
- return 0;
+ return err;
}
int uclass_id_count(enum uclass_id id)
diff --git a/drivers/cpu/cpu-uclass.c b/drivers/cpu/cpu-uclass.c
index 71e5900d70..a754832526 100644
--- a/drivers/cpu/cpu-uclass.c
+++ b/drivers/cpu/cpu-uclass.c
@@ -20,25 +20,13 @@ DECLARE_GLOBAL_DATA_PTR;
int cpu_probe_all(void)
{
- struct udevice *cpu;
- int ret;
+ int ret = uclass_probe_all(UCLASS_CPU);
- ret = uclass_first_device(UCLASS_CPU, &cpu);
if (ret) {
- debug("%s: No CPU found (err = %d)\n", __func__, ret);
- return ret;
- }
-
- while (cpu) {
- ret = uclass_next_device(&cpu);
- if (ret) {
- debug("%s: Error while probing CPU (err = %d)\n",
- __func__, ret);
- return ret;
- }
+ debug("%s: Error while probing CPUs (err = %d %s)\n",
+ __func__, ret, errno_str(ret));
}
-
- return 0;
+ return ret;
}
int cpu_is_current(struct udevice *cpu)
diff --git a/drivers/crypto/fsl/fsl_rsa.c b/drivers/crypto/fsl/fsl_rsa.c
index 897ee855ea..335b7fe25a 100644
--- a/drivers/crypto/fsl/fsl_rsa.c
+++ b/drivers/crypto/fsl/fsl_rsa.c
@@ -6,6 +6,7 @@
#include <config.h>
#include <common.h>
+#include <cpu_func.h>
#include <dm.h>
#include <log.h>
#include <asm/types.h>
@@ -36,12 +37,21 @@ int fsl_mod_exp(struct udevice *dev, const uint8_t *sig, uint32_t sig_len,
inline_cnstr_jobdesc_pkha_rsaexp(desc, &pkin, out, sig_len);
+ flush_dcache_range((ulong)sig, (ulong)sig + sig_len);
+ flush_dcache_range((ulong)prop->modulus, (ulong)(prop->modulus) + keylen);
+ flush_dcache_range((ulong)prop->public_exponent,
+ (ulong)(prop->public_exponent) + prop->exp_len);
+ flush_dcache_range((ulong)desc, (ulong)desc + (sizeof(uint32_t) * MAX_CAAM_DESCSIZE));
+ flush_dcache_range((ulong)out, (ulong)out + sig_len);
+
ret = run_descriptor_jr(desc);
if (ret) {
debug("%s: RSA failed to verify: %d\n", __func__, ret);
return -EFAULT;
}
+ invalidate_dcache_range((ulong)out, (ulong)out + sig_len);
+
return 0;
}
diff --git a/drivers/ddr/imx/imx8m/ddr_init.c b/drivers/ddr/imx/imx8m/ddr_init.c
index d964184ddc..52a4aa6323 100644
--- a/drivers/ddr/imx/imx8m/ddr_init.c
+++ b/drivers/ddr/imx/imx8m/ddr_init.c
@@ -134,8 +134,14 @@ unsigned int lpddr4_mr_read(unsigned int mr_rank, unsigned int mr_addr)
tmp = reg32_read(DRC_PERF_MON_MRR0_DAT(0));
} while ((tmp & 0x8) == 0);
tmp = reg32_read(DRC_PERF_MON_MRR1_DAT(0));
- tmp = tmp & 0xff;
reg32_write(DRC_PERF_MON_MRR0_DAT(0), 0x4);
+ while (tmp) { //try to find a significant byte in the word
+ if (tmp & 0xff) {
+ tmp &= 0xff;
+ break;
+ }
+ tmp >>= 8;
+ }
return tmp;
}
diff --git a/drivers/dma/dma-uclass.c b/drivers/dma/dma-uclass.c
index 012609bb53..81dbb4da10 100644
--- a/drivers/dma/dma-uclass.c
+++ b/drivers/dma/dma-uclass.c
@@ -19,6 +19,7 @@
#include <asm/cache.h>
#include <dm/read.h>
#include <dma-uclass.h>
+#include <linux/dma-mapping.h>
#include <dt-structs.h>
#include <errno.h>
@@ -235,6 +236,8 @@ int dma_memcpy(void *dst, void *src, size_t len)
{
struct udevice *dev;
const struct dma_ops *ops;
+ dma_addr_t destination;
+ dma_addr_t source;
int ret;
ret = dma_get_device(DMA_SUPPORTS_MEM_TO_MEM, &dev);
@@ -245,11 +248,17 @@ int dma_memcpy(void *dst, void *src, size_t len)
if (!ops->transfer)
return -ENOSYS;
- /* Invalidate the area, so no writeback into the RAM races with DMA */
- invalidate_dcache_range((unsigned long)dst, (unsigned long)dst +
- roundup(len, ARCH_DMA_MINALIGN));
+ /* Clean the areas, so no writeback into the RAM races with DMA */
+ destination = dma_map_single(dst, len, DMA_FROM_DEVICE);
+ source = dma_map_single(src, len, DMA_TO_DEVICE);
- return ops->transfer(dev, DMA_MEM_TO_MEM, dst, src, len);
+ ret = ops->transfer(dev, DMA_MEM_TO_MEM, destination, source, len);
+
+ /* Clean+Invalidate the areas after, so we can see DMA'd data */
+ dma_unmap_single(destination, len, DMA_FROM_DEVICE);
+ dma_unmap_single(source, len, DMA_TO_DEVICE);
+
+ return ret;
}
UCLASS_DRIVER(dma) = {
diff --git a/drivers/dma/sandbox-dma-test.c b/drivers/dma/sandbox-dma-test.c
index aebf3eef96..2b8259a35b 100644
--- a/drivers/dma/sandbox-dma-test.c
+++ b/drivers/dma/sandbox-dma-test.c
@@ -39,9 +39,9 @@ struct sandbox_dma_dev {
};
static int sandbox_dma_transfer(struct udevice *dev, int direction,
- void *dst, void *src, size_t len)
+ dma_addr_t dst, dma_addr_t src, size_t len)
{
- memcpy(dst, src, len);
+ memcpy((void *)dst, (void *)src, len);
return 0;
}
diff --git a/drivers/dma/ti-edma3.c b/drivers/dma/ti-edma3.c
index ec3dc62d2f..1ad3b92dbf 100644
--- a/drivers/dma/ti-edma3.c
+++ b/drivers/dma/ti-edma3.c
@@ -13,6 +13,7 @@
#include <common.h>
#include <dm.h>
#include <dma-uclass.h>
+#include <linux/dma-mapping.h>
#include <asm/omap_common.h>
#include <asm/ti-common/ti-edma3.h>
@@ -395,7 +396,7 @@ void qedma3_stop(u32 base, struct edma3_channel_config *cfg)
}
void __edma3_transfer(unsigned long edma3_base_addr, unsigned int edma_slot_num,
- void *dst, void *src, size_t len, size_t s_len)
+ dma_addr_t dst, dma_addr_t src, size_t len, size_t s_len)
{
struct edma3_slot_config slot;
struct edma3_channel_config edma_channel;
@@ -483,12 +484,14 @@ void __edma3_transfer(unsigned long edma3_base_addr, unsigned int edma_slot_num,
}
void __edma3_fill(unsigned long edma3_base_addr, unsigned int edma_slot_num,
- void *dst, u8 val, size_t len)
+ dma_addr_t dst, u8 val, size_t len)
{
int xfer_len;
int max_xfer = EDMA_FILL_BUFFER_SIZE * 65535;
+ dma_addr_t source;
memset((void *)edma_fill_buffer, val, sizeof(edma_fill_buffer));
+ source = dma_map_single(edma_fill_buffer, len, DMA_TO_DEVICE);
while (len) {
xfer_len = len;
@@ -496,11 +499,13 @@ void __edma3_fill(unsigned long edma3_base_addr, unsigned int edma_slot_num,
xfer_len = max_xfer;
__edma3_transfer(edma3_base_addr, edma_slot_num, dst,
- edma_fill_buffer, xfer_len,
+ source, xfer_len,
EDMA_FILL_BUFFER_SIZE);
len -= xfer_len;
dst += xfer_len;
}
+
+ dma_unmap_single(source, len, DMA_FROM_DEVICE);
}
#ifndef CONFIG_DMA
@@ -508,19 +513,33 @@ void __edma3_fill(unsigned long edma3_base_addr, unsigned int edma_slot_num,
void edma3_transfer(unsigned long edma3_base_addr, unsigned int edma_slot_num,
void *dst, void *src, size_t len)
{
- __edma3_transfer(edma3_base_addr, edma_slot_num, dst, src, len, len);
+ /* Clean the areas, so no writeback into the RAM races with DMA */
+ dma_addr_t destination = dma_map_single(dst, len, DMA_FROM_DEVICE);
+ dma_addr_t source = dma_map_single(src, len, DMA_TO_DEVICE);
+
+ __edma3_transfer(edma3_base_addr, edma_slot_num, destination, source, len, len);
+
+ /* Clean+Invalidate the areas after, so we can see DMA'd data */
+ dma_unmap_single(destination, len, DMA_FROM_DEVICE);
+ dma_unmap_single(source, len, DMA_TO_DEVICE);
}
void edma3_fill(unsigned long edma3_base_addr, unsigned int edma_slot_num,
void *dst, u8 val, size_t len)
{
- __edma3_fill(edma3_base_addr, edma_slot_num, dst, val, len);
+ /* Clean the area, so no writeback into the RAM races with DMA */
+ dma_addr_t destination = dma_map_single(dst, len, DMA_FROM_DEVICE);
+
+ __edma3_fill(edma3_base_addr, edma_slot_num, destination, val, len);
+
+ /* Clean+Invalidate the area after, so we can see DMA'd data */
+ dma_unmap_single(destination, len, DMA_FROM_DEVICE);
}
#else
-static int ti_edma3_transfer(struct udevice *dev, int direction, void *dst,
- void *src, size_t len)
+static int ti_edma3_transfer(struct udevice *dev, int direction,
+ dma_addr_t dst, dma_addr_t src, size_t len)
{
struct ti_edma3_priv *priv = dev_get_priv(dev);
diff --git a/drivers/dma/ti/k3-udma.c b/drivers/dma/ti/k3-udma.c
index 1a9197bfc8..d92b964436 100644
--- a/drivers/dma/ti/k3-udma.c
+++ b/drivers/dma/ti/k3-udma.c
@@ -2305,7 +2305,7 @@ err_res_free:
}
static int udma_transfer(struct udevice *dev, int direction,
- void *dst, void *src, size_t len)
+ dma_addr_t dst, dma_addr_t src, size_t len)
{
struct udma_dev *ud = dev_get_priv(dev);
/* Channel0 is reserved for memcpy */
@@ -2326,7 +2326,7 @@ static int udma_transfer(struct udevice *dev, int direction,
if (ret)
return ret;
- udma_prep_dma_memcpy(uc, (dma_addr_t)dst, (dma_addr_t)src, len);
+ udma_prep_dma_memcpy(uc, dst, src, len);
udma_start(uc);
udma_poll_completion(uc, &paddr);
udma_stop(uc);
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 2a60478b47..220e2cb162 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -611,4 +611,10 @@ config FTGPIO010
help
Support for GPIOs on Faraday Technology's FTGPIO010 controller.
+config ADP5585_GPIO
+ bool "ADP5585 GPIO driver"
+ depends on DM_GPIO && DM_I2C
+ help
+ Support ADP5585 GPIO expander.
+
endif
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index eee7908871..7235714fcc 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -76,3 +76,4 @@ obj-$(CONFIG_ZYNQMP_GPIO_MODEPIN) += zynqmp_gpio_modepin.o
obj-$(CONFIG_SLG7XL45106_I2C_GPO) += gpio_slg7xl45106.o
obj-$(CONFIG_$(SPL_TPL_)TURRIS_OMNIA_MCU) += turris_omnia_mcu.o
obj-$(CONFIG_FTGPIO010) += ftgpio010.o
+obj-$(CONFIG_ADP5585_GPIO) += adp5585_gpio.o
diff --git a/drivers/gpio/adp5585_gpio.c b/drivers/gpio/adp5585_gpio.c
new file mode 100644
index 0000000000..ea0cb75459
--- /dev/null
+++ b/drivers/gpio/adp5585_gpio.c
@@ -0,0 +1,238 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2022 NXP
+ *
+ * ADP5585 I/O Expander Controller
+ *
+ * Author: Alice Guo <alice.guo@nxp.com>
+ */
+
+#include <asm/gpio.h>
+#include <dm.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <i2c.h>
+
+#define ADP5585_ID 0x00
+#define ADP5585_INT_STATUS 0x01
+#define ADP5585_STATUS 0x02
+#define ADP5585_FIFO_1 0x03
+#define ADP5585_FIFO_2 0x04
+#define ADP5585_FIFO_3 0x05
+#define ADP5585_FIFO_4 0x06
+#define ADP5585_FIFO_5 0x07
+#define ADP5585_FIFO_6 0x08
+#define ADP5585_FIFO_7 0x09
+#define ADP5585_FIFO_8 0x0A
+#define ADP5585_FIFO_9 0x0B
+#define ADP5585_FIFO_10 0x0C
+#define ADP5585_FIFO_11 0x0D
+#define ADP5585_FIFO_12 0x0E
+#define ADP5585_FIFO_13 0x0F
+#define ADP5585_FIFO_14 0x10
+#define ADP5585_FIFO_15 0x11
+#define ADP5585_FIFO_16 0x12
+#define ADP5585_GPI_INT_STAT_A 0x13
+#define ADP5585_GPI_INT_STAT_B 0x14
+#define ADP5585_GPI_STATUS_A 0x15
+#define ADP5585_GPI_STATUS_B 0x16
+#define ADP5585_RPULL_CONFIG_A 0x17
+#define ADP5585_RPULL_CONFIG_B 0x18
+#define ADP5585_RPULL_CONFIG_C 0x19
+#define ADP5585_RPULL_CONFIG_D 0x1A
+#define ADP5585_GPI_INT_LEVEL_A 0x1B
+#define ADP5585_GPI_INT_LEVEL_B 0x1C
+#define ADP5585_GPI_EVENT_EN_A 0x1D
+#define ADP5585_GPI_EVENT_EN_B 0x1E
+#define ADP5585_GPI_INTERRUPT_EN_A 0x1F
+#define ADP5585_GPI_INTERRUPT_EN_B 0x20
+#define ADP5585_DEBOUNCE_DIS_A 0x21
+#define ADP5585_DEBOUNCE_DIS_B 0x22
+#define ADP5585_GPO_DATA_OUT_A 0x23
+#define ADP5585_GPO_DATA_OUT_B 0x24
+#define ADP5585_GPO_OUT_MODE_A 0x25
+#define ADP5585_GPO_OUT_MODE_B 0x26
+#define ADP5585_GPIO_DIRECTION_A 0x27
+#define ADP5585_GPIO_DIRECTION_B 0x28
+#define ADP5585_RESET1_EVENT_A 0x29
+#define ADP5585_RESET1_EVENT_B 0x2A
+#define ADP5585_RESET1_EVENT_C 0x2B
+#define ADP5585_RESET2_EVENT_A 0x2C
+#define ADP5585_RESET2_EVENT_B 0x2D
+#define ADP5585_RESET_CFG 0x2E
+#define ADP5585_PWM_OFFT_LOW 0x2F
+#define ADP5585_PWM_OFFT_HIGH 0x30
+#define ADP5585_PWM_ONT_LOW 0x31
+#define ADP5585_PWM_ONT_HIGH 0x32
+#define ADP5585_PWM_CFG 0x33
+#define ADP5585_LOGIC_CFG 0x34
+#define ADP5585_LOGIC_FF_CFG 0x35
+#define ADP5585_LOGIC_INT_EVENT_EN 0x36
+#define ADP5585_POLL_PTIME_CFG 0x37
+#define ADP5585_PIN_CONFIG_A 0x38
+#define ADP5585_PIN_CONFIG_B 0x39
+#define ADP5585_PIN_CONFIG_D 0x3A
+#define ADP5585_GENERAL_CFG 0x3B
+#define ADP5585_INT_EN 0x3C
+
+#define ADP5585_MAXGPIO 10
+#define ADP5585_BANK(offs) ((offs) > 4)
+#define ADP5585_BIT(offs) ((offs) > 4 ? \
+ 1u << ((offs) - 5) : 1u << (offs))
+
+struct adp5585_plat {
+ fdt_addr_t addr;
+ u8 id;
+ u8 dat_out[2];
+ u8 dir[2];
+};
+
+static int adp5585_direction_input(struct udevice *dev, unsigned int offset)
+{
+ int ret;
+ unsigned int bank;
+ struct adp5585_plat *plat = dev_get_plat(dev);
+
+ bank = ADP5585_BANK(offset);
+
+ plat->dir[bank] &= ~ADP5585_BIT(offset);
+ ret = dm_i2c_write(dev, ADP5585_GPIO_DIRECTION_A + bank, &plat->dir[bank], 1);
+
+ return ret;
+}
+
+static int adp5585_direction_output(struct udevice *dev, unsigned int offset,
+ int value)
+{
+ int ret;
+ unsigned int bank, bit;
+ struct adp5585_plat *plat = dev_get_plat(dev);
+
+ bank = ADP5585_BANK(offset);
+ bit = ADP5585_BIT(offset);
+
+ plat->dir[bank] |= bit;
+
+ if (value)
+ plat->dat_out[bank] |= bit;
+ else
+ plat->dat_out[bank] &= ~bit;
+
+ ret = dm_i2c_write(dev, ADP5585_GPO_DATA_OUT_A + bank, &plat->dat_out[bank], 1);
+ ret |= dm_i2c_write(dev, ADP5585_GPIO_DIRECTION_A + bank, &plat->dir[bank], 1);
+
+ return ret;
+}
+
+static int adp5585_get_value(struct udevice *dev, unsigned int offset)
+{
+ struct adp5585_plat *plat = dev_get_plat(dev);
+ unsigned int bank = ADP5585_BANK(offset);
+ unsigned int bit = ADP5585_BIT(offset);
+ u8 val;
+
+ if (plat->dir[bank] & bit)
+ val = plat->dat_out[bank];
+ else
+ dm_i2c_read(dev, ADP5585_GPI_STATUS_A + bank, &val, 1);
+
+ return !!(val & bit);
+}
+
+static int adp5585_set_value(struct udevice *dev, unsigned int offset, int value)
+{
+ int ret;
+ unsigned int bank, bit;
+ struct adp5585_plat *plat = dev_get_plat(dev);
+
+ bank = ADP5585_BANK(offset);
+ bit = ADP5585_BIT(offset);
+
+ if (value)
+ plat->dat_out[bank] |= bit;
+ else
+ plat->dat_out[bank] &= ~bit;
+
+ ret = dm_i2c_write(dev, ADP5585_GPO_DATA_OUT_A + bank, &plat->dat_out[bank], 1);
+
+ return ret;
+}
+
+static int adp5585_get_function(struct udevice *dev, unsigned int offset)
+{
+ unsigned int bank, bit, dir;
+ struct adp5585_plat *plat = dev_get_plat(dev);
+
+ bank = ADP5585_BANK(offset);
+ bit = ADP5585_BIT(offset);
+ dir = plat->dir[bank] & bit;
+
+ if (!dir)
+ return GPIOF_INPUT;
+ else
+ return GPIOF_OUTPUT;
+}
+
+static int adp5585_xlate(struct udevice *dev, struct gpio_desc *desc,
+ struct ofnode_phandle_args *args)
+{
+ desc->offset = args->args[0];
+ desc->flags = args->args[1] & GPIO_ACTIVE_LOW ? GPIOD_ACTIVE_LOW : 0;
+
+ return 0;
+}
+
+static const struct dm_gpio_ops adp5585_ops = {
+ .direction_input = adp5585_direction_input,
+ .direction_output = adp5585_direction_output,
+ .get_value = adp5585_get_value,
+ .set_value = adp5585_set_value,
+ .get_function = adp5585_get_function,
+ .xlate = adp5585_xlate,
+};
+
+static int adp5585_probe(struct udevice *dev)
+{
+ struct adp5585_plat *plat = dev_get_plat(dev);
+ struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
+ int ret;
+
+ if (!plat)
+ return 0;
+
+ plat->addr = dev_read_addr(dev);
+ if (plat->addr == FDT_ADDR_T_NONE)
+ return -EINVAL;
+
+ ret = dm_i2c_read(dev, ADP5585_ID, &plat->id, 1);
+ if (ret < 0)
+ return ret;
+
+ uc_priv->gpio_count = ADP5585_MAXGPIO;
+ uc_priv->bank_name = "adp5585-gpio";
+
+ for (int i = 0; i < 2; i++) {
+ ret = dm_i2c_read(dev, ADP5585_GPO_DATA_OUT_A + i, &plat->dat_out[i], 1);
+ if (ret)
+ return ret;
+
+ ret = dm_i2c_read(dev, ADP5585_GPIO_DIRECTION_A + i, &plat->dir[i], 1);
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
+
+static const struct udevice_id adp5585_ids[] = {
+ { .compatible = "adp5585" },
+ { }
+};
+
+U_BOOT_DRIVER(adp5585) = {
+ .name = "adp5585",
+ .id = UCLASS_GPIO,
+ .of_match = adp5585_ids,
+ .probe = adp5585_probe,
+ .ops = &adp5585_ops,
+ .plat_auto = sizeof(struct adp5585_plat),
+};
diff --git a/drivers/input/Kconfig b/drivers/input/Kconfig
index 2718b3674a..1c534be005 100644
--- a/drivers/input/Kconfig
+++ b/drivers/input/Kconfig
@@ -38,15 +38,6 @@ config TPL_DM_KEYBOARD
includes methods to start/stop the device, check for available
input and update LEDs if the keyboard has them.
-config KEYBOARD
- bool "Enable legacy keyboard support (deprecated)"
- help
- Enable this to enable a custom keyboard support.
- This simply calls drv_keyboard_init() which must be
- defined in your board-specific files. This option is deprecated
- and is only used by novena. For new boards, use driver model
- instead.
-
config APPLE_SPI_KEYB
bool "Enable Apple SPI keyboard support"
depends on DM_KEYBOARD && DM_SPI
diff --git a/drivers/input/Makefile b/drivers/input/Makefile
index b1133f772f..ded76bddb2 100644
--- a/drivers/input/Makefile
+++ b/drivers/input/Makefile
@@ -3,7 +3,6 @@
# (C) Copyright 2000-2007
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-obj-$(CONFIG_KEYBOARD) += input.o
obj-$(CONFIG_$(SPL_TPL_)CROS_EC_KEYB) += cros_ec_keyb.o
obj-$(CONFIG_$(SPL_TPL_)OF_CONTROL) += key_matrix.o
obj-$(CONFIG_$(SPL_TPL_)DM_KEYBOARD) += input.o keyboard-uclass.o
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
index f799f70e43..56f42820c7 100644
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@@ -576,12 +576,12 @@ config MMC_SDHCI_IPROC
If unsure, say N.
config MMC_SDHCI_F_SDH30
- bool "SDHCI support for Fujitsu Semiconductor F_SDH30"
+ bool "SDHCI support for Fujitsu Semiconductor/Socionext F_SDH30"
depends on BLK && DM_MMC
depends on MMC_SDHCI
help
This selects the Secure Digital Host Controller Interface (SDHCI)
- Needed by some Fujitsu SoC for MMC / SD / SDIO support.
+ Needed by some Fujitsu/Socionext SoC for MMC / SD / SDIO support.
If you have a controller with this interface, say Y or M here.
If unsure, say N.
diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index 4232c5eb8c..5085a3b491 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -168,7 +168,8 @@ static int dwmci_data_transfer(struct dwmci_host *host, struct mmc_data *data)
if (data->flags == MMC_DATA_READ &&
(mask & (DWMCI_INTMSK_RXDR | DWMCI_INTMSK_DTO))) {
dwmci_writel(host, DWMCI_RINTSTS,
- DWMCI_INTMSK_RXDR | DWMCI_INTMSK_DTO);
+ mask & (DWMCI_INTMSK_RXDR |
+ DWMCI_INTMSK_DTO));
while (size) {
ret = dwmci_fifo_ready(host,
DWMCI_FIFO_EMPTY,
diff --git a/drivers/mmc/f_sdh30.c b/drivers/mmc/f_sdh30.c
index 3a85d9e348..3d587a464d 100644
--- a/drivers/mmc/f_sdh30.c
+++ b/drivers/mmc/f_sdh30.c
@@ -11,13 +11,48 @@
#include <malloc.h>
#include <sdhci.h>
+#define F_SDH30_ESD_CONTROL 0x124
+#define F_SDH30_CMD_DAT_DELAY BIT(9)
+
+#define F_SDH30_TEST 0x158
+#define F_SDH30_FORCE_CARD_INSERT BIT(6)
+
+struct f_sdh30_data {
+ void (*init)(struct udevice *dev);
+ u32 quirks;
+};
+
struct f_sdh30_plat {
struct mmc_config cfg;
struct mmc mmc;
+
+ bool enable_cmd_dat_delay;
+ const struct f_sdh30_data *data;
};
DECLARE_GLOBAL_DATA_PTR;
+static void f_sdh30_e51_init(struct udevice *dev)
+{
+ struct f_sdh30_plat *plat = dev_get_plat(dev);
+ struct sdhci_host *host = dev_get_priv(dev);
+ u32 val;
+
+ val = sdhci_readl(host, F_SDH30_ESD_CONTROL);
+ if (plat->enable_cmd_dat_delay)
+ val |= F_SDH30_CMD_DAT_DELAY;
+ else
+ val &= ~F_SDH30_CMD_DAT_DELAY;
+ sdhci_writel(host, val, F_SDH30_ESD_CONTROL);
+
+ val = sdhci_readl(host, F_SDH30_TEST);
+ if (plat->cfg.host_caps & MMC_CAP_NONREMOVABLE)
+ val |= F_SDH30_FORCE_CARD_INSERT;
+ else
+ val &= ~F_SDH30_FORCE_CARD_INSERT;
+ sdhci_writel(host, val, F_SDH30_TEST);
+}
+
static int f_sdh30_sdhci_probe(struct udevice *dev)
{
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
@@ -25,6 +60,8 @@ static int f_sdh30_sdhci_probe(struct udevice *dev)
struct sdhci_host *host = dev_get_priv(dev);
int ret;
+ plat->data = (const struct f_sdh30_data *)dev_get_driver_data(dev);
+
ret = mmc_of_parse(dev, &plat->cfg);
if (ret)
return ret;
@@ -33,6 +70,9 @@ static int f_sdh30_sdhci_probe(struct udevice *dev)
host->mmc->dev = dev;
host->mmc->priv = host;
+ if (plat->data && plat->data->quirks)
+ host->quirks = plat->data->quirks;
+
ret = sdhci_setup_cfg(&plat->cfg, host, 200000000, 400000);
if (ret)
return ret;
@@ -41,18 +81,29 @@ static int f_sdh30_sdhci_probe(struct udevice *dev)
mmc_set_clock(host->mmc, host->mmc->cfg->f_min, MMC_CLK_ENABLE);
- return sdhci_probe(dev);
+ ret = sdhci_probe(dev);
+ if (ret)
+ return ret;
+
+ if (plat->data && plat->data->init)
+ plat->data->init(dev);
+
+ return 0;
}
static int f_sdh30_of_to_plat(struct udevice *dev)
{
struct sdhci_host *host = dev_get_priv(dev);
+ struct f_sdh30_plat *plat = dev_get_plat(dev);
host->name = strdup(dev->name);
host->ioaddr = dev_read_addr_ptr(dev);
host->bus_width = dev_read_u32_default(dev, "bus-width", 4);
host->index = dev_read_u32_default(dev, "index", 0);
+ plat->enable_cmd_dat_delay =
+ dev_read_bool(dev, "socionext,enable-cmd-dat-delay");
+
return 0;
}
@@ -63,8 +114,19 @@ static int f_sdh30_bind(struct udevice *dev)
return sdhci_bind(dev, &plat->mmc, &plat->cfg);
}
+static const struct f_sdh30_data f_sdh30_e51_data = {
+ .init = f_sdh30_e51_init,
+ .quirks = SDHCI_QUIRK_WAIT_SEND_CMD | SDHCI_QUIRK_SUPPORT_SINGLE,
+};
+
static const struct udevice_id f_sdh30_mmc_ids[] = {
- { .compatible = "fujitsu,mb86s70-sdhci-3.0" },
+ {
+ .compatible = "fujitsu,mb86s70-sdhci-3.0",
+ },
+ {
+ .compatible = "socionext,f-sdh30-e51-mmc",
+ .data = (ulong)&f_sdh30_e51_data,
+ },
{ }
};
diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c
index 9befb190bd..92b152fc97 100644
--- a/drivers/mmc/fsl_esdhc_imx.c
+++ b/drivers/mmc/fsl_esdhc_imx.c
@@ -1519,8 +1519,6 @@ static int fsl_esdhc_probe(struct udevice *dev)
* work as expected.
*/
- init_clk_usdhc(dev_seq(dev));
-
#if CONFIG_IS_ENABLED(CLK)
/* Assigned clock already set clock */
ret = clk_get_by_name(dev, "per", &priv->per_clk);
@@ -1536,6 +1534,8 @@ static int fsl_esdhc_probe(struct udevice *dev)
priv->sdhc_clk = clk_get_rate(&priv->per_clk);
#else
+ init_clk_usdhc(dev_seq(dev));
+
priv->sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK + dev_seq(dev));
if (priv->sdhc_clk <= 0) {
dev_err(dev, "Unable to get clk for %s\n", dev->name);
diff --git a/drivers/mmc/ftsdc010_mci.c b/drivers/mmc/ftsdc010_mci.c
index 570d54cf9d..cabb747fbb 100644
--- a/drivers/mmc/ftsdc010_mci.c
+++ b/drivers/mmc/ftsdc010_mci.c
@@ -30,7 +30,7 @@
#include <syscon.h>
#include <linux/err.h>
-#define CFG_CMD_TIMEOUT (CONFIG_SYS_HZ >> 4) /* 250 ms */
+#define CFG_CMD_TIMEOUT (CONFIG_SYS_HZ >> 2) /* 250 ms */
#define CFG_RST_TIMEOUT CONFIG_SYS_HZ /* 1 sec reset timeout */
#if CONFIG_IS_ENABLED(OF_PLATDATA)
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 0b7c0be8cb..210703ea46 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -3113,10 +3113,12 @@ int mmc_init_device(int num)
}
m = mmc_get_mmc_dev(dev);
- m->user_speed_mode = MMC_MODES_END; /* Initialising user set speed mode */
-
if (!m)
return 0;
+
+ /* Initialising user set speed mode */
+ m->user_speed_mode = MMC_MODES_END;
+
if (m->preinit)
mmc_start_init(m);
diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c
index b2f4a4e721..a2595d19e7 100644
--- a/drivers/mmc/omap_hsmmc.c
+++ b/drivers/mmc/omap_hsmmc.c
@@ -644,7 +644,7 @@ static int omap_hsmmc_execute_tuning(struct udevice *dev, uint opcode)
((mmc->selected_mode == UHS_SDR50) && (val & CAPA2_TSDR50))))
return 0;
- ret = uclass_first_device(UCLASS_THERMAL, &thermal_dev);
+ ret = uclass_first_device_err(UCLASS_THERMAL, &thermal_dev);
if (ret) {
printf("Couldn't get thermal device for tuning\n");
return ret;
diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index bf989a594f..a80ad8329a 100644
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -211,7 +211,7 @@ static int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd,
unsigned int stat = 0;
int ret = 0;
int trans_bytes = 0, is_aligned = 1;
- u32 mask, flags, mode;
+ u32 mask, flags, mode = 0;
unsigned int time = 0;
int mmc_dev = mmc_get_blk_desc(mmc)->devnum;
ulong start = get_timer(0);
@@ -273,10 +273,12 @@ static int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd,
/* Set Transfer mode regarding to data flag */
if (data) {
sdhci_writeb(host, 0xe, SDHCI_TIMEOUT_CONTROL);
- mode = SDHCI_TRNS_BLK_CNT_EN;
+
+ if (!(host->quirks & SDHCI_QUIRK_SUPPORT_SINGLE))
+ mode = SDHCI_TRNS_BLK_CNT_EN;
trans_bytes = data->blocks * data->blocksize;
if (data->blocks > 1)
- mode |= SDHCI_TRNS_MULTI;
+ mode |= SDHCI_TRNS_MULTI | SDHCI_TRNS_BLK_CNT_EN;
if (data->flags == MMC_DATA_READ)
mode |= SDHCI_TRNS_READ;
diff --git a/drivers/mmc/stm32_sdmmc2.c b/drivers/mmc/stm32_sdmmc2.c
index 7ab4d949e7..b68594de37 100644
--- a/drivers/mmc/stm32_sdmmc2.c
+++ b/drivers/mmc/stm32_sdmmc2.c
@@ -25,6 +25,7 @@
#include <asm/io.h>
#include <asm/gpio.h>
#include <linux/iopoll.h>
+#include <power/regulator.h>
#include <watchdog.h>
struct stm32_sdmmc2_plat {
@@ -36,6 +37,9 @@ struct stm32_sdmmc2_plat {
struct gpio_desc cd_gpio;
u32 clk_reg_msk;
u32 pwr_reg_msk;
+#if CONFIG_IS_ENABLED(DM_REGULATOR)
+ bool vqmmc_enabled;
+#endif
};
struct stm32_sdmmc2_ctx {
@@ -572,6 +576,15 @@ static void stm32_sdmmc2_pwron(struct stm32_sdmmc2_plat *plat)
plat->base + SDMMC_POWER);
/* during the first 74 SDMMC_CK cycles the SDMMC is still disabled. */
+
+#if CONFIG_IS_ENABLED(DM_REGULATOR)
+ if (plat->mmc.vqmmc_supply && !plat->vqmmc_enabled) {
+ if (regulator_set_enable_if_allowed(plat->mmc.vqmmc_supply, true))
+ dev_dbg(plat->mmc.dev, "failed to enable vqmmc-supply\n");
+ else
+ plat->vqmmc_enabled = true;
+ }
+#endif
}
#define IS_RISING_EDGE(reg) (reg & SDMMC_CLKCR_NEGEDGE ? 0 : 1)
@@ -598,13 +611,16 @@ static int stm32_sdmmc2_set_ios(struct udevice *dev)
* clk_div > 0 and NEGEDGE = 1 => command and data generated on
* SDMMCCLK falling edge
*/
- if (desired && ((sys_clock > desired) ||
+ if (desired && (sys_clock > desired || mmc->ddr_mode ||
IS_RISING_EDGE(plat->clk_reg_msk))) {
clk = DIV_ROUND_UP(sys_clock, 2 * desired);
if (clk > SDMMC_CLKCR_CLKDIV_MAX)
clk = SDMMC_CLKCR_CLKDIV_MAX;
}
+ if (mmc->ddr_mode)
+ clk |= SDMMC_CLKCR_DDR;
+
if (mmc->bus_width == 4)
clk |= SDMMC_CLKCR_WIDBUS_4;
if (mmc->bus_width == 8)
@@ -672,6 +688,8 @@ static int stm32_sdmmc2_of_to_plat(struct udevice *dev)
if (ret)
return ret;
+ cfg->host_caps &= ~(UHS_CAPS | MMC_MODE_HS200 | MMC_MODE_HS400 | MMC_MODE_HS400_ES);
+
ret = clk_get_by_index(dev, 0, &plat->clk);
if (ret)
return ret;
diff --git a/drivers/net/ftgmac100.c b/drivers/net/ftgmac100.c
index 74261d14e5..a50cde338a 100644
--- a/drivers/net/ftgmac100.c
+++ b/drivers/net/ftgmac100.c
@@ -188,7 +188,7 @@ static int ftgmac100_phy_adjust_link(struct ftgmac100_data *priv)
struct phy_device *phydev = priv->phydev;
u32 maccr;
- if (!phydev->link) {
+ if (!phydev->link && priv->phy_mode != PHY_INTERFACE_MODE_NCSI) {
dev_err(phydev->dev, "No link\n");
return -EREMOTEIO;
}
@@ -228,7 +228,8 @@ static int ftgmac100_phy_init(struct udevice *dev)
if (!phydev)
return -ENODEV;
- phydev->supported &= PHY_GBIT_FEATURES;
+ if (priv->phy_mode != PHY_INTERFACE_MODE_NCSI)
+ phydev->supported &= PHY_GBIT_FEATURES;
if (priv->max_speed) {
ret = phy_set_supported(phydev, priv->max_speed);
if (ret)
@@ -308,7 +309,8 @@ static void ftgmac100_stop(struct udevice *dev)
writel(0, &ftgmac100->maccr);
- phy_shutdown(priv->phydev);
+ if (priv->phy_mode != PHY_INTERFACE_MODE_NCSI)
+ phy_shutdown(priv->phydev);
}
static int ftgmac100_start(struct udevice *dev)
@@ -580,6 +582,9 @@ static int ftgmac100_probe(struct udevice *dev)
priv->max_speed = pdata->max_speed;
priv->phy_addr = 0;
+ if (dev_read_bool(dev, "use-ncsi"))
+ priv->phy_mode = PHY_INTERFACE_MODE_NCSI;
+
#ifdef CONFIG_PHY_ADDR
priv->phy_addr = CONFIG_PHY_ADDR;
#endif
@@ -592,7 +597,8 @@ static int ftgmac100_probe(struct udevice *dev)
* If DM MDIO is enabled, the MDIO bus will be initialized later in
* dm_eth_phy_connect
*/
- if (!IS_ENABLED(CONFIG_DM_MDIO)) {
+ if (priv->phy_mode != PHY_INTERFACE_MODE_NCSI &&
+ !IS_ENABLED(CONFIG_DM_MDIO)) {
ret = ftgmac100_mdio_init(dev);
if (ret) {
dev_err(dev, "Failed to initialize mdiobus: %d\n", ret);
diff --git a/drivers/net/phy/ncsi.c b/drivers/net/phy/ncsi.c
index bf1e832be9..bb7ecebed3 100644
--- a/drivers/net/phy/ncsi.c
+++ b/drivers/net/phy/ncsi.c
@@ -9,6 +9,7 @@
#include <log.h>
#include <malloc.h>
#include <phy.h>
+#include <net.h>
#include <net/ncsi.h>
#include <net/ncsi-pkt.h>
#include <asm/unaligned.h>
diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
index 0350afdd1b..9087663053 100644
--- a/drivers/net/phy/phy.c
+++ b/drivers/net/phy/phy.c
@@ -1026,7 +1026,7 @@ struct phy_device *phy_connect(struct mii_dev *bus, int addr,
#endif
#ifdef CONFIG_PHY_NCSI
- if (!phydev)
+ if (!phydev && interface == PHY_INTERFACE_MODE_NCSI)
phydev = phy_device_create(bus, 0, PHY_NCSI_ID, false);
#endif
@@ -1275,3 +1275,10 @@ int phy_clear_bits_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val
return 0;
}
+
+bool phy_interface_is_ncsi(void)
+{
+ struct eth_pdata *pdata = dev_get_plat(eth_get_dev());
+
+ return pdata->phy_interface == PHY_INTERFACE_MODE_NCSI;
+}
diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
index 058b2f6359..5cff81ac44 100644
--- a/drivers/pci/pci-uclass.c
+++ b/drivers/pci/pci-uclass.c
@@ -1217,7 +1217,7 @@ static int skip_to_next_device(struct udevice *bus, struct udevice **devp)
* Scan through all the PCI controllers. On x86 there will only be one
* but that is not necessarily true on other hardware.
*/
- do {
+ while (bus) {
device_find_first_child(bus, &dev);
if (dev) {
*devp = dev;
@@ -1226,7 +1226,7 @@ static int skip_to_next_device(struct udevice *bus, struct udevice **devp)
ret = uclass_next_device(&bus);
if (ret)
return ret;
- } while (bus);
+ }
return 0;
}
diff --git a/drivers/phy/ti/phy-j721e-wiz.c b/drivers/phy/ti/phy-j721e-wiz.c
index fb6b6cf3ff..6646b15d41 100644
--- a/drivers/phy/ti/phy-j721e-wiz.c
+++ b/drivers/phy/ti/phy-j721e-wiz.c
@@ -69,14 +69,20 @@ static const struct reg_field por_en = REG_FIELD(WIZ_SERDES_CTRL, 31, 31);
static const struct reg_field phy_reset_n = REG_FIELD(WIZ_SERDES_RST, 31, 31);
static const struct reg_field pll1_refclk_mux_sel =
REG_FIELD(WIZ_SERDES_RST, 29, 29);
+static const struct reg_field pll1_refclk_mux_sel_2 =
+ REG_FIELD(WIZ_SERDES_RST, 22, 23);
static const struct reg_field pll0_refclk_mux_sel =
REG_FIELD(WIZ_SERDES_RST, 28, 28);
+static const struct reg_field pll0_refclk_mux_sel_2 =
+ REG_FIELD(WIZ_SERDES_RST, 28, 29);
static const struct reg_field refclk_dig_sel_16g =
REG_FIELD(WIZ_SERDES_RST, 24, 25);
static const struct reg_field refclk_dig_sel_10g =
REG_FIELD(WIZ_SERDES_RST, 24, 24);
static const struct reg_field pma_cmn_refclk_int_mode =
REG_FIELD(WIZ_SERDES_TOP_CTRL, 28, 29);
+static const struct reg_field pma_cmn_refclk1_int_mode =
+ REG_FIELD(WIZ_SERDES_TOP_CTRL, 20, 21);
static const struct reg_field pma_cmn_refclk_mode =
REG_FIELD(WIZ_SERDES_TOP_CTRL, 30, 31);
static const struct reg_field pma_cmn_refclk_dig_div =
@@ -204,6 +210,27 @@ static struct wiz_clk_mux_sel clk_mux_sel_10g[] = {
},
};
+static const struct wiz_clk_mux_sel clk_mux_sel_10g_2_refclk[] = {
+ {
+ .num_parents = 3,
+ .parents = { WIZ_CORE_REFCLK, WIZ_CORE_REFCLK1, WIZ_EXT_REFCLK },
+ .table = { 2, 3, 0 },
+ .node_name = "pll0-refclk",
+ },
+ {
+ .num_parents = 3,
+ .parents = { WIZ_CORE_REFCLK, WIZ_CORE_REFCLK1, WIZ_EXT_REFCLK },
+ .table = { 2, 3, 0 },
+ .node_name = "pll1-refclk",
+ },
+ {
+ .num_parents = 3,
+ .parents = { WIZ_CORE_REFCLK, WIZ_CORE_REFCLK1, WIZ_EXT_REFCLK },
+ .table = { 2, 3, 0 },
+ .node_name = "refclk-dig",
+ },
+};
+
static struct wiz_clk_div_sel clk_div_sel[] = {
{
.div_sel = CMN_REFCLK,
@@ -219,6 +246,7 @@ enum wiz_type {
J721E_WIZ_16G,
J721E_WIZ_10G,
AM64_WIZ_10G,
+ J784S4_WIZ_10G,
};
struct wiz_data {
@@ -227,6 +255,7 @@ struct wiz_data {
const struct reg_field *pll1_refclk_mux_sel;
const struct reg_field *refclk_dig_sel;
const struct reg_field *pma_cmn_refclk1_dig_div;
+ const struct reg_field *pma_cmn_refclk1_int_mode;
const struct wiz_clk_mux_sel *clk_mux_sel;
unsigned int clk_div_sel_num;
};
@@ -259,6 +288,16 @@ static struct wiz_data am64_10g_data = {
.clk_div_sel_num = WIZ_DIV_NUM_CLOCKS_10G,
};
+static struct wiz_data j784s4_wiz_10g = {
+ .type = J784S4_WIZ_10G,
+ .pll0_refclk_mux_sel = &pll0_refclk_mux_sel_2,
+ .pll1_refclk_mux_sel = &pll1_refclk_mux_sel_2,
+ .refclk_dig_sel = &refclk_dig_sel_16g,
+ .pma_cmn_refclk1_int_mode = &pma_cmn_refclk1_int_mode,
+ .clk_mux_sel = clk_mux_sel_10g_2_refclk,
+ .clk_div_sel_num = WIZ_DIV_NUM_CLOCKS_10G,
+};
+
#define WIZ_TYPEC_DIR_DEBOUNCE_MIN 100 /* ms */
#define WIZ_TYPEC_DIR_DEBOUNCE_MAX 1000
@@ -279,6 +318,7 @@ struct wiz {
struct regmap_field *p_mac_div_sel1[WIZ_MAX_LANES];
struct regmap_field *p0_fullrt_div[WIZ_MAX_LANES];
struct regmap_field *pma_cmn_refclk_int_mode;
+ struct regmap_field *pma_cmn_refclk1_int_mode;
struct regmap_field *pma_cmn_refclk_mode;
struct regmap_field *pma_cmn_refclk_dig_div;
struct regmap_field *pma_cmn_refclk1_dig_div;
@@ -729,6 +769,15 @@ static int wiz_regfield_init(struct wiz *wiz)
return PTR_ERR(wiz->pma_cmn_refclk_int_mode);
}
+ if (data->pma_cmn_refclk1_int_mode) {
+ wiz->pma_cmn_refclk1_int_mode =
+ devm_regmap_field_alloc(dev, regmap, *data->pma_cmn_refclk1_int_mode);
+ if (IS_ERR(wiz->pma_cmn_refclk1_int_mode)) {
+ dev_err(dev, "PMA_CMN_REFCLK1_INT_MODE reg field init failed\n");
+ return PTR_ERR(wiz->pma_cmn_refclk1_int_mode);
+ }
+ }
+
wiz->pma_cmn_refclk_mode =
devm_regmap_field_alloc(dev, regmap, pma_cmn_refclk_mode);
if (IS_ERR(wiz->pma_cmn_refclk_mode)) {
@@ -844,8 +893,6 @@ static int wiz_clock_init(struct wiz *wiz)
return ret;
}
wiz->input_clks[WIZ_CORE_REFCLK] = clk;
- /* Initialize CORE_REFCLK1 to the same clock reference to maintain old DT compatibility */
- wiz->input_clks[WIZ_CORE_REFCLK1] = clk;
rate = clk_get_rate(clk);
if (rate >= 100000000)
@@ -853,6 +900,25 @@ static int wiz_clock_init(struct wiz *wiz)
else
regmap_field_write(wiz->pma_cmn_refclk_int_mode, 0x3);
+ if (wiz->data->pma_cmn_refclk1_int_mode) {
+ clk = devm_clk_get(dev, "core_ref1_clk");
+ if (IS_ERR(clk)) {
+ dev_err(dev, "core_ref1_clk clock not found\n");
+ ret = PTR_ERR(clk);
+ return ret;
+ }
+ wiz->input_clks[WIZ_CORE_REFCLK1] = clk;
+
+ rate = clk_get_rate(clk);
+ if (rate >= 100000000)
+ regmap_field_write(wiz->pma_cmn_refclk1_int_mode, 0x1);
+ else
+ regmap_field_write(wiz->pma_cmn_refclk1_int_mode, 0x3);
+ } else {
+ /* Initialize CORE_REFCLK1 to the same clock reference to maintain old DT compatibility */
+ wiz->input_clks[WIZ_CORE_REFCLK1] = clk;
+ }
+
clk = devm_clk_get(dev, "ext_ref_clk");
if (IS_ERR(clk)) {
dev_err(dev, "ext_ref_clk clock not found\n");
@@ -933,7 +999,7 @@ static int j721e_wiz_bind_of_clocks(struct wiz *wiz)
ofnode node;
int i, rc;
- if (type == AM64_WIZ_10G)
+ if (type == AM64_WIZ_10G || type == J784S4_WIZ_10G)
return j721e_wiz_bind_clocks(wiz);
div_clk_drv = lists_driver_lookup_name("wiz_div_clk");
@@ -1173,6 +1239,9 @@ static const struct udevice_id j721e_wiz_ids[] = {
{
.compatible = "ti,am64-wiz-10g", .data = (ulong)&am64_10g_data,
},
+ {
+ .compatible = "ti,j784s4-wiz-10g", .data = (ulong)&j784s4_wiz_10g,
+ },
{}
};
diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
index 9ce2bc1b3a..061104be05 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
@@ -245,6 +245,7 @@ static const struct sunxi_pinctrl_function suniv_f1c100s_pinctrl_functions[] = {
#else
{ "uart0", 5 }, /* PE0-PE1 */
#endif
+ { "uart1", 5 }, /* PA0-PA3 */
};
static const struct sunxi_pinctrl_desc __maybe_unused suniv_f1c100s_pinctrl_desc = {
diff --git a/drivers/ram/rockchip/Kconfig b/drivers/ram/rockchip/Kconfig
index c459bbf5e2..c29d5e8b38 100644
--- a/drivers/ram/rockchip/Kconfig
+++ b/drivers/ram/rockchip/Kconfig
@@ -23,7 +23,7 @@ config RAM_ROCKCHIP_DEBUG
initialization, configurations and etc.
config RAM_PX30_DDR4
- bool "DDR3 support for Rockchip PX30"
+ bool "DDR4 support for Rockchip PX30"
depends on RAM_ROCKCHIP && ROCKCHIP_PX30
help
This enables DDR4 sdram support instead of the default DDR3 support
diff --git a/drivers/serial/serial-uclass.c b/drivers/serial/serial-uclass.c
index da3e1eb3ab..83cda1f204 100644
--- a/drivers/serial/serial-uclass.c
+++ b/drivers/serial/serial-uclass.c
@@ -143,7 +143,7 @@ static void serial_find_console_or_panic(void)
#else
if (!uclass_get_device_by_seq(UCLASS_SERIAL, INDEX, &dev) ||
!uclass_get_device(UCLASS_SERIAL, INDEX, &dev) ||
- (!uclass_first_device(UCLASS_SERIAL, &dev) && dev)) {
+ !uclass_first_device_err(UCLASS_SERIAL, &dev)) {
gd->cur_serial_dev = dev;
return;
}
diff --git a/drivers/serial/serial_bcm283x_mu.c b/drivers/serial/serial_bcm283x_mu.c
index 493a42b4cc..12cbcb9858 100644
--- a/drivers/serial/serial_bcm283x_mu.c
+++ b/drivers/serial/serial_bcm283x_mu.c
@@ -147,7 +147,7 @@ static bool bcm283x_is_serial_muxed(void)
int serial_gpio = 15;
struct udevice *dev;
- if (uclass_first_device(UCLASS_PINCTRL, &dev) || !dev)
+ if (uclass_first_device_err(UCLASS_PINCTRL, &dev))
return false;
if (pinctrl_get_gpio_mux(dev, 0, serial_gpio) != BCM2835_GPIO_ALT5)
diff --git a/drivers/serial/serial_bcm283x_pl011.c b/drivers/serial/serial_bcm283x_pl011.c
index fe746294cd..7d172cdac0 100644
--- a/drivers/serial/serial_bcm283x_pl011.c
+++ b/drivers/serial/serial_bcm283x_pl011.c
@@ -24,7 +24,7 @@ static bool bcm283x_is_serial_muxed(void)
int serial_gpio = 15;
struct udevice *dev;
- if (uclass_first_device(UCLASS_PINCTRL, &dev) || !dev)
+ if (uclass_first_device_err(UCLASS_PINCTRL, &dev))
return false;
if (pinctrl_get_gpio_mux(dev, 0, serial_gpio) != BCM2835_GPIO_ALT0)
diff --git a/drivers/sysreset/sysreset_ast.c b/drivers/sysreset/sysreset_ast.c
index d747ed00a7..92fad96871 100644
--- a/drivers/sysreset/sysreset_ast.c
+++ b/drivers/sysreset/sysreset_ast.c
@@ -18,7 +18,7 @@ static int ast_sysreset_request(struct udevice *dev, enum sysreset_t type)
{
struct udevice *wdt;
u32 reset_mode;
- int ret = uclass_first_device(UCLASS_WDT, &wdt);
+ int ret = uclass_first_device_err(UCLASS_WDT, &wdt);
if (ret)
return ret;
diff --git a/drivers/usb/gadget/ether.c b/drivers/usb/gadget/ether.c
index 6ce389de9f..43aec7ffa7 100644
--- a/drivers/usb/gadget/ether.c
+++ b/drivers/usb/gadget/ether.c
@@ -2636,18 +2636,17 @@ static const struct eth_ops usb_eth_ops = {
int usb_ether_init(void)
{
- struct udevice *dev;
struct udevice *usb_dev;
int ret;
- ret = uclass_first_device(UCLASS_USB_GADGET_GENERIC, &usb_dev);
- if (!usb_dev || ret) {
+ uclass_first_device(UCLASS_USB_GADGET_GENERIC, &usb_dev);
+ if (!usb_dev) {
pr_err("No USB device found\n");
- return ret;
+ return -ENODEV;
}
- ret = device_bind_driver(usb_dev, "usb_ether", "usb_ether", &dev);
- if (!dev || ret) {
+ ret = device_bind_driver(usb_dev, "usb_ether", "usb_ether", NULL);
+ if (ret) {
pr_err("usb - not able to bind usb_ether device\n");
return ret;
}
diff --git a/drivers/video/exynos/exynos_fb.c b/drivers/video/exynos/exynos_fb.c
index 69992b3c2b..86970a6d5d 100644
--- a/drivers/video/exynos/exynos_fb.c
+++ b/drivers/video/exynos/exynos_fb.c
@@ -640,25 +640,17 @@ static int exynos_fb_probe(struct udevice *dev)
#endif
exynos_fimd_lcd_init(dev);
- ret = uclass_first_device(UCLASS_PANEL, &panel);
+ ret = uclass_first_device_err(UCLASS_PANEL, &panel);
if (ret) {
- printf("LCD panel failed to probe\n");
+ printf("%s: LCD panel failed to probe %d\n", __func__, ret);
return ret;
}
- if (!panel) {
- printf("LCD panel not found\n");
- return -ENODEV;
- }
- ret = uclass_first_device(UCLASS_DISPLAY, &dp);
+ ret = uclass_first_device_err(UCLASS_DISPLAY, &dp);
if (ret) {
debug("%s: Display device error %d\n", __func__, ret);
return ret;
}
- if (!dev) {
- debug("%s: Display device missing\n", __func__);
- return -ENODEV;
- }
ret = display_enable(dp, 18, NULL);
if (ret) {
debug("%s: Display enable error %d\n", __func__, ret);
diff --git a/drivers/video/imx/mxc_ipuv3_fb.c b/drivers/video/imx/mxc_ipuv3_fb.c
index 49bbeefdd8..8b01a1be11 100644
--- a/drivers/video/imx/mxc_ipuv3_fb.c
+++ b/drivers/video/imx/mxc_ipuv3_fb.c
@@ -609,12 +609,11 @@ static int ipuv3_video_probe(struct udevice *dev)
return ret;
#if defined(CONFIG_DISPLAY)
- ret = uclass_first_device(UCLASS_DISPLAY, &disp_dev);
- if (disp_dev) {
+ ret = uclass_first_device_err(UCLASS_DISPLAY, &disp_dev);
+ if (!ret)
ret = display_enable(disp_dev, 16, NULL);
- if (ret < 0)
- return ret;
- }
+ if (ret < 0)
+ return ret;
#endif
if (CONFIG_IS_ENABLED(PANEL)) {
struct udevice *panel_dev;
diff --git a/drivers/video/mali_dp.c b/drivers/video/mali_dp.c
index ba1ddd64e0..cbcdb99e1f 100644
--- a/drivers/video/mali_dp.c
+++ b/drivers/video/mali_dp.c
@@ -244,7 +244,7 @@ static int malidp_update_timings_from_edid(struct udevice *dev,
struct udevice *disp_dev;
int err;
- err = uclass_first_device(UCLASS_DISPLAY, &disp_dev);
+ err = uclass_first_device_err(UCLASS_DISPLAY, &disp_dev);
if (err)
return err;
diff --git a/drivers/video/stm32/stm32_dsi.c b/drivers/video/stm32/stm32_dsi.c
index 5871ac7c4f..e6347bb8da 100644
--- a/drivers/video/stm32/stm32_dsi.c
+++ b/drivers/video/stm32/stm32_dsi.c
@@ -346,7 +346,7 @@ static int stm32_dsi_attach(struct udevice *dev)
struct display_timing timings;
int ret;
- ret = uclass_first_device(UCLASS_PANEL, &priv->panel);
+ ret = uclass_first_device_err(UCLASS_PANEL, &priv->panel);
if (ret) {
dev_err(dev, "panel device error %d\n", ret);
return ret;
diff --git a/drivers/video/tegra124/dp.c b/drivers/video/tegra124/dp.c
index ee4f09a0c4..b27b1633ba 100644
--- a/drivers/video/tegra124/dp.c
+++ b/drivers/video/tegra124/dp.c
@@ -1494,8 +1494,8 @@ int tegra_dp_enable(struct udevice *dev, int panel_bpp,
return -ENOLINK;
}
- ret = uclass_first_device(UCLASS_VIDEO_BRIDGE, &sor);
- if (ret || !sor) {
+ ret = uclass_first_device_err(UCLASS_VIDEO_BRIDGE, &sor);
+ if (ret) {
debug("dp: failed to find SOR device: ret=%d\n", ret);
return ret;
}
diff --git a/drivers/virtio/virtio-uclass.c b/drivers/virtio/virtio-uclass.c
index 9e2d0e06a1..da4f2f26a6 100644
--- a/drivers/virtio/virtio-uclass.c
+++ b/drivers/virtio/virtio-uclass.c
@@ -183,21 +183,8 @@ void virtio_driver_features_init(struct virtio_dev_priv *priv,
int virtio_init(void)
{
- struct udevice *bus;
- int ret;
-
/* Enumerate all known virtio devices */
- ret = uclass_first_device(UCLASS_VIRTIO, &bus);
- if (ret)
- return ret;
-
- while (bus) {
- ret = uclass_next_device(&bus);
- if (ret)
- break;
- }
-
- return ret;
+ return uclass_probe_all(UCLASS_VIRTIO);
}
static int virtio_uclass_pre_probe(struct udevice *udev)
diff --git a/drivers/w1/w1-uclass.c b/drivers/w1/w1-uclass.c
index 52b519c21d..de4f25bcf9 100644
--- a/drivers/w1/w1-uclass.c
+++ b/drivers/w1/w1-uclass.c
@@ -16,6 +16,7 @@
#include <common.h>
#include <dm.h>
+#include <errno.h>
#include <log.h>
#include <w1.h>
#include <w1-eeprom.h>
@@ -182,24 +183,25 @@ static int w1_enumerate(struct udevice *bus)
int w1_get_bus(int busnum, struct udevice **busp)
{
int ret, i = 0;
-
struct udevice *dev;
- for (ret = uclass_first_device(UCLASS_W1, &dev);
- dev && !ret;
- ret = uclass_next_device(&dev), i++) {
+ for (ret = uclass_first_device_check(UCLASS_W1, &dev);
+ dev;
+ ret = uclass_next_device_check(&dev), i++) {
if (i == busnum) {
+ if (ret) {
+ debug("Cannot probe w1 bus %d: %d (%s)\n",
+ busnum, ret, errno_str(ret));
+ return ret;
+ }
*busp = dev;
return 0;
}
}
- if (!ret) {
- debug("Cannot find w1 bus %d\n", busnum);
- ret = -ENODEV;
- }
+ debug("Cannot find w1 bus %d\n", busnum);
- return ret;
+ return -ENODEV;
}
u8 w1_get_device_family(struct udevice *dev)
diff --git a/drivers/watchdog/omap_wdt.c b/drivers/watchdog/omap_wdt.c
index ca2bc7cfb5..f0e57b4f72 100644
--- a/drivers/watchdog/omap_wdt.c
+++ b/drivers/watchdog/omap_wdt.c
@@ -39,7 +39,7 @@
#include <common.h>
#include <log.h>
#include <watchdog.h>
-#include <asm/arch/hardware.h>
+#include <asm/ti-common/omap_wdt.h>
#include <asm/io.h>
#include <asm/processor.h>
#include <asm/arch/cpu.h>
diff --git a/drivers/xen/pvblock.c b/drivers/xen/pvblock.c
index 970182cd90..95e298d7dd 100644
--- a/drivers/xen/pvblock.c
+++ b/drivers/xen/pvblock.c
@@ -852,10 +852,7 @@ static int pvblock_probe(struct udevice *udev)
ret = uclass_get(UCLASS_BLK, &uc);
if (ret)
return ret;
- uclass_foreach_dev_probe(UCLASS_BLK, udev) {
- if (_ret)
- return _ret;
- };
+ uclass_foreach_dev_probe(UCLASS_BLK, udev);
return 0;
}