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-rw-r--r--drivers/clk/clk_stm32mp1.c4
-rw-r--r--drivers/gpio/stm32_gpio.c3
-rw-r--r--drivers/gpio/stm32_gpio_priv.h86
-rw-r--r--drivers/pci/pci_mvebu.c11
-rw-r--r--drivers/pinctrl/exynos/pinctrl-exynos78x0.c14
-rw-r--r--drivers/pinctrl/pinctrl_stm32.c3
-rw-r--r--drivers/pwm/exynos_pwm.c4
-rw-r--r--drivers/ram/stm32mp1/stm32mp1_ram.c13
-rw-r--r--drivers/video/dw_mipi_dsi.c1
-rw-r--r--drivers/video/stm32/stm32_dsi.c1
-rw-r--r--drivers/video/stm32/stm32_ltdc.c1
-rw-r--r--drivers/watchdog/Kconfig1
12 files changed, 114 insertions, 28 deletions
diff --git a/drivers/clk/clk_stm32mp1.c b/drivers/clk/clk_stm32mp1.c
index 114192bb32..83ab6b728e 100644
--- a/drivers/clk/clk_stm32mp1.c
+++ b/drivers/clk/clk_stm32mp1.c
@@ -27,12 +27,10 @@
DECLARE_GLOBAL_DATA_PTR;
-#ifndef CONFIG_TFABOOT
-#if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)
+#if defined(CONFIG_SPL_BUILD)
/* activate clock tree initialization in the driver */
#define STM32MP1_CLOCK_TREE_INIT
#endif
-#endif
#define MAX_HSI_HZ 64000000
diff --git a/drivers/gpio/stm32_gpio.c b/drivers/gpio/stm32_gpio.c
index 125c237551..8667ed3835 100644
--- a/drivers/gpio/stm32_gpio.c
+++ b/drivers/gpio/stm32_gpio.c
@@ -11,7 +11,6 @@
#include <dm.h>
#include <fdtdec.h>
#include <log.h>
-#include <asm/arch/gpio.h>
#include <asm/arch/stm32.h>
#include <asm/gpio.h>
#include <asm/io.h>
@@ -20,6 +19,8 @@
#include <linux/errno.h>
#include <linux/io.h>
+#include "stm32_gpio_priv.h"
+
#define STM32_GPIOS_PER_BANK 16
#define MODE_BITS(gpio_pin) ((gpio_pin) * 2)
diff --git a/drivers/gpio/stm32_gpio_priv.h b/drivers/gpio/stm32_gpio_priv.h
new file mode 100644
index 0000000000..d3d8f2ed5d
--- /dev/null
+++ b/drivers/gpio/stm32_gpio_priv.h
@@ -0,0 +1,86 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
+ * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics.
+ */
+
+#ifndef _STM32_GPIO_PRIV_H_
+#define _STM32_GPIO_PRIV_H_
+
+enum stm32_gpio_mode {
+ STM32_GPIO_MODE_IN = 0,
+ STM32_GPIO_MODE_OUT,
+ STM32_GPIO_MODE_AF,
+ STM32_GPIO_MODE_AN
+};
+
+enum stm32_gpio_otype {
+ STM32_GPIO_OTYPE_PP = 0,
+ STM32_GPIO_OTYPE_OD
+};
+
+enum stm32_gpio_speed {
+ STM32_GPIO_SPEED_2M = 0,
+ STM32_GPIO_SPEED_25M,
+ STM32_GPIO_SPEED_50M,
+ STM32_GPIO_SPEED_100M
+};
+
+enum stm32_gpio_pupd {
+ STM32_GPIO_PUPD_NO = 0,
+ STM32_GPIO_PUPD_UP,
+ STM32_GPIO_PUPD_DOWN
+};
+
+enum stm32_gpio_af {
+ STM32_GPIO_AF0 = 0,
+ STM32_GPIO_AF1,
+ STM32_GPIO_AF2,
+ STM32_GPIO_AF3,
+ STM32_GPIO_AF4,
+ STM32_GPIO_AF5,
+ STM32_GPIO_AF6,
+ STM32_GPIO_AF7,
+ STM32_GPIO_AF8,
+ STM32_GPIO_AF9,
+ STM32_GPIO_AF10,
+ STM32_GPIO_AF11,
+ STM32_GPIO_AF12,
+ STM32_GPIO_AF13,
+ STM32_GPIO_AF14,
+ STM32_GPIO_AF15
+};
+
+struct stm32_gpio_dsc {
+ u8 port;
+ u8 pin;
+};
+
+struct stm32_gpio_ctl {
+ enum stm32_gpio_mode mode;
+ enum stm32_gpio_otype otype;
+ enum stm32_gpio_speed speed;
+ enum stm32_gpio_pupd pupd;
+ enum stm32_gpio_af af;
+};
+
+struct stm32_gpio_regs {
+ u32 moder; /* GPIO port mode */
+ u32 otyper; /* GPIO port output type */
+ u32 ospeedr; /* GPIO port output speed */
+ u32 pupdr; /* GPIO port pull-up/pull-down */
+ u32 idr; /* GPIO port input data */
+ u32 odr; /* GPIO port output data */
+ u32 bsrr; /* GPIO port bit set/reset */
+ u32 lckr; /* GPIO port configuration lock */
+ u32 afr[2]; /* GPIO alternate function */
+};
+
+struct stm32_gpio_priv {
+ struct stm32_gpio_regs *regs;
+ unsigned int gpio_range;
+};
+
+int stm32_offset_to_index(struct udevice *dev, unsigned int offset);
+
+#endif /* _STM32_GPIO_PRIV_H_ */
diff --git a/drivers/pci/pci_mvebu.c b/drivers/pci/pci_mvebu.c
index c575e9412b..14cd82db6f 100644
--- a/drivers/pci/pci_mvebu.c
+++ b/drivers/pci/pci_mvebu.c
@@ -97,7 +97,6 @@ struct mvebu_pcie {
* and 64K of I/O space when registered.
*/
static void __iomem *mvebu_pcie_membase = (void __iomem *)MBUS_PCI_MEM_BASE;
-#define PCIE_MEM_SIZE (128 << 20)
static void __iomem *mvebu_pcie_iobase = (void __iomem *)MBUS_PCI_IO_BASE;
static inline bool mvebu_pcie_link_up(struct mvebu_pcie *pcie)
@@ -433,14 +432,14 @@ static int mvebu_pcie_probe(struct udevice *dev)
mvebu_pcie_set_local_dev_nr(pcie, 1);
pcie->mem.start = (u32)mvebu_pcie_membase;
- pcie->mem.end = pcie->mem.start + PCIE_MEM_SIZE - 1;
- mvebu_pcie_membase += PCIE_MEM_SIZE;
+ pcie->mem.end = pcie->mem.start + MBUS_PCI_MEM_SIZE - 1;
+ mvebu_pcie_membase += MBUS_PCI_MEM_SIZE;
if (mvebu_mbus_add_window_by_id(pcie->mem_target, pcie->mem_attr,
(phys_addr_t)pcie->mem.start,
- PCIE_MEM_SIZE)) {
+ MBUS_PCI_MEM_SIZE)) {
printf("PCIe unable to add mbus window for mem at %08x+%08x\n",
- (u32)pcie->mem.start, PCIE_MEM_SIZE);
+ (u32)pcie->mem.start, MBUS_PCI_MEM_SIZE);
}
pcie->io.start = (u32)mvebu_pcie_iobase;
@@ -459,7 +458,7 @@ static int mvebu_pcie_probe(struct udevice *dev)
/* PCI memory space */
pci_set_region(hose->regions + 0, pcie->mem.start,
- pcie->mem.start, PCIE_MEM_SIZE, PCI_REGION_MEM);
+ pcie->mem.start, MBUS_PCI_MEM_SIZE, PCI_REGION_MEM);
pci_set_region(hose->regions + 1,
0, 0,
gd->ram_size,
diff --git a/drivers/pinctrl/exynos/pinctrl-exynos78x0.c b/drivers/pinctrl/exynos/pinctrl-exynos78x0.c
index 01e9a4fede..1b696fdfd2 100644
--- a/drivers/pinctrl/exynos/pinctrl-exynos78x0.c
+++ b/drivers/pinctrl/exynos/pinctrl-exynos78x0.c
@@ -19,12 +19,12 @@
#include <asm/arch/pinmux.h>
#include "pinctrl-exynos.h"
-static struct pinctrl_ops exynos78x0_pinctrl_ops = {
+static const struct pinctrl_ops exynos78x0_pinctrl_ops = {
.set_state = exynos_pinctrl_set_state
};
/* pin banks of exynos78x0 pin-controller 0 (ALIVE) */
-static struct samsung_pin_bank_data exynos78x0_pin_banks0[] = {
+static const struct samsung_pin_bank_data exynos78x0_pin_banks0[] = {
EXYNOS_PIN_BANK(6, 0x000, "etc0"),
EXYNOS_PIN_BANK(3, 0x020, "etc1"),
EXYNOS_PIN_BANK(8, 0x040, "gpa0"),
@@ -35,19 +35,19 @@ static struct samsung_pin_bank_data exynos78x0_pin_banks0[] = {
};
/* pin banks of exynos78x0 pin-controller 1 (CCORE) */
-static struct samsung_pin_bank_data exynos78x0_pin_banks1[] = {
+static const struct samsung_pin_bank_data exynos78x0_pin_banks1[] = {
EXYNOS_PIN_BANK(2, 0x000, "gpm0"),
};
/* pin banks of exynos78x0 pin-controller 2 (DISPAUD) */
-static struct samsung_pin_bank_data exynos78x0_pin_banks2[] = {
+static const struct samsung_pin_bank_data exynos78x0_pin_banks2[] = {
EXYNOS_PIN_BANK(4, 0x000, "gpz0"),
EXYNOS_PIN_BANK(6, 0x020, "gpz1"),
EXYNOS_PIN_BANK(4, 0x040, "gpz2"),
};
/* pin banks of exynos78x0 pin-controller 4 (FSYS) */
-static struct samsung_pin_bank_data exynos78x0_pin_banks4[] = {
+static const struct samsung_pin_bank_data exynos78x0_pin_banks4[] = {
EXYNOS_PIN_BANK(3, 0x000, "gpr0"),
EXYNOS_PIN_BANK(8, 0x020, "gpr1"),
EXYNOS_PIN_BANK(2, 0x040, "gpr2"),
@@ -56,7 +56,7 @@ static struct samsung_pin_bank_data exynos78x0_pin_banks4[] = {
};
/* pin banks of exynos78x0 pin-controller 6 (TOP) */
-static struct samsung_pin_bank_data exynos78x0_pin_banks6[] = {
+static const struct samsung_pin_bank_data exynos78x0_pin_banks6[] = {
EXYNOS_PIN_BANK(4, 0x000, "gpb0"),
EXYNOS_PIN_BANK(3, 0x020, "gpc0"),
EXYNOS_PIN_BANK(4, 0x040, "gpc1"),
@@ -78,7 +78,7 @@ static struct samsung_pin_bank_data exynos78x0_pin_banks6[] = {
EXYNOS_PIN_BANK(5, 0x240, "gpf4"),
};
-struct samsung_pin_ctrl exynos78x0_pin_ctrl[] = {
+const struct samsung_pin_ctrl exynos78x0_pin_ctrl[] = {
{
/* pin-controller instance 0 Alive data */
.pin_banks = exynos78x0_pin_banks0,
diff --git a/drivers/pinctrl/pinctrl_stm32.c b/drivers/pinctrl/pinctrl_stm32.c
index 6c98538f56..5729799b12 100644
--- a/drivers/pinctrl/pinctrl_stm32.c
+++ b/drivers/pinctrl/pinctrl_stm32.c
@@ -10,7 +10,6 @@
#include <hwspinlock.h>
#include <log.h>
#include <malloc.h>
-#include <asm/arch/gpio.h>
#include <asm/gpio.h>
#include <asm/io.h>
#include <dm/device_compat.h>
@@ -20,6 +19,8 @@
#include <linux/err.h>
#include <linux/libfdt.h>
+#include "../gpio/stm32_gpio_priv.h"
+
#define MAX_PINS_ONE_IP 70
#define MODE_BITS_MASK 3
#define OSPEED_MASK 3
diff --git a/drivers/pwm/exynos_pwm.c b/drivers/pwm/exynos_pwm.c
index 1afaf784da..609025d680 100644
--- a/drivers/pwm/exynos_pwm.c
+++ b/drivers/pwm/exynos_pwm.c
@@ -43,6 +43,10 @@ static int exynos_pwm_set_config(struct udevice *dev, uint channel,
tcnt = period_ns / rate_ns;
tcmp = duty_ns / rate_ns;
debug("%s: tcnt %u, tcmp %u\n", __func__, tcnt, tcmp);
+
+ /* Ensure that the comparitor will actually hit the target */
+ if (tcmp == tcnt)
+ tcmp = tcnt - 1;
offset = channel * 3;
writel(tcnt, &regs->tcntb0 + offset);
writel(tcmp, &regs->tcmpb0 + offset);
diff --git a/drivers/ram/stm32mp1/stm32mp1_ram.c b/drivers/ram/stm32mp1/stm32mp1_ram.c
index 26f0b4f1ea..98fa1f4f11 100644
--- a/drivers/ram/stm32mp1/stm32mp1_ram.c
+++ b/drivers/ram/stm32mp1/stm32mp1_ram.c
@@ -202,17 +202,16 @@ static int stm32mp1_ddr_probe(struct udevice *dev)
priv->info.base = STM32_DDR_BASE;
-#if !defined(CONFIG_TFABOOT) && \
- (!defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD))
- priv->info.size = 0;
- ret = stm32mp1_ddr_setup(dev);
+ if (IS_ENABLED(CONFIG_SPL_BUILD)) {
+ priv->info.size = 0;
+ ret = stm32mp1_ddr_setup(dev);
+
+ return log_ret(ret);
+ }
- return log_ret(ret);
-#else
ofnode node = stm32mp1_ddr_get_ofnode(dev);
priv->info.size = ofnode_read_u32_default(node, "st,mem-size", 0);
return 0;
-#endif
}
static int stm32mp1_ddr_get_info(struct udevice *dev, struct ram_info *info)
diff --git a/drivers/video/dw_mipi_dsi.c b/drivers/video/dw_mipi_dsi.c
index 9ae09eec12..a5b38acabd 100644
--- a/drivers/video/dw_mipi_dsi.c
+++ b/drivers/video/dw_mipi_dsi.c
@@ -17,7 +17,6 @@
#include <panel.h>
#include <video.h>
#include <asm/io.h>
-#include <asm/arch/gpio.h>
#include <dm/device-internal.h>
#include <dm/device_compat.h>
#include <linux/bitops.h>
diff --git a/drivers/video/stm32/stm32_dsi.c b/drivers/video/stm32/stm32_dsi.c
index 4027e978c8..134abd93e1 100644
--- a/drivers/video/stm32/stm32_dsi.c
+++ b/drivers/video/stm32/stm32_dsi.c
@@ -21,7 +21,6 @@
#include <video.h>
#include <video_bridge.h>
#include <asm/io.h>
-#include <asm/arch/gpio.h>
#include <dm/device-internal.h>
#include <dm/device_compat.h>
#include <dm/lists.h>
diff --git a/drivers/video/stm32/stm32_ltdc.c b/drivers/video/stm32/stm32_ltdc.c
index f55a39498e..65c882d9f1 100644
--- a/drivers/video/stm32/stm32_ltdc.c
+++ b/drivers/video/stm32/stm32_ltdc.c
@@ -17,7 +17,6 @@
#include <video.h>
#include <video_bridge.h>
#include <asm/io.h>
-#include <asm/arch/gpio.h>
#include <dm/device-internal.h>
#include <dm/device_compat.h>
#include <linux/bitops.h>
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index d306054a8c..1177f17fd8 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -12,6 +12,7 @@ config WATCHDOG
config WATCHDOG_AUTOSTART
bool "Automatically start watchdog timer"
depends on WDT
+ default n if ARCH_SUNXI
default y
help
Automatically start watchdog timer and start servicing it during
generated by cgit v1.2.3 (git 2.39.1) at 2025-06-01 08:46:32 +0000