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path: root/drivers/video/stm32
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Diffstat (limited to 'drivers/video/stm32')
-rw-r--r--drivers/video/stm32/stm32_dsi.c18
-rw-r--r--drivers/video/stm32/stm32_ltdc.c33
2 files changed, 28 insertions, 23 deletions
diff --git a/drivers/video/stm32/stm32_dsi.c b/drivers/video/stm32/stm32_dsi.c
index 266623b876..8891ca4b78 100644
--- a/drivers/video/stm32/stm32_dsi.c
+++ b/drivers/video/stm32/stm32_dsi.c
@@ -8,6 +8,8 @@
* drivers/gpu/drm/stm/dw_mipi_dsi-stm.c.
*/
+#define LOG_CATEGORY UCLASS_VIDEO_BRIDGE
+
#include <common.h>
#include <clk.h>
#include <dm.h>
@@ -133,7 +135,7 @@ static enum dsi_color dsi_color_from_mipi(u32 fmt)
case MIPI_DSI_FMT_RGB565:
return DSI_RGB565_CONF1;
default:
- pr_err("MIPI color invalid, so we use rgb888\n");
+ log_err("MIPI color invalid, so we use rgb888\n");
}
return DSI_RGB888;
}
@@ -213,14 +215,14 @@ static int dsi_phy_init(void *priv_data)
u32 val;
int ret;
- debug("Initialize DSI physical layer\n");
+ dev_dbg(dev, "Initialize DSI physical layer\n");
/* Enable the regulator */
dsi_set(dsi, DSI_WRPCR, WRPCR_REGEN | WRPCR_BGREN);
ret = readl_poll_timeout(dsi->base + DSI_WISR, val, val & WISR_RRS,
TIMEOUT_US);
if (ret) {
- debug("!TIMEOUT! waiting REGU\n");
+ dev_dbg(dev, "!TIMEOUT! waiting REGU\n");
return ret;
}
@@ -229,7 +231,7 @@ static int dsi_phy_init(void *priv_data)
ret = readl_poll_timeout(dsi->base + DSI_WISR, val, val & WISR_PLLLS,
TIMEOUT_US);
if (ret) {
- debug("!TIMEOUT! waiting PLL\n");
+ dev_dbg(dev, "!TIMEOUT! waiting PLL\n");
return ret;
}
@@ -242,8 +244,8 @@ static void dsi_phy_post_set_mode(void *priv_data, unsigned long mode_flags)
struct udevice *dev = device->dev;
struct stm32_dsi_priv *dsi = dev_get_priv(dev);
- debug("Set mode %p enable %ld\n", dsi,
- mode_flags & MIPI_DSI_MODE_VIDEO);
+ dev_dbg(dev, "Set mode %p enable %ld\n", dsi,
+ mode_flags & MIPI_DSI_MODE_VIDEO);
if (!dsi)
return;
@@ -325,8 +327,8 @@ static int dsi_get_lane_mbps(void *priv_data, struct display_timing *timings,
*lane_mbps = pll_out_khz / 1000;
- debug("pll_in %ukHz pll_out %ukHz lane_mbps %uMHz\n",
- pll_in_khz, pll_out_khz, *lane_mbps);
+ dev_dbg(dev, "pll_in %ukHz pll_out %ukHz lane_mbps %uMHz\n",
+ pll_in_khz, pll_out_khz, *lane_mbps);
return 0;
}
diff --git a/drivers/video/stm32/stm32_ltdc.c b/drivers/video/stm32/stm32_ltdc.c
index dc10b8cfc1..f55a39498e 100644
--- a/drivers/video/stm32/stm32_ltdc.c
+++ b/drivers/video/stm32/stm32_ltdc.c
@@ -5,6 +5,8 @@
* Yannick Fertre <yannick.fertre@st.com> for STMicroelectronics.
*/
+#define LOG_CATEGORY UCLASS_VIDEO
+
#include <common.h>
#include <clk.h>
#include <display.h>
@@ -176,13 +178,13 @@ static u32 stm32_ltdc_get_pixel_format(enum video_log2_bpp l2bpp)
case VIDEO_BPP2:
case VIDEO_BPP4:
default:
- pr_warn("%s: warning %dbpp not supported yet, %dbpp instead\n",
- __func__, VNBITS(l2bpp), VNBITS(VIDEO_BPP16));
+ log_warning("warning %dbpp not supported yet, %dbpp instead\n",
+ VNBITS(l2bpp), VNBITS(VIDEO_BPP16));
pf = PF_RGB565;
break;
}
- debug("%s: %d bpp -> ltdc pf %d\n", __func__, VNBITS(l2bpp), pf);
+ log_debug("%d bpp -> ltdc pf %d\n", VNBITS(l2bpp), pf);
return (u32)pf;
}
@@ -249,7 +251,7 @@ static void stm32_ltdc_set_mode(struct stm32_ltdc_priv *priv,
/* Signal polarities */
val = 0;
- debug("%s: timing->flags 0x%08x\n", __func__, timings->flags);
+ log_debug("timing->flags 0x%08x\n", timings->flags);
if (timings->flags & DISPLAY_FLAGS_HSYNC_HIGH)
val |= GCR_HSPOL;
if (timings->flags & DISPLAY_FLAGS_VSYNC_HIGH)
@@ -379,8 +381,8 @@ static int stm32_ltdc_probe(struct udevice *dev)
dev_warn(dev, "fail to set pixel clock %d hz\n",
timings.pixelclock.typ);
- debug("%s: Set pixel clock req %d hz get %ld hz\n", __func__,
- timings.pixelclock.typ, clk_get_rate(&pclk));
+ dev_dbg(dev, "Set pixel clock req %d hz get %ld hz\n",
+ timings.pixelclock.typ, clk_get_rate(&pclk));
ret = reset_get_by_index(dev, 0, &rst);
if (ret) {
@@ -394,12 +396,13 @@ static int stm32_ltdc_probe(struct udevice *dev)
if (IS_ENABLED(CONFIG_VIDEO_BRIDGE)) {
ret = uclass_get_device(UCLASS_VIDEO_BRIDGE, 0, &bridge);
if (ret)
- debug("No video bridge, or no backlight on bridge\n");
+ dev_dbg(dev,
+ "No video bridge, or no backlight on bridge\n");
if (bridge) {
ret = video_bridge_attach(bridge);
if (ret) {
- dev_err(dev, "fail to attach bridge\n");
+ dev_err(bridge, "fail to attach bridge\n");
return ret;
}
}
@@ -414,12 +417,12 @@ static int stm32_ltdc_probe(struct udevice *dev)
priv->crop_h = timings.vactive.typ;
priv->alpha = 0xFF;
- debug("%s: %dx%d %dbpp frame buffer at 0x%lx\n", __func__,
- timings.hactive.typ, timings.vactive.typ,
- VNBITS(priv->l2bpp), uc_plat->base);
- debug("%s: crop %d,%d %dx%d bg 0x%08x alpha %d\n", __func__,
- priv->crop_x, priv->crop_y, priv->crop_w, priv->crop_h,
- priv->bg_col_argb, priv->alpha);
+ dev_dbg(dev, "%dx%d %dbpp frame buffer at 0x%lx\n",
+ timings.hactive.typ, timings.vactive.typ,
+ VNBITS(priv->l2bpp), uc_plat->base);
+ dev_dbg(dev, "crop %d,%d %dx%d bg 0x%08x alpha %d\n",
+ priv->crop_x, priv->crop_y, priv->crop_w, priv->crop_h,
+ priv->bg_col_argb, priv->alpha);
/* Configure & start LTDC */
stm32_ltdc_set_mode(priv, &timings);
@@ -457,7 +460,7 @@ static int stm32_ltdc_bind(struct udevice *dev)
uc_plat->size = CONFIG_VIDEO_STM32_MAX_XRES *
CONFIG_VIDEO_STM32_MAX_YRES *
(CONFIG_VIDEO_STM32_MAX_BPP >> 3);
- debug("%s: frame buffer max size %d bytes\n", __func__, uc_plat->size);
+ dev_dbg(dev, "frame buffer max size %d bytes\n", uc_plat->size);
return 0;
}
generated by cgit v1.2.3 (git 2.39.1) at 2025-05-16 01:40:55 +0000