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path: root/drivers/usb/host
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-rw-r--r--drivers/usb/host/ehci-exynos.c41
-rw-r--r--drivers/usb/host/ehci-hcd.c5
-rw-r--r--drivers/usb/host/ehci-pci.c28
3 files changed, 70 insertions, 4 deletions
diff --git a/drivers/usb/host/ehci-exynos.c b/drivers/usb/host/ehci-exynos.c
index 66b4de0b2d..9356878eb2 100644
--- a/drivers/usb/host/ehci-exynos.c
+++ b/drivers/usb/host/ehci-exynos.c
@@ -88,6 +88,8 @@ static int exynos_usb_parse_dt(const void *blob, struct exynos_ehci *exynos)
/* Setup the EHCI host controller. */
static void setup_usb_phy(struct exynos_usb_phy *usb)
{
+ u32 hsic_ctrl;
+
set_usbhost_mode(USB20_PHY_CFG_HOST_LINK_EN);
set_usbhost_phy_ctrl(POWER_USB_HOST_PHY_CTRL_EN);
@@ -112,6 +114,32 @@ static void setup_usb_phy(struct exynos_usb_phy *usb)
clrbits_le32(&usb->usbphyctrl0,
HOST_CTRL0_LINKSWRST |
HOST_CTRL0_UTMISWRST);
+
+ /* HSIC Phy Setting */
+ hsic_ctrl = (HSIC_CTRL_FORCESUSPEND |
+ HSIC_CTRL_FORCESLEEP |
+ HSIC_CTRL_SIDDQ);
+
+ clrbits_le32(&usb->hsicphyctrl1, hsic_ctrl);
+ clrbits_le32(&usb->hsicphyctrl2, hsic_ctrl);
+
+ hsic_ctrl = (((HSIC_CTRL_REFCLKDIV_12 & HSIC_CTRL_REFCLKDIV_MASK)
+ << HSIC_CTRL_REFCLKDIV_SHIFT)
+ | ((HSIC_CTRL_REFCLKSEL & HSIC_CTRL_REFCLKSEL_MASK)
+ << HSIC_CTRL_REFCLKSEL_SHIFT)
+ | HSIC_CTRL_UTMISWRST);
+
+ setbits_le32(&usb->hsicphyctrl1, hsic_ctrl);
+ setbits_le32(&usb->hsicphyctrl2, hsic_ctrl);
+
+ udelay(10);
+
+ clrbits_le32(&usb->hsicphyctrl1, HSIC_CTRL_PHYSWRST |
+ HSIC_CTRL_UTMISWRST);
+
+ clrbits_le32(&usb->hsicphyctrl2, HSIC_CTRL_PHYSWRST |
+ HSIC_CTRL_UTMISWRST);
+
udelay(20);
/* EHCI Ctrl setting */
@@ -125,6 +153,8 @@ static void setup_usb_phy(struct exynos_usb_phy *usb)
/* Reset the EHCI host controller. */
static void reset_usb_phy(struct exynos_usb_phy *usb)
{
+ u32 hsic_ctrl;
+
/* HOST_PHY reset */
setbits_le32(&usb->usbphyctrl0,
HOST_CTRL0_PHYSWRST |
@@ -133,6 +163,15 @@ static void reset_usb_phy(struct exynos_usb_phy *usb)
HOST_CTRL0_FORCESUSPEND |
HOST_CTRL0_FORCESLEEP);
+ /* HSIC Phy reset */
+ hsic_ctrl = (HSIC_CTRL_FORCESUSPEND |
+ HSIC_CTRL_FORCESLEEP |
+ HSIC_CTRL_SIDDQ |
+ HSIC_CTRL_PHYSWRST);
+
+ setbits_le32(&usb->hsicphyctrl1, hsic_ctrl);
+ setbits_le32(&usb->hsicphyctrl2, hsic_ctrl);
+
set_usbhost_phy_ctrl(POWER_USB_HOST_PHY_CTRL_DISABLE);
}
@@ -164,6 +203,8 @@ int ehci_hcd_init(int index, enum usb_init_type init,
setup_usb_phy(ctx->usb);
+ board_usb_init(index, init);
+
*hccr = ctx->hcd;
*hcor = (struct ehci_hcor *)((uint32_t) *hccr
+ HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index 8bd1eb8a99..17187caed4 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -201,6 +201,9 @@ static int ehci_shutdown(struct ehci_ctrl *ctrl)
int i, ret = 0;
uint32_t cmd, reg;
+ if (!ctrl || !ctrl->hcor)
+ return -EINVAL;
+
cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
cmd &= ~(CMD_PSE | CMD_ASE);
ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
@@ -945,7 +948,7 @@ int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)
#endif
/* Set the high address word (aka segment) for 64-bit controller */
if (ehci_readl(&ehcic[index].hccr->cr_hccparams) & 1)
- ehci_writel(ehcic[index].hcor->or_ctrldssegment, 0);
+ ehci_writel(&ehcic[index].hcor->or_ctrldssegment, 0);
qh_list = &ehcic[index].qh_list;
diff --git a/drivers/usb/host/ehci-pci.c b/drivers/usb/host/ehci-pci.c
index 7a1ffe5e28..991b19998b 100644
--- a/drivers/usb/host/ehci-pci.c
+++ b/drivers/usb/host/ehci-pci.c
@@ -54,9 +54,31 @@ static pci_dev_t ehci_find_class(int index)
bdf += PCI_BDF(0, 0, 1)) {
pci_read_config_dword(bdf, PCI_CLASS_REVISION,
&class);
- if ((class >> 8 == PCI_CLASS_SERIAL_USB_EHCI)
- && !index--)
- return bdf;
+ class >>= 8;
+ /*
+ * Here be dragons! In case we have multiple
+ * PCI EHCI controllers, this function will
+ * be called multiple times as well. This
+ * function will scan the PCI busses, always
+ * starting from bus 0, device 0, function 0,
+ * until it finds an USB controller. The USB
+ * stack gives us an 'index' of a controller
+ * that is currently being registered, which
+ * is a number, starting from 0 and growing
+ * in ascending order as controllers are added.
+ * To avoid probing the same controller in tne
+ * subsequent runs of this function, we will
+ * skip 'index - 1' detected controllers and
+ * report the index'th controller.
+ */
+ if (class != PCI_CLASS_SERIAL_USB_EHCI)
+ continue;
+ if (index) {
+ index--;
+ continue;
+ }
+ /* Return index'th controller. */
+ return bdf;
}
}
}