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path: root/drivers/serial/serial_sh.h
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Diffstat (limited to 'drivers/serial/serial_sh.h')
-rw-r--r--drivers/serial/serial_sh.h28
1 files changed, 23 insertions, 5 deletions
diff --git a/drivers/serial/serial_sh.h b/drivers/serial/serial_sh.h
index eb8523dde5..149ec1fe73 100644
--- a/drivers/serial/serial_sh.h
+++ b/drivers/serial/serial_sh.h
@@ -89,7 +89,7 @@ struct uart_port {
# define SCSPTR7 0xe800a820 /* 16 bit SCIF */
# define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
# define SCIF_ORER 0x0001 /* overrun error bit */
-#elif defined(CONFIG_RCAR_GEN2) || defined(CONFIG_RCAR_GEN3) || \
+#elif defined(CONFIG_RCAR_GEN2) || defined(CONFIG_RCAR_64) || \
defined(CONFIG_R7S72100)
# if defined(CFG_SCIF_A)
# define SCIF_ORER 0x0200
@@ -213,6 +213,10 @@ struct uart_port {
#define SCFCR_TCRST 0x4000
#define SCFCR_MCE 0x0008
+/* HSSRR */
+#define HSSRR_SRE BIT(15)
+#define HSSRR_SRCYC8 0x0007
+
#define SCI_MAJOR 204
#define SCI_MINOR_START 8
@@ -242,7 +246,8 @@ struct uart_port {
#define CPU_SCIx_FNS(name, sci_offset, sci_size, scif_offset, scif_size)\
static inline unsigned int sci_##name##_in(struct uart_port *port) {\
- if (port->type == PORT_SCIF || port->type == PORT_SCIFB) {\
+ if (port->type == PORT_SCIF || port->type == PORT_SCIFB ||\
+ port->type == PORT_HSCIF) {\
SCI_IN(scif_size, scif_offset)\
} else { /* PORT_SCI or PORT_SCIFA */\
SCI_IN(sci_size, sci_offset);\
@@ -250,7 +255,8 @@ struct uart_port {
}\
static inline void sci_##name##_out(struct uart_port *port,\
unsigned int value) {\
- if (port->type == PORT_SCIF || port->type == PORT_SCIFB) {\
+ if (port->type == PORT_SCIF || port->type == PORT_SCIFB ||\
+ port->type == PORT_HSCIF) {\
SCI_OUT(scif_size, scif_offset, value)\
} else { /* PORT_SCI or PORT_SCIFA */\
SCI_OUT(sci_size, sci_offset, value);\
@@ -375,6 +381,7 @@ SCIF_FNS(SCFDR, 0, 0, 0x1C, 16)
SCIF_FNS(SCSPTR, 0, 0, 0x20, 16)
SCIF_FNS(DL, 0, 0, 0x30, 16)
SCIF_FNS(CKS, 0, 0, 0x34, 16)
+SCIF_FNS(HSSRR, 0, 0, 0x40, 16) /* HSCIF only */
#if defined(CFG_SCIF_A)
SCIF_FNS(SCLSR, 0, 0, 0x14, 16)
#else
@@ -414,7 +421,9 @@ SCIF_FNS(SCSPTR, 0, 0, 0x20, 16)
#endif
SCIF_FNS(SCLSR, 0, 0, 0x24, 16)
#endif
-SCIF_FNS(DL, 0, 0, 0x0, 0) /* dummy */
+SCIF_FNS(DL, 0, 0, 0x30, 16)
+SCIF_FNS(CKS, 0, 0, 0x34, 16)
+SCIF_FNS(HSSRR, 0, 0, 0x40, 16) /* HSCIF only */
#endif
#define sci_in(port, reg) sci_##reg##_in(port)
#define sci_out(port, reg, value) sci_##reg##_out(port, value)
@@ -485,11 +494,20 @@ static inline int scbrr_calc(struct uart_port *port, int bps, int clk)
#define SCBRR_VALUE(bps, clk) scbrr_calc(port, bps, clk)
#elif defined(CONFIG_RCAR_GEN2)
#define DL_VALUE(bps, clk) (clk / bps / 16) /* External Clock */
- #if defined(CFG_SCIF_A)
+ #if defined(CFG_SCIF_A) || defined(CFG_HSCIF)
#define SCBRR_VALUE(bps, clk) (clk / bps / 16 - 1) /* Internal Clock */
#else
#define SCBRR_VALUE(bps, clk) (clk / bps / 32 - 1) /* Internal Clock */
#endif
+#elif defined(CONFIG_RCAR_64)
+static inline int scbrr_calc(struct uart_port *port, int bps, int clk)
+{
+ if (port->type == PORT_SCIF)
+ return (clk + 16 * bps) / (32 * bps) - 1;
+ else /* PORT_HSCIF */
+ return clk / bps / 8 / 2 - 1; /* Internal Clock, Sampling rate = 8 */
+}
+#define SCBRR_VALUE(bps, clk) scbrr_calc(port, bps, clk)
#else /* Generic SH */
#define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(32*bps)-1)
#endif