1 files changed, 21 insertions, 17 deletions

diff --git a/drivers/ram/stm32mp1/stm32mp1_ram.c b/drivers/ram/stm32mp1/stm32mp1_ram.c
index 0b6d20f566..26f0b4f1ea 100644
--- a/drivers/ram/stm32mp1/stm32mp1_ram.c
+++ b/drivers/ram/stm32mp1/stm32mp1_ram.c
@@ -3,6 +3,8 @@
  * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
  */
 
+#define LOG_CATEGORY UCLASS_RAM
+
 #include <common.h>
 #include <clk.h>
 #include <dm.h>
@@ -12,6 +14,7 @@
 #include <regmap.h>
 #include <syscon.h>
 #include <asm/io.h>
+#include <dm/device_compat.h>
 #include "stm32mp1_ddr.h"
 
 static const char *const clkname[] = {
@@ -37,7 +40,7 @@ int stm32mp1_ddr_clk_enable(struct ddr_info *priv, uint32_t mem_speed)
 			ret = clk_enable(&clk);
 
 		if (ret) {
-			printf("error for %s : %d\n", clkname[idx], ret);
+			log_err("error for %s : %d\n", clkname[idx], ret);
 			return ret;
 		}
 	}
@@ -45,13 +48,13 @@ int stm32mp1_ddr_clk_enable(struct ddr_info *priv, uint32_t mem_speed)
 	priv->clk = clk;
 	ddrphy_clk = clk_get_rate(&priv->clk);
 
-	debug("DDR: mem_speed (%d kHz), RCC %d kHz\n",
-	      mem_speed, (u32)(ddrphy_clk / 1000));
+	log_debug("DDR: mem_speed (%d kHz), RCC %d kHz\n",
+		  mem_speed, (u32)(ddrphy_clk / 1000));
 	/* max 10% frequency delta */
 	ddr_clk = abs(ddrphy_clk - mem_speed * 1000);
 	if (ddr_clk > (mem_speed * 100)) {
-		pr_err("DDR expected freq %d kHz, current is %d kHz\n",
-		       mem_speed, (u32)(ddrphy_clk / 1000));
+		log_err("DDR expected freq %d kHz, current is %d kHz\n",
+			mem_speed, (u32)(ddrphy_clk / 1000));
 		return -EINVAL;
 	}
 
@@ -118,7 +121,7 @@ static __maybe_unused int stm32mp1_ddr_setup(struct udevice *dev)
 	config.info.size = ofnode_read_u32_default(node, "st,mem-size", 0);
 	config.info.name = ofnode_read_string(node, "st,mem-name");
 	if (!config.info.name) {
-		debug("%s: no st,mem-name\n", __func__);
+		dev_dbg(dev, "no st,mem-name\n");
 		return -EINVAL;
 	}
 	printf("RAM: %s\n", config.info.name);
@@ -128,12 +131,12 @@ static __maybe_unused int stm32mp1_ddr_setup(struct udevice *dev)
 					 (void *)((u32)&config +
 						  param[idx].offset),
 					 param[idx].size);
-		debug("%s: %s[0x%x] = %d\n", __func__,
-		      param[idx].name, param[idx].size, ret);
+		dev_dbg(dev, "%s: %s[0x%x] = %d\n", __func__,
+			param[idx].name, param[idx].size, ret);
 		if (ret &&
 		    (ret != -FDT_ERR_NOTFOUND || !param[idx].present)) {
-			pr_err("%s: Cannot read %s, error=%d\n",
-			       __func__, param[idx].name, ret);
+			dev_err(dev, "Cannot read %s, error=%d\n",
+				param[idx].name, ret);
 			return -EINVAL;
 		}
 		if (param[idx].present) {
@@ -153,7 +156,7 @@ static __maybe_unused int stm32mp1_ddr_setup(struct udevice *dev)
 
 	ret = clk_get_by_name(dev, "axidcg", &axidcg);
 	if (ret) {
-		debug("%s: Cannot found axidcg\n", __func__);
+		dev_dbg(dev, "%s: Cannot found axidcg\n", __func__);
 		return -EINVAL;
 	}
 	clk_disable(&axidcg); /* disable clock gating during init */
@@ -163,13 +166,13 @@ static __maybe_unused int stm32mp1_ddr_setup(struct udevice *dev)
 	clk_enable(&axidcg); /* enable clock gating */
 
 	/* check size */
-	debug("%s : get_ram_size(%x, %x)\n", __func__,
-	      (u32)priv->info.base, (u32)STM32_DDR_SIZE);
+	dev_dbg(dev, "get_ram_size(%x, %x)\n",
+		(u32)priv->info.base, (u32)STM32_DDR_SIZE);
 
 	priv->info.size = get_ram_size((long *)priv->info.base,
 				       STM32_DDR_SIZE);
 
-	debug("%s : %x\n", __func__, (u32)priv->info.size);
+	dev_dbg(dev, "info.size: %x\n", (u32)priv->info.size);
 
 	/* check memory access for all memory */
 	if (config.info.size != priv->info.size) {
@@ -186,12 +189,11 @@ static int stm32mp1_ddr_probe(struct udevice *dev)
 	struct regmap *map;
 	int ret;
 
-	debug("STM32MP1 DDR probe\n");
 	priv->dev = dev;
 
 	ret = regmap_init_mem(dev_ofnode(dev), &map);
 	if (ret)
-		return ret;
+		return log_ret(ret);
 
 	priv->ctl = regmap_get_range(map, 0);
 	priv->phy = regmap_get_range(map, 1);
@@ -203,7 +205,9 @@ static int stm32mp1_ddr_probe(struct udevice *dev)
 #if !defined(CONFIG_TFABOOT) && \
 	(!defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD))
 	priv->info.size = 0;
-	return stm32mp1_ddr_setup(dev);
+	ret = stm32mp1_ddr_setup(dev);
+
+	return log_ret(ret);
 #else
 	ofnode node = stm32mp1_ddr_get_ofnode(dev);
 	priv->info.size = ofnode_read_u32_default(node, "st,mem-size", 0);