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-rw-r--r--drivers/net/greth.c17
-rw-r--r--drivers/net/phy/natsemi.c45
-rw-r--r--drivers/net/zynq_gem.c16
3 files changed, 65 insertions, 13 deletions
diff --git a/drivers/net/greth.c b/drivers/net/greth.c
index 9bc8a8d1aa..0624eb8cac 100644
--- a/drivers/net/greth.c
+++ b/drivers/net/greth.c
@@ -20,7 +20,7 @@
#include <ambapp.h>
#include <asm/leon.h>
-#include "greth.h"
+#include <grlib/greth.h>
/* Default to 3s timeout on autonegotiation */
#ifndef GRETH_PHY_TIMEOUT_MS
@@ -34,6 +34,13 @@
#define GRETH_PHY_ADR_DEFAULT 0
#endif
+/* Let board select which GRETH to use as network interface, set
+ * this to zero if only one GRETH is available.
+ */
+#ifndef CONFIG_SYS_GRLIB_GRETH_INDEX
+#define CONFIG_SYS_GRLIB_GRETH_INDEX 0
+#endif
+
/* ByPass Cache when reading regs */
#define GRETH_REGLOAD(addr) SPARC_NOCACHE_READ(addr)
/* Write-through cache ==> no bypassing needed on writes */
@@ -593,8 +600,12 @@ int greth_initialize(bd_t * bis)
debug("Scanning for GRETH\n");
- /* Find Device & IRQ via AMBA Plug&Play information */
- if (ambapp_apb_first(VENDOR_GAISLER, GAISLER_ETHMAC, &apbdev) != 1) {
+ /* Find Device & IRQ via AMBA Plug&Play information,
+ * CONFIG_SYS_GRLIB_GRETH_INDEX select which GRETH if multiple
+ * GRETHs in system.
+ */
+ if (ambapp_apb_find(&ambapp_plb, VENDOR_GAISLER, GAISLER_ETHMAC,
+ CONFIG_SYS_GRLIB_GRETH_INDEX, &apbdev) != 1) {
return -1; /* GRETH not found */
}
diff --git a/drivers/net/phy/natsemi.c b/drivers/net/phy/natsemi.c
index ea9fe833ed..d2e4c3c487 100644
--- a/drivers/net/phy/natsemi.c
+++ b/drivers/net/phy/natsemi.c
@@ -53,7 +53,7 @@ static struct phy_driver DP83630_driver = {
/* NatSemi DP83865 */
-static int dp83865_config(struct phy_device *phydev)
+static int dp838xx_config(struct phy_device *phydev)
{
phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, BMCR_RESET);
genphy_config_aneg(phydev);
@@ -105,15 +105,56 @@ static struct phy_driver DP83865_driver = {
.uid = 0x20005c70,
.mask = 0xfffffff0,
.features = PHY_GBIT_FEATURES,
- .config = &dp83865_config,
+ .config = &dp838xx_config,
.startup = &dp83865_startup,
.shutdown = &genphy_shutdown,
};
+/* NatSemi DP83848 */
+static int dp83848_parse_status(struct phy_device *phydev)
+{
+ int mii_reg;
+
+ mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
+
+ if(mii_reg & (BMSR_100FULL | BMSR_100HALF)) {
+ phydev->speed = SPEED_100;
+ } else {
+ phydev->speed = SPEED_10;
+ }
+
+ if (mii_reg & (BMSR_10FULL | BMSR_100FULL)) {
+ phydev->duplex = DUPLEX_FULL;
+ } else {
+ phydev->duplex = DUPLEX_HALF;
+ }
+
+ return 0;
+}
+
+static int dp83848_startup(struct phy_device *phydev)
+{
+ genphy_update_link(phydev);
+ dp83848_parse_status(phydev);
+
+ return 0;
+}
+
+static struct phy_driver DP83848_driver = {
+ .name = "NatSemi DP83848",
+ .uid = 0x20005c90,
+ .mask = 0x2000ff90,
+ .features = PHY_BASIC_FEATURES,
+ .config = &dp838xx_config,
+ .startup = &dp83848_startup,
+ .shutdown = &genphy_shutdown,
+};
+
int phy_natsemi_init(void)
{
phy_register(&DP83630_driver);
phy_register(&DP83865_driver);
+ phy_register(&DP83848_driver);
return 0;
}
diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c
index 9175d2cae8..5637a0d083 100644
--- a/drivers/net/zynq_gem.c
+++ b/drivers/net/zynq_gem.c
@@ -327,13 +327,13 @@ static int zynq_gem_init(struct eth_device *dev, bd_t * bis)
for (i = 0; i < RX_BUF; i++) {
priv->rx_bd[i].status = 0xF0000000;
priv->rx_bd[i].addr =
- ((u32)(priv->rxbuffers) +
+ ((ulong)(priv->rxbuffers) +
(i * PKTSIZE_ALIGN));
}
/* WRAP bit to last BD */
priv->rx_bd[--i].addr |= ZYNQ_GEM_RXBUF_WRAP_MASK;
/* Write RxBDs to IP */
- writel((u32)priv->rx_bd, &regs->rxqbase);
+ writel((ulong)priv->rx_bd, &regs->rxqbase);
/* Setup for DMA Configuration register */
writel(ZYNQ_GEM_DMACR_INIT, &regs->dmacr);
@@ -396,22 +396,22 @@ static int zynq_gem_send(struct eth_device *dev, void *ptr, int len)
struct zynq_gem_regs *regs = (struct zynq_gem_regs *)dev->iobase;
/* setup BD */
- writel((u32)priv->tx_bd, &regs->txqbase);
+ writel((ulong)priv->tx_bd, &regs->txqbase);
/* Setup Tx BD */
memset(priv->tx_bd, 0, sizeof(struct emac_bd));
- priv->tx_bd->addr = (u32)ptr;
+ priv->tx_bd->addr = (ulong)ptr;
priv->tx_bd->status = (len & ZYNQ_GEM_TXBUF_FRMLEN_MASK) |
ZYNQ_GEM_TXBUF_LAST_MASK |
ZYNQ_GEM_TXBUF_WRAP_MASK;
- addr = (u32) ptr;
+ addr = (ulong) ptr;
addr &= ~(ARCH_DMA_MINALIGN - 1);
size = roundup(len, ARCH_DMA_MINALIGN);
flush_dcache_range(addr, addr + size);
- addr = (u32)priv->rxbuffers;
+ addr = (ulong)priv->rxbuffers;
addr &= ~(ARCH_DMA_MINALIGN - 1);
size = roundup((RX_BUF * PKTSIZE_ALIGN), ARCH_DMA_MINALIGN);
flush_dcache_range(addr, addr + size);
@@ -451,7 +451,7 @@ static int zynq_gem_recv(struct eth_device *dev)
u32 addr = current_bd->addr & ZYNQ_GEM_RXBUF_ADD_MASK;
addr &= ~(ARCH_DMA_MINALIGN - 1);
- net_process_received_packet((u8 *)addr, frame_len);
+ net_process_received_packet((u8 *)(ulong)addr, frame_len);
if (current_bd->status & ZYNQ_GEM_RXBUF_SOF_MASK)
priv->rx_first_buf = priv->rxbd_current;
@@ -530,7 +530,7 @@ int zynq_gem_initialize(bd_t *bis, phys_addr_t base_addr,
/* Initialize the bd spaces for tx and rx bd's */
priv->tx_bd = (struct emac_bd *)bd_space;
- priv->rx_bd = (struct emac_bd *)((u32)bd_space + BD_SEPRN_SPACE);
+ priv->rx_bd = (struct emac_bd *)((ulong)bd_space + BD_SEPRN_SPACE);
priv->phyaddr = phy_addr;
priv->emio = emio;