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path: root/drivers/net/designware.c
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Diffstat (limited to 'drivers/net/designware.c')
-rw-r--r--drivers/net/designware.c24
1 files changed, 16 insertions, 8 deletions
diff --git a/drivers/net/designware.c b/drivers/net/designware.c
index a174344b3e..c222197b11 100644
--- a/drivers/net/designware.c
+++ b/drivers/net/designware.c
@@ -13,6 +13,7 @@
#include <cpu_func.h>
#include <dm.h>
#include <errno.h>
+#include <eth_phy.h>
#include <log.h>
#include <miiphy.h>
#include <malloc.h>
@@ -576,6 +577,9 @@ static int dw_phy_init(struct dw_eth_dev *priv, void *dev)
struct phy_device *phydev;
int ret;
+ if (IS_ENABLED(CONFIG_DM_ETH_PHY))
+ eth_phy_set_mdio_bus(dev, NULL);
+
#if IS_ENABLED(CONFIG_DM_MDIO)
phydev = dm_eth_phy_connect(dev);
if (!phydev)
@@ -583,6 +587,9 @@ static int dw_phy_init(struct dw_eth_dev *priv, void *dev)
#else
int phy_addr = -1;
+ if (IS_ENABLED(CONFIG_DM_ETH_PHY))
+ phy_addr = eth_phy_get_addr(dev);
+
#ifdef CONFIG_PHY_ADDR
phy_addr = CONFIG_PHY_ADDR;
#endif
@@ -678,8 +685,8 @@ int designware_eth_probe(struct udevice *dev)
{
struct eth_pdata *pdata = dev_get_plat(dev);
struct dw_eth_dev *priv = dev_get_priv(dev);
- u32 iobase = pdata->iobase;
- ulong ioaddr;
+ phys_addr_t iobase = pdata->iobase;
+ void *ioaddr;
int ret, err;
struct reset_ctl_bulk reset_bulk;
#ifdef CONFIG_CLK
@@ -702,7 +709,6 @@ int designware_eth_probe(struct udevice *dev)
err = clk_enable(&priv->clocks[i]);
if (err && err != -ENOSYS && err != -ENOTSUPP) {
pr_err("failed to enable clock %d\n", i);
- clk_free(&priv->clocks[i]);
goto clk_err;
}
priv->clock_count++;
@@ -740,16 +746,18 @@ int designware_eth_probe(struct udevice *dev)
* or via a PCI bridge, fill in plat before we probe the hardware.
*/
if (IS_ENABLED(CONFIG_PCI) && device_is_on_pci_bus(dev)) {
- dm_pci_read_config32(dev, PCI_BASE_ADDRESS_0, &iobase);
- iobase &= PCI_BASE_ADDRESS_MEM_MASK;
- iobase = dm_pci_mem_to_phys(dev, iobase);
+ u32 pcibase;
+
+ dm_pci_read_config32(dev, PCI_BASE_ADDRESS_0, &pcibase);
+ pcibase &= PCI_BASE_ADDRESS_MEM_MASK;
+ iobase = dm_pci_mem_to_phys(dev, pcibase);
pdata->iobase = iobase;
pdata->phy_interface = PHY_INTERFACE_MODE_RMII;
}
- debug("%s, iobase=%x, priv=%p\n", __func__, iobase, priv);
- ioaddr = iobase;
+ debug("%s, iobase=%pa, priv=%p\n", __func__, &iobase, priv);
+ ioaddr = phys_to_virt(iobase);
priv->mac_regs_p = (struct eth_mac_regs *)ioaddr;
priv->dma_regs_p = (struct eth_dma_regs *)(ioaddr + DW_DMA_BASE_OFFSET);
priv->interface = pdata->phy_interface;