diff options
Diffstat (limited to 'drivers/mtd/spi')
| -rw-r--r-- | drivers/mtd/spi/Kconfig | 9 | ||||
| -rw-r--r-- | drivers/mtd/spi/spi-nor-core.c | 8 | ||||
| -rw-r--r-- | drivers/mtd/spi/spi-nor-ids.c | 3 |
3 files changed, 17 insertions, 3 deletions
diff --git a/drivers/mtd/spi/Kconfig b/drivers/mtd/spi/Kconfig index a9617c6c58..732b076045 100644 --- a/drivers/mtd/spi/Kconfig +++ b/drivers/mtd/spi/Kconfig @@ -82,6 +82,7 @@ if SPI_FLASH config BOOTDEV_SPI_FLASH bool "SPI Flash bootdev support" + depends on BOOTSTD help Enable a boot device for SPI flash. This allows reading a script from SPI flash so that it can be used to boot an Operating System. @@ -107,7 +108,6 @@ config SPI_FLASH_SMART_HWCAPS config SPI_NOR_BOOT_SOFT_RESET_EXT_INVERT bool "Command extension type is INVERT for Software Reset on boot" - default n help Because of SFDP information can not be get before boot. So define command extension type is INVERT when Software Reset on boot only. @@ -134,6 +134,13 @@ config SPI_FLASH_BAR Bank/Extended address registers are used to access the flash which has size > 16MiB in 3-byte addressing. +config SPI_FLASH_LOCK + bool "Enable the Locking feature" + default y + help + Enable the SPI flash lock support. By default this is set to y. + If you intend not to use the lock support you should say n here. + config SPI_FLASH_UNLOCK_ALL bool "Unlock the entire SPI flash on u-boot startup" default y diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index db20feb4da..9a1801ba93 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -1100,6 +1100,7 @@ static int spansion_erase_non_uniform(struct spi_nor *nor, u32 addr, } #endif +#if defined(CONFIG_SPI_FLASH_LOCK) #if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST) /* Write status register and ensure bits in mask match written values */ static int write_sr_and_check(struct spi_nor *nor, u8 status_new, u8 mask) @@ -1387,6 +1388,7 @@ static int stm_is_unlocked(struct spi_nor *nor, loff_t ofs, uint64_t len) return stm_is_unlocked_sr(nor, ofs, len, status); } #endif /* CONFIG_SPI_FLASH_STMICRO */ +#endif static const struct flash_info *spi_nor_read_id(struct spi_nor *nor) { @@ -1462,6 +1464,7 @@ read_err: return ret; } +#if defined(CONFIG_SPI_FLASH_LOCK) #ifdef CONFIG_SPI_FLASH_SST /* * sst26 flash series has its own block protection implementation: @@ -1730,6 +1733,8 @@ sst_write_err: return ret; } #endif +#endif + /* * Write an address range to the nor chip. Data must be written in * FLASH_PAGESIZE chunks. The address range may be any size provided @@ -4104,6 +4109,7 @@ int spi_nor_scan(struct spi_nor *nor) mtd->_read = spi_nor_read; mtd->_write = spi_nor_write; +#if defined(CONFIG_SPI_FLASH_LOCK) #if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST) /* NOR protection support for STmicro/Micron chips and similar */ if (JEDEC_MFR(info) == SNOR_MFR_ST || @@ -4127,7 +4133,7 @@ int spi_nor_scan(struct spi_nor *nor) nor->flash_is_unlocked = sst26_is_unlocked; } #endif - +#endif if (info->flags & USE_FSR) nor->flags |= SNOR_F_USE_FSR; if (info->flags & SPI_NOR_HAS_TB) diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c index b03dd1cd08..3cb132dcff 100644 --- a/drivers/mtd/spi/spi-nor-ids.c +++ b/drivers/mtd/spi/spi-nor-ids.c @@ -3,7 +3,7 @@ * * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc. * Copyright (C) 2016 Jagan Teki <jagan@openedev.com> - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ */ #include <common.h> @@ -532,6 +532,7 @@ const struct flash_info spi_nor_ids[] = { { INFO("XM25QH64A", 0x207017, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { INFO("XM25QH64C", 0x204017, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { INFO("XM25QH128A", 0x207018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { INFO("XM25QU128C", 0x204118, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, #endif #ifdef CONFIG_SPI_FLASH_XTX /* XTX Technology Limited */ |