diff options
Diffstat (limited to 'drivers/i2c')
| -rw-r--r-- | drivers/i2c/Kconfig | 182 | ||||
| -rw-r--r-- | drivers/i2c/Makefile | 2 | ||||
| -rw-r--r-- | drivers/i2c/designware_i2c.c | 18 | ||||
| -rw-r--r-- | drivers/i2c/fsl_i2c.c | 8 | ||||
| -rw-r--r-- | drivers/i2c/i2c-emul-uclass.c | 2 | ||||
| -rw-r--r-- | drivers/i2c/i2c-uclass.c | 10 | ||||
| -rw-r--r-- | drivers/i2c/i2c_core.c | 5 | ||||
| -rw-r--r-- | drivers/i2c/ihs_i2c.c | 228 | ||||
| -rw-r--r-- | drivers/i2c/mv_i2c.c | 2 | ||||
| -rw-r--r-- | drivers/i2c/mvtwsi.c | 13 | ||||
| -rw-r--r-- | drivers/i2c/mxc_i2c.c | 26 | ||||
| -rw-r--r-- | drivers/i2c/omap24xx_i2c.c | 52 | ||||
| -rw-r--r-- | drivers/i2c/rcar_i2c.c | 8 | ||||
| -rw-r--r-- | drivers/i2c/s3c24x0_i2c.c | 8 | ||||
| -rw-r--r-- | drivers/i2c/sh_i2c.c | 10 | ||||
| -rw-r--r-- | drivers/i2c/soft_i2c.c | 77 |
16 files changed, 202 insertions, 449 deletions
diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig index 63d03a3ceb..57cac4483f 100644 --- a/drivers/i2c/Kconfig +++ b/drivers/i2c/Kconfig @@ -47,6 +47,35 @@ config SPL_DM_I2C device (bus child) info is kept as parent platdata. The interface is defined in include/i2c.h. +config SYS_I2C_LEGACY + bool "Enable legacy I2C subsystem and drivers" + depends on !DM_I2C + help + Enable the legacy I2C subsystem and drivers. While this is + deprecated in U-Boot itself, this can be useful in some situations + in SPL or TPL. + +config SPL_SYS_I2C_LEGACY + bool "Enable legacy I2C subsystem and drivers in SPL" + depends on SUPPORT_SPL && !SPL_DM_I2C + help + Enable the legacy I2C subsystem and drivers in SPL. This is useful + in some size constrained situations. + +config TPL_SYS_I2C_LEGACY + bool "Enable legacy I2C subsystem and drivers in TPL" + depends on SUPPORT_TPL && !SPL_DM_I2C + help + Enable the legacy I2C subsystem and drivers in TPL. This is useful + in some size constrained situations. + +config SYS_I2C_EARLY_INIT + bool "Enable legacy I2C subsystem early in boot" + depends on BOARD_EARLY_INIT_F && SPL_SYS_I2C_LEGACY && SYS_I2C_MXC + help + Add the function prototype for i2c_early_init_f which is called in + board_early_init_f. + config I2C_CROS_EC_TUNNEL tristate "Chrome OS EC tunnel I2C bus" depends on CROS_EC @@ -124,11 +153,36 @@ config SYS_I2C_IPROC config SYS_I2C_FSL bool "Freescale I2C bus driver" - depends on DM_I2C help Add support for Freescale I2C busses as used on MPC8240, MPC8245, and MPC85xx processors. +if SYS_I2C_FSL && (SYS_I2C_LEGACY || SPL_SYS_I2C_LEGACY) +config SYS_FSL_I2C_OFFSET + hex "Offset from the IMMR of the address of the first I2C controller" + +config SYS_FSL_HAS_I2C2_OFFSET + bool "Support a second I2C controller" + +config SYS_FSL_I2C2_OFFSET + hex "Offset from the IMMR of the address of the second I2C controller" + depends on SYS_FSL_HAS_I2C2_OFFSET + +config SYS_FSL_HAS_I2C3_OFFSET + bool "Support a third I2C controller" + +config SYS_FSL_I2C3_OFFSET + hex "Offset from the IMMR of the address of the third I2C controller" + depends on SYS_FSL_HAS_I2C3_OFFSET + +config SYS_FSL_HAS_I2C4_OFFSET + bool "Support a fourth I2C controller" + +config SYS_FSL_I2C4_OFFSET + hex "Offset from the IMMR of the address of the fourth I2C controller" + depends on SYS_FSL_HAS_I2C4_OFFSET +endif + config SYS_I2C_CADENCE tristate "Cadence I2C Controller" depends on DM_I2C @@ -139,7 +193,6 @@ config SYS_I2C_CADENCE config SYS_I2C_CA tristate "Cortina-Access I2C Controller" depends on DM_I2C && CORTINA_PLATFORM - default n help Add support for the Cortina Access I2C host controller. Say yes here to select Cortina-Access I2C Host Controller. @@ -152,7 +205,6 @@ config SYS_I2C_DAVINCI config SYS_I2C_DW bool "Designware I2C Controller" - default n help Say yes here to select the Designware I2C Host Controller. This controller is used in various SoCs, e.g. the ST SPEAr, Altera @@ -205,10 +257,7 @@ config SYS_I2C_MXC channels and operating on standard mode up to 100 kbits/s and fast mode up to 400 kbits/s. -# These settings are not used with DM_I2C, however SPL doesn't use -# DM_I2C even if DM_I2C is enabled, and so might use these settings even -# when main u-boot does not! -if SYS_I2C_MXC && (!DM_I2C || SPL) +if SYS_I2C_MXC && (SYS_I2C_LEGACY || SPL_SYS_I2C_LEGACY) config SYS_I2C_MXC_I2C1 bool "NXP MXC I2C1" help @@ -267,7 +316,7 @@ config SYS_MXC_I2C1_SPEED MXC I2C Channel 1 speed config SYS_MXC_I2C1_SLAVE - int "I2C1 Slave" + hex "I2C1 Slave" default 0 help MXC I2C1 Slave @@ -282,7 +331,7 @@ config SYS_MXC_I2C2_SPEED MXC I2C Channel 2 speed config SYS_MXC_I2C2_SLAVE - int "I2C2 Slave" + hex "I2C2 Slave" default 0 help MXC I2C2 Slave @@ -296,7 +345,7 @@ config SYS_MXC_I2C3_SPEED MXC I2C Channel 3 speed config SYS_MXC_I2C3_SLAVE - int "I2C3 Slave" + hex "I2C3 Slave" default 0 help MXC I2C3 Slave @@ -310,7 +359,7 @@ config SYS_MXC_I2C4_SPEED MXC I2C Channel 4 speed config SYS_MXC_I2C4_SLAVE - int "I2C4 Slave" + hex "I2C4 Slave" default 0 help MXC I2C4 Slave @@ -324,7 +373,7 @@ config SYS_MXC_I2C5_SPEED MXC I2C Channel 5 speed config SYS_MXC_I2C5_SLAVE - int "I2C5 Slave" + hex "I2C5 Slave" default 0 help MXC I2C5 Slave @@ -338,7 +387,7 @@ config SYS_MXC_I2C6_SPEED MXC I2C Channel 6 speed config SYS_MXC_I2C6_SLAVE - int "I2C6 Slave" + hex "I2C6 Slave" default 0 help MXC I2C6 Slave @@ -352,7 +401,7 @@ config SYS_MXC_I2C7_SPEED MXC I2C Channel 7 speed config SYS_MXC_I2C7_SLAVE - int "I2C7 Slave" + hex "I2C7 Slave" default 0 help MXC I2C7 Slave @@ -366,7 +415,7 @@ config SYS_MXC_I2C8_SPEED MXC I2C Channel 8 speed config SYS_MXC_I2C8_SLAVE - int "I2C8 Slave" + hex "I2C8 Slave" default 0 help MXC I2C8 Slave @@ -394,20 +443,6 @@ config SYS_I2C_OMAP24XX help Add support for the OMAP2+ I2C driver. -if SYS_I2C_OMAP24XX -config SYS_OMAP24_I2C_SLAVE - int "I2C Slave addr channel 0" - default 1 - help - OMAP24xx I2C Slave address channel 0 - -config SYS_OMAP24_I2C_SPEED - int "I2C Slave channel 0 speed" - default 100000 - help - OMAP24xx Slave speed channel 0 -endif - config SYS_I2C_RCAR_I2C bool "Renesas RCar I2C driver" depends on (RCAR_GEN3 || RCAR_GEN2) && DM_I2C @@ -437,6 +472,73 @@ config SYS_I2C_SANDBOX bus. Devices can be attached to the bus using the device tree which specifies the driver to use. See sandbox.dts as an example. +config SYS_I2C_SH + bool "Legacy SuperH I2C interface" + depends on ARCH_RMOBILE && SYS_I2C_LEGACY + help + Enable the legacy SuperH I2C interface. + +if SYS_I2C_SH +config SYS_I2C_SH_NUM_CONTROLLERS + int + default 5 + +config SYS_I2C_SH_BASE0 + hex + default 0xE6820000 + +config SYS_I2C_SH_BASE1 + hex + default 0xE6822000 + +config SYS_I2C_SH_BASE2 + hex + default 0xE6824000 + +config SYS_I2C_SH_BASE3 + hex + default 0xE6826000 + +config SYS_I2C_SH_BASE4 + hex + default 0xE6828000 + +config SH_I2C_8BIT + bool + default y + +config SH_I2C_DATA_HIGH + int + default 4 + +config SH_I2C_DATA_LOW + int + default 5 + +config SH_I2C_CLOCK + int + default 104000000 +endif + +config SYS_I2C_SOFT + bool "Legacy software I2C interface" + help + Enable the legacy software defined I2C interface + +config SYS_I2C_SOFT_SPEED + int "Software I2C bus speed" + depends on SYS_I2C_SOFT + default 100000 + help + Speed of the software I2C bus + +config SYS_I2C_SOFT_SLAVE + hex "Software I2C slave address" + depends on SYS_I2C_SOFT + default 0xfe + help + Slave address of the software I2C bus + config SYS_I2C_OCTEON bool "Octeon II/III/TX/TX2 I2C driver" depends on (ARCH_OCTEON || ARCH_OCTEONTX || ARCH_OCTEONTX2) && DM_I2C @@ -449,7 +551,7 @@ config SYS_I2C_OCTEON config SYS_I2C_S3C24X0 bool "Samsung I2C driver" - depends on ARCH_EXYNOS4 && DM_I2C + depends on (ARCH_EXYNOS4 || ARCH_EXYNOS5) && DM_I2C help Support for Samsung I2C controller as Samsung SoCs. @@ -511,7 +613,6 @@ config SYS_I2C_VERSATILE config SYS_I2C_MVTWSI bool "Marvell I2C driver" - depends on DM_I2C help Support for Marvell I2C controllers as used on the orion5x and kirkwood SoC families. @@ -526,6 +627,25 @@ config TEGRA186_BPMP_I2C by the BPMP, and can only be accessed by the main CPU via IPC requests to the BPMP. This driver covers the latter case. +config SYS_I2C_SLAVE + hex "I2C Slave address channel (all buses)" + depends on SYS_I2C_LEGACY || SPL_SYS_I2C_LEGACY || TPL_SYS_I2C_LEGACY + default 0xfe + help + I2C Slave address channel 0 for all buses in the legacy drivers. + Many boards/controllers/drivers don't support an I2C slave + interface so provide a default slave address for them for use in + common code. A real value for CONFIG_SYS_I2C_SLAVE should be + defined for any board which does support a slave interface and + this default used otherwise. + +config SYS_I2C_SPEED + int "I2C Slave channel 0 speed (all buses)" + depends on SYS_I2C_LEGACY || SPL_SYS_I2C_LEGACY || TPL_SYS_I2C_LEGACY + default 100000 + help + I2C Slave speed channel 0 for all buses in the legacy drivers. + config SYS_I2C_BUS_MAX int "Max I2C busses" depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_SOCFPGA diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile index c16ebb2491..67841bf3e0 100644 --- a/drivers/i2c/Makefile +++ b/drivers/i2c/Makefile @@ -11,7 +11,7 @@ obj-$(CONFIG_$(SPL_)I2C_CROS_EC_TUNNEL) += cros_ec_tunnel.o obj-$(CONFIG_$(SPL_)I2C_CROS_EC_LDO) += cros_ec_ldo.o obj-$(CONFIG_I2C_MV) += mv_i2c.o -obj-$(CONFIG_SYS_I2C_LEGACY) += i2c_core.o +obj-$(CONFIG_$(SPL_)SYS_I2C_LEGACY) += i2c_core.o obj-$(CONFIG_SYS_I2C_ASPEED) += ast_i2c.o obj-$(CONFIG_SYS_I2C_AT91) += at91_i2c.o obj-$(CONFIG_SYS_I2C_CADENCE) += i2c-cdns.o diff --git a/drivers/i2c/designware_i2c.c b/drivers/i2c/designware_i2c.c index e57eed0f6c..d95f77649e 100644 --- a/drivers/i2c/designware_i2c.c +++ b/drivers/i2c/designware_i2c.c @@ -674,24 +674,6 @@ U_BOOT_I2C_ADAP_COMPLETE(dw_0, dw_i2c_init, dw_i2c_probe, dw_i2c_read, dw_i2c_write, dw_i2c_set_bus_speed, CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 0) -#if CONFIG_SYS_I2C_BUS_MAX >= 2 -U_BOOT_I2C_ADAP_COMPLETE(dw_1, dw_i2c_init, dw_i2c_probe, dw_i2c_read, - dw_i2c_write, dw_i2c_set_bus_speed, - CONFIG_SYS_I2C_SPEED1, CONFIG_SYS_I2C_SLAVE1, 1) -#endif - -#if CONFIG_SYS_I2C_BUS_MAX >= 3 -U_BOOT_I2C_ADAP_COMPLETE(dw_2, dw_i2c_init, dw_i2c_probe, dw_i2c_read, - dw_i2c_write, dw_i2c_set_bus_speed, - CONFIG_SYS_I2C_SPEED2, CONFIG_SYS_I2C_SLAVE2, 2) -#endif - -#if CONFIG_SYS_I2C_BUS_MAX >= 4 -U_BOOT_I2C_ADAP_COMPLETE(dw_3, dw_i2c_init, dw_i2c_probe, dw_i2c_read, - dw_i2c_write, dw_i2c_set_bus_speed, - CONFIG_SYS_I2C_SPEED3, CONFIG_SYS_I2C_SLAVE3, 3) -#endif - #else /* CONFIG_DM_I2C */ /* The DM I2C functions */ diff --git a/drivers/i2c/fsl_i2c.c b/drivers/i2c/fsl_i2c.c index 2200303ea8..eafd801cdc 100644 --- a/drivers/i2c/fsl_i2c.c +++ b/drivers/i2c/fsl_i2c.c @@ -538,24 +538,24 @@ static uint fsl_i2c_set_bus_speed(struct i2c_adapter *adap, uint speed) */ U_BOOT_I2C_ADAP_COMPLETE(fsl_0, fsl_i2c_init, fsl_i2c_probe_chip, fsl_i2c_read, fsl_i2c_write, fsl_i2c_set_bus_speed, - CONFIG_SYS_FSL_I2C_SPEED, CONFIG_SYS_FSL_I2C_SLAVE, + CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 0) #ifdef CONFIG_SYS_FSL_I2C2_OFFSET U_BOOT_I2C_ADAP_COMPLETE(fsl_1, fsl_i2c_init, fsl_i2c_probe_chip, fsl_i2c_read, fsl_i2c_write, fsl_i2c_set_bus_speed, - CONFIG_SYS_FSL_I2C2_SPEED, CONFIG_SYS_FSL_I2C2_SLAVE, + CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 1) #endif #ifdef CONFIG_SYS_FSL_I2C3_OFFSET U_BOOT_I2C_ADAP_COMPLETE(fsl_2, fsl_i2c_init, fsl_i2c_probe_chip, fsl_i2c_read, fsl_i2c_write, fsl_i2c_set_bus_speed, - CONFIG_SYS_FSL_I2C3_SPEED, CONFIG_SYS_FSL_I2C3_SLAVE, + CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 2) #endif #ifdef CONFIG_SYS_FSL_I2C4_OFFSET U_BOOT_I2C_ADAP_COMPLETE(fsl_3, fsl_i2c_init, fsl_i2c_probe_chip, fsl_i2c_read, fsl_i2c_write, fsl_i2c_set_bus_speed, - CONFIG_SYS_FSL_I2C4_SPEED, CONFIG_SYS_FSL_I2C4_SLAVE, + CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 3) #endif #else /* CONFIG_DM_I2C */ diff --git a/drivers/i2c/i2c-emul-uclass.c b/drivers/i2c/i2c-emul-uclass.c index aeec6aa9fa..1107cf309f 100644 --- a/drivers/i2c/i2c-emul-uclass.c +++ b/drivers/i2c/i2c-emul-uclass.c @@ -79,7 +79,7 @@ UCLASS_DRIVER(i2c_emul) = { UCLASS_DRIVER(i2c_emul_parent) = { .id = UCLASS_I2C_EMUL_PARENT, .name = "i2c_emul_parent", -#if !CONFIG_IS_ENABLED(OF_PLATDATA) +#if CONFIG_IS_ENABLED(OF_REAL) .post_bind = dm_scan_fdt_dev, #endif }; diff --git a/drivers/i2c/i2c-uclass.c b/drivers/i2c/i2c-uclass.c index db1c9d9462..71bc2b5b8a 100644 --- a/drivers/i2c/i2c-uclass.c +++ b/drivers/i2c/i2c-uclass.c @@ -633,7 +633,7 @@ int i2c_deblock(struct udevice *bus) return ops->deblock(bus); } -#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) +#if CONFIG_IS_ENABLED(OF_REAL) int i2c_chip_of_to_plat(struct udevice *dev, struct dm_i2c_chip *chip) { int addr; @@ -655,7 +655,7 @@ int i2c_chip_of_to_plat(struct udevice *dev, struct dm_i2c_chip *chip) static int i2c_pre_probe(struct udevice *dev) { -#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) +#if CONFIG_IS_ENABLED(OF_REAL) struct dm_i2c_bus *i2c = dev_get_uclass_priv(dev); unsigned int max = 0; ofnode node; @@ -678,7 +678,7 @@ static int i2c_pre_probe(struct udevice *dev) static int i2c_post_probe(struct udevice *dev) { -#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) +#if CONFIG_IS_ENABLED(OF_REAL) struct dm_i2c_bus *i2c = dev_get_uclass_priv(dev); i2c->speed_hz = dev_read_u32_default(dev, "clock-frequency", @@ -692,7 +692,7 @@ static int i2c_post_probe(struct udevice *dev) static int i2c_child_post_bind(struct udevice *dev) { -#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) +#if CONFIG_IS_ENABLED(OF_REAL) struct dm_i2c_chip *plat = dev_get_parent_plat(dev); if (!dev_has_ofnode(dev)) @@ -709,7 +709,7 @@ static int i2c_post_bind(struct udevice *dev) debug("%s: %s, seq=%d\n", __func__, dev->name, dev_seq(dev)); -#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) +#if CONFIG_IS_ENABLED(OF_REAL) ret = dm_scan_fdt_dev(dev); #endif return ret; diff --git a/drivers/i2c/i2c_core.c b/drivers/i2c/i2c_core.c index 85cf75ecd9..09f91e674d 100644 --- a/drivers/i2c/i2c_core.c +++ b/drivers/i2c/i2c_core.c @@ -190,11 +190,6 @@ __weak void i2c_init_board(void) { } -/* implement possible for i2c specific early i2c init */ -__weak void i2c_early_init_f(void) -{ -} - /* * i2c_init_all(): * diff --git a/drivers/i2c/ihs_i2c.c b/drivers/i2c/ihs_i2c.c index 02f0144930..ecca90628e 100644 --- a/drivers/i2c/ihs_i2c.c +++ b/drivers/i2c/ihs_i2c.c @@ -6,19 +6,14 @@ #include <common.h> #include <i2c.h> -#if CONFIG_IS_ENABLED(DM_I2C) #include <dm.h> #include <regmap.h> -#else -#include <gdsys_fpga.h> -#endif #include <log.h> #include <asm/global_data.h> #include <asm/unaligned.h> #include <linux/bitops.h> #include <linux/delay.h> -#if CONFIG_IS_ENABLED(DM_I2C) struct ihs_i2c_priv { uint speed; struct regmap *map; @@ -39,37 +34,6 @@ struct ihs_i2c_regs { #define ihs_i2c_get(map, member, valp) \ regmap_get(map, struct ihs_i2c_regs, member, valp) -#else /* !CONFIG_DM_I2C */ -DECLARE_GLOBAL_DATA_PTR; - -#ifdef CONFIG_SYS_I2C_IHS_DUAL - -#define I2C_SET_REG(fld, val) \ - do { \ - if (I2C_ADAP_HWNR & 0x10) \ - FPGA_SET_REG(I2C_ADAP_HWNR & 0xf, i2c1.fld, val); \ - else \ - FPGA_SET_REG(I2C_ADAP_HWNR, i2c0.fld, val); \ - } while (0) -#else -#define I2C_SET_REG(fld, val) \ - FPGA_SET_REG(I2C_ADAP_HWNR, i2c0.fld, val) -#endif - -#ifdef CONFIG_SYS_I2C_IHS_DUAL -#define I2C_GET_REG(fld, val) \ - do { \ - if (I2C_ADAP_HWNR & 0x10) \ - FPGA_GET_REG(I2C_ADAP_HWNR & 0xf, i2c1.fld, val); \ - else \ - FPGA_GET_REG(I2C_ADAP_HWNR, i2c0.fld, val); \ - } while (0) -#else -#define I2C_GET_REG(fld, val) \ - FPGA_GET_REG(I2C_ADAP_HWNR, i2c0.fld, val) -#endif -#endif /* CONFIG_DM_I2C */ - enum { I2CINT_ERROR_EV = BIT(13), I2CINT_TRANSMIT_EV = BIT(14), @@ -91,23 +55,13 @@ enum { I2COP_READ = 1, }; -#if CONFIG_IS_ENABLED(DM_I2C) static int wait_for_int(struct udevice *dev, int read) -#else -static int wait_for_int(bool read) -#endif { u16 val; uint ctr = 0; -#if CONFIG_IS_ENABLED(DM_I2C) struct ihs_i2c_priv *priv = dev_get_priv(dev); -#endif -#if CONFIG_IS_ENABLED(DM_I2C) ihs_i2c_get(priv->map, interrupt_status, &val); -#else - I2C_GET_REG(interrupt_status, &val); -#endif /* Wait until error or receive/transmit interrupt was raised */ while (!(val & (I2CINT_ERROR_EV | (read ? I2CINT_RECEIVE_EV : I2CINT_TRANSMIT_EV)))) { @@ -116,40 +70,24 @@ static int wait_for_int(bool read) debug("%s: timed out\n", __func__); return -ETIMEDOUT; } -#if CONFIG_IS_ENABLED(DM_I2C) ihs_i2c_get(priv->map, interrupt_status, &val); -#else - I2C_GET_REG(interrupt_status, &val); -#endif } return (val & I2CINT_ERROR_EV) ? -EIO : 0; } -#if CONFIG_IS_ENABLED(DM_I2C) static int ihs_i2c_transfer(struct udevice *dev, uchar chip, uchar *buffer, int len, int read, bool is_last) -#else -static int ihs_i2c_transfer(uchar chip, uchar *buffer, int len, bool read, - bool is_last) -#endif { u16 val; u16 data; int res; -#if CONFIG_IS_ENABLED(DM_I2C) struct ihs_i2c_priv *priv = dev_get_priv(dev); -#endif /* Clear interrupt status */ data = I2CINT_ERROR_EV | I2CINT_RECEIVE_EV | I2CINT_TRANSMIT_EV; -#if CONFIG_IS_ENABLED(DM_I2C) ihs_i2c_set(priv->map, interrupt_status, data); ihs_i2c_get(priv->map, interrupt_status, &val); -#else - I2C_SET_REG(interrupt_status, data); - I2C_GET_REG(interrupt_status, &val); -#endif /* If we want to write and have data, write the bytes to the mailbox */ if (!read && len) { @@ -157,11 +95,7 @@ static int ihs_i2c_transfer(uchar chip, uchar *buffer, int len, bool read, if (len > 1) val |= buffer[1] << 8; -#if CONFIG_IS_ENABLED(DM_I2C) ihs_i2c_set(priv->map, write_mailbox_ext, val); -#else - I2C_SET_REG(write_mailbox_ext, val); -#endif } data = I2CMB_NATIVE @@ -170,17 +104,9 @@ static int ihs_i2c_transfer(uchar chip, uchar *buffer, int len, bool read, | ((len > 1) ? I2CMB_2BYTE : 0) | (is_last ? 0 : I2CMB_HOLD_BUS); -#if CONFIG_IS_ENABLED(DM_I2C) ihs_i2c_set(priv->map, write_mailbox, data); -#else - I2C_SET_REG(write_mailbox, data); -#endif -#if CONFIG_IS_ENABLED(DM_I2C) res = wait_for_int(dev, read); -#else - res = wait_for_int(read); -#endif if (res) { if (res == -ETIMEDOUT) debug("%s: time out while waiting for event\n", __func__); @@ -190,11 +116,7 @@ static int ihs_i2c_transfer(uchar chip, uchar *buffer, int len, bool read, /* If we want to read, get the bytes from the mailbox */ if (read) { -#if CONFIG_IS_ENABLED(DM_I2C) ihs_i2c_get(priv->map, read_mailbox_ext, &val); -#else - I2C_GET_REG(read_mailbox_ext, &val); -#endif buffer[0] = val & 0xff; if (len > 1) buffer[1] = val >> 8; @@ -203,12 +125,7 @@ static int ihs_i2c_transfer(uchar chip, uchar *buffer, int len, bool read, return 0; } -#if CONFIG_IS_ENABLED(DM_I2C) static int ihs_i2c_send_buffer(struct udevice *dev, uchar chip, u8 *data, int len, bool hold_bus, int read) -#else -static int ihs_i2c_send_buffer(uchar chip, u8 *data, int len, bool hold_bus, - int read) -#endif { int res; @@ -216,13 +133,8 @@ static int ihs_i2c_send_buffer(uchar chip, u8 *data, int len, bool hold_bus, int transfer = min(len, 2); bool is_last = len <= transfer; -#if CONFIG_IS_ENABLED(DM_I2C) res = ihs_i2c_transfer(dev, chip, data, transfer, read, hold_bus ? false : is_last); -#else - res = ihs_i2c_transfer(chip, data, transfer, read, - hold_bus ? false : is_last); -#endif if (res) return res; @@ -233,27 +145,14 @@ static int ihs_i2c_send_buffer(uchar chip, u8 *data, int len, bool hold_bus, return 0; } -#if CONFIG_IS_ENABLED(DM_I2C) static int ihs_i2c_address(struct udevice *dev, uchar chip, u8 *addr, int alen, bool hold_bus) -#else -static int ihs_i2c_address(uchar chip, u8 *addr, int alen, bool hold_bus) -#endif { -#if CONFIG_IS_ENABLED(DM_I2C) return ihs_i2c_send_buffer(dev, chip, addr, alen, hold_bus, I2COP_WRITE); -#else - return ihs_i2c_send_buffer(chip, addr, alen, hold_bus, I2COP_WRITE); -#endif } -#if CONFIG_IS_ENABLED(DM_I2C) static int ihs_i2c_access(struct udevice *dev, uchar chip, u8 *addr, int alen, uchar *buffer, int len, int read) -#else -static int ihs_i2c_access(struct i2c_adapter *adap, uchar chip, u8 *addr, - int alen, uchar *buffer, int len, int read) -#endif { int res; @@ -261,23 +160,13 @@ static int ihs_i2c_access(struct i2c_adapter *adap, uchar chip, u8 *addr, if (len <= 0) return -EINVAL; -#if CONFIG_IS_ENABLED(DM_I2C) res = ihs_i2c_address(dev, chip, addr, alen, len); -#else - res = ihs_i2c_address(chip, addr, alen, len); -#endif if (res) return res; -#if CONFIG_IS_ENABLED(DM_I2C) return ihs_i2c_send_buffer(dev, chip, buffer, len, false, read); -#else - return ihs_i2c_send_buffer(chip, buffer, len, false, read); -#endif } -#if CONFIG_IS_ENABLED(DM_I2C) - int ihs_i2c_probe(struct udevice *bus) { struct ihs_i2c_priv *priv = dev_get_priv(bus); @@ -358,120 +247,3 @@ U_BOOT_DRIVER(i2c_ihs) = { .priv_auto = sizeof(struct ihs_i2c_priv), .ops = &ihs_i2c_ops, }; - -#else /* CONFIG_DM_I2C */ - -static void ihs_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr) -{ -#ifdef CONFIG_SYS_I2C_INIT_BOARD - /* - * Call board specific i2c bus reset routine before accessing the - * environment, which might be in a chip on that bus. For details - * about this problem see doc/I2C_Edge_Conditions. - */ - i2c_init_board(); -#endif -} - -static int ihs_i2c_probe(struct i2c_adapter *adap, uchar chip) -{ - uchar buffer[2]; - int res; - - res = ihs_i2c_transfer(chip, buffer, 0, I2COP_READ, true); - if (res) - return res; - - return 0; -} - -static int ihs_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr, - int alen, uchar *buffer, int len) -{ - u8 addr_bytes[4]; - - put_unaligned_le32(addr, addr_bytes); - - return ihs_i2c_access(adap, chip, addr_bytes, alen, buffer, len, - I2COP_READ); -} - -static int ihs_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr, - int alen, uchar *buffer, int len) -{ - u8 addr_bytes[4]; - - put_unaligned_le32(addr, addr_bytes); - - return ihs_i2c_access(adap, chip, addr_bytes, alen, buffer, len, - I2COP_WRITE); -} - -static unsigned int ihs_i2c_set_bus_speed(struct i2c_adapter *adap, - unsigned int speed) -{ - if (speed != adap->speed) - return -EINVAL; - return speed; -} - -/* - * Register IHS i2c adapters - */ -#ifdef CONFIG_SYS_I2C_IHS_CH0 -U_BOOT_I2C_ADAP_COMPLETE(ihs0, ihs_i2c_init, ihs_i2c_probe, - ihs_i2c_read, ihs_i2c_write, - ihs_i2c_set_bus_speed, - CONFIG_SYS_I2C_IHS_SPEED_0, - CONFIG_SYS_I2C_IHS_SLAVE_0, 0) -#ifdef CONFIG_SYS_I2C_IHS_DUAL -U_BOOT_I2C_ADAP_COMPLETE(ihs0_1, ihs_i2c_init, ihs_i2c_probe, - ihs_i2c_read, ihs_i2c_write, - ihs_i2c_set_bus_speed, - CONFIG_SYS_I2C_IHS_SPEED_0_1, - CONFIG_SYS_I2C_IHS_SLAVE_0_1, 16) -#endif -#endif -#ifdef CONFIG_SYS_I2C_IHS_CH1 -U_BOOT_I2C_ADAP_COMPLETE(ihs1, ihs_i2c_init, ihs_i2c_probe, - ihs_i2c_read, ihs_i2c_write, - ihs_i2c_set_bus_speed, - CONFIG_SYS_I2C_IHS_SPEED_1, - CONFIG_SYS_I2C_IHS_SLAVE_1, 1) -#ifdef CONFIG_SYS_I2C_IHS_DUAL -U_BOOT_I2C_ADAP_COMPLETE(ihs1_1, ihs_i2c_init, ihs_i2c_probe, - ihs_i2c_read, ihs_i2c_write, - ihs_i2c_set_bus_speed, - CONFIG_SYS_I2C_IHS_SPEED_1_1, - CONFIG_SYS_I2C_IHS_SLAVE_1_1, 17) -#endif -#endif -#ifdef CONFIG_SYS_I2C_IHS_CH2 -U_BOOT_I2C_ADAP_COMPLETE(ihs2, ihs_i2c_init, ihs_i2c_probe, - ihs_i2c_read, ihs_i2c_write, - ihs_i2c_set_bus_speed, - CONFIG_SYS_I2C_IHS_SPEED_2, - CONFIG_SYS_I2C_IHS_SLAVE_2, 2) -#ifdef CONFIG_SYS_I2C_IHS_DUAL -U_BOOT_I2C_ADAP_COMPLETE(ihs2_1, ihs_i2c_init, ihs_i2c_probe, - ihs_i2c_read, ihs_i2c_write, - ihs_i2c_set_bus_speed, - CONFIG_SYS_I2C_IHS_SPEED_2_1, - CONFIG_SYS_I2C_IHS_SLAVE_2_1, 18) -#endif -#endif -#ifdef CONFIG_SYS_I2C_IHS_CH3 -U_BOOT_I2C_ADAP_COMPLETE(ihs3, ihs_i2c_init, ihs_i2c_probe, - ihs_i2c_read, ihs_i2c_write, - ihs_i2c_set_bus_speed, - CONFIG_SYS_I2C_IHS_SPEED_3, - CONFIG_SYS_I2C_IHS_SLAVE_3, 3) -#ifdef CONFIG_SYS_I2C_IHS_DUAL -U_BOOT_I2C_ADAP_COMPLETE(ihs3_1, ihs_i2c_init, ihs_i2c_probe, - ihs_i2c_read, ihs_i2c_write, - ihs_i2c_set_bus_speed, - CONFIG_SYS_I2C_IHS_SPEED_3_1, - CONFIG_SYS_I2C_IHS_SLAVE_3_1, 19) -#endif -#endif -#endif /* CONFIG_DM_I2C */ diff --git a/drivers/i2c/mv_i2c.c b/drivers/i2c/mv_i2c.c index 20c5de0007..0eff353161 100644 --- a/drivers/i2c/mv_i2c.c +++ b/drivers/i2c/mv_i2c.c @@ -80,7 +80,7 @@ static void i2c_reset(struct mv_i2c *base) i2c_clk_enable(); - writel(CONFIG_SYS_I2C_SLAVE, &base->isar); /* set our slave address */ + writel(0x0, &base->isar); /* set our slave address */ /* set control reg values */ writel(I2C_ICR_INIT | icr_mode, &base->icr); writel(I2C_ISR_INIT, &base->isr); /* set clear interrupt bits */ diff --git a/drivers/i2c/mvtwsi.c b/drivers/i2c/mvtwsi.c index d33e2c7c9d..236bfb8d8e 100644 --- a/drivers/i2c/mvtwsi.c +++ b/drivers/i2c/mvtwsi.c @@ -17,7 +17,9 @@ #include <linux/bitops.h> #include <linux/compat.h> #if CONFIG_IS_ENABLED(DM_I2C) +#include <clk.h> #include <dm.h> +#include <reset.h> #endif DECLARE_GLOBAL_DATA_PTR; @@ -835,7 +837,18 @@ static int mvtwsi_i2c_bind(struct udevice *bus) static int mvtwsi_i2c_probe(struct udevice *bus) { struct mvtwsi_i2c_dev *dev = dev_get_priv(bus); + struct reset_ctl reset; + struct clk clk; uint actual_speed; + int ret; + + ret = reset_get_by_index(bus, 0, &reset); + if (!ret) + reset_deassert(&reset); + + ret = clk_get_by_index(bus, 0, &clk); + if (!ret) + clk_enable(&clk); __twsi_i2c_init(dev->base, dev->speed, dev->slaveadd, &actual_speed); dev->speed = actual_speed; diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c index 003aa33f6e..5057bd9665 100644 --- a/drivers/i2c/mxc_i2c.c +++ b/drivers/i2c/mxc_i2c.c @@ -110,32 +110,6 @@ static u16 i2c_clk_div[50][2] = { }; #endif -#ifndef CONFIG_SYS_MXC_I2C1_SPEED -#define CONFIG_SYS_MXC_I2C1_SPEED 100000 -#endif -#ifndef CONFIG_SYS_MXC_I2C2_SPEED -#define CONFIG_SYS_MXC_I2C2_SPEED 100000 -#endif -#ifndef CONFIG_SYS_MXC_I2C3_SPEED -#define CONFIG_SYS_MXC_I2C3_SPEED 100000 -#endif -#ifndef CONFIG_SYS_MXC_I2C4_SPEED -#define CONFIG_SYS_MXC_I2C4_SPEED 100000 -#endif - -#ifndef CONFIG_SYS_MXC_I2C1_SLAVE -#define CONFIG_SYS_MXC_I2C1_SLAVE 0 -#endif -#ifndef CONFIG_SYS_MXC_I2C2_SLAVE -#define CONFIG_SYS_MXC_I2C2_SLAVE 0 -#endif -#ifndef CONFIG_SYS_MXC_I2C3_SLAVE -#define CONFIG_SYS_MXC_I2C3_SLAVE 0 -#endif -#ifndef CONFIG_SYS_MXC_I2C4_SLAVE -#define CONFIG_SYS_MXC_I2C4_SLAVE 0 -#endif - /* * Calculate and set proper clock divider */ diff --git a/drivers/i2c/omap24xx_i2c.c b/drivers/i2c/omap24xx_i2c.c index 71f6f5f7ac..a767dee986 100644 --- a/drivers/i2c/omap24xx_i2c.c +++ b/drivers/i2c/omap24xx_i2c.c @@ -936,62 +936,34 @@ static int omap24_i2c_probe(struct i2c_adapter *adap, uchar chip) return __omap24_i2c_probe(i2c_base, ip_rev, adap->waitdelay, chip); } -#if !defined(CONFIG_SYS_OMAP24_I2C_SPEED1) -#define CONFIG_SYS_OMAP24_I2C_SPEED1 CONFIG_SYS_OMAP24_I2C_SPEED -#endif -#if !defined(CONFIG_SYS_OMAP24_I2C_SLAVE1) -#define CONFIG_SYS_OMAP24_I2C_SLAVE1 CONFIG_SYS_OMAP24_I2C_SLAVE -#endif - U_BOOT_I2C_ADAP_COMPLETE(omap24_0, omap24_i2c_init, omap24_i2c_probe, omap24_i2c_read, omap24_i2c_write, omap24_i2c_setspeed, - CONFIG_SYS_OMAP24_I2C_SPEED, - CONFIG_SYS_OMAP24_I2C_SLAVE, + CONFIG_SYS_I2C_SPEED, + CONFIG_SYS_I2C_SLAVE, 0) U_BOOT_I2C_ADAP_COMPLETE(omap24_1, omap24_i2c_init, omap24_i2c_probe, omap24_i2c_read, omap24_i2c_write, omap24_i2c_setspeed, - CONFIG_SYS_OMAP24_I2C_SPEED1, - CONFIG_SYS_OMAP24_I2C_SLAVE1, + CONFIG_SYS_I2C_SPEED, + CONFIG_SYS_I2C_SLAVE, 1) #if (CONFIG_SYS_I2C_BUS_MAX > 2) -#if !defined(CONFIG_SYS_OMAP24_I2C_SPEED2) -#define CONFIG_SYS_OMAP24_I2C_SPEED2 CONFIG_SYS_OMAP24_I2C_SPEED -#endif -#if !defined(CONFIG_SYS_OMAP24_I2C_SLAVE2) -#define CONFIG_SYS_OMAP24_I2C_SLAVE2 CONFIG_SYS_OMAP24_I2C_SLAVE -#endif - U_BOOT_I2C_ADAP_COMPLETE(omap24_2, omap24_i2c_init, omap24_i2c_probe, omap24_i2c_read, omap24_i2c_write, NULL, - CONFIG_SYS_OMAP24_I2C_SPEED2, - CONFIG_SYS_OMAP24_I2C_SLAVE2, + CONFIG_SYS_I2C_SPEED, + CONFIG_SYS_I2C_SLAVE, 2) #if (CONFIG_SYS_I2C_BUS_MAX > 3) -#if !defined(CONFIG_SYS_OMAP24_I2C_SPEED3) -#define CONFIG_SYS_OMAP24_I2C_SPEED3 CONFIG_SYS_OMAP24_I2C_SPEED -#endif -#if !defined(CONFIG_SYS_OMAP24_I2C_SLAVE3) -#define CONFIG_SYS_OMAP24_I2C_SLAVE3 CONFIG_SYS_OMAP24_I2C_SLAVE -#endif - U_BOOT_I2C_ADAP_COMPLETE(omap24_3, omap24_i2c_init, omap24_i2c_probe, omap24_i2c_read, omap24_i2c_write, NULL, - CONFIG_SYS_OMAP24_I2C_SPEED3, - CONFIG_SYS_OMAP24_I2C_SLAVE3, + CONFIG_SYS_I2C_SPEED, + CONFIG_SYS_I2C_SLAVE, 3) #if (CONFIG_SYS_I2C_BUS_MAX > 4) -#if !defined(CONFIG_SYS_OMAP24_I2C_SPEED4) -#define CONFIG_SYS_OMAP24_I2C_SPEED4 CONFIG_SYS_OMAP24_I2C_SPEED -#endif -#if !defined(CONFIG_SYS_OMAP24_I2C_SLAVE4) -#define CONFIG_SYS_OMAP24_I2C_SLAVE4 CONFIG_SYS_OMAP24_I2C_SLAVE -#endif - U_BOOT_I2C_ADAP_COMPLETE(omap24_4, omap24_i2c_init, omap24_i2c_probe, omap24_i2c_read, omap24_i2c_write, NULL, - CONFIG_SYS_OMAP24_I2C_SPEED4, - CONFIG_SYS_OMAP24_I2C_SLAVE4, + CONFIG_SYS_I2C_SPEED, + CONFIG_SYS_I2C_SLAVE, 4) #endif #endif @@ -1062,7 +1034,7 @@ static int omap_i2c_probe(struct udevice *bus) return 0; } -#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) +#if CONFIG_IS_ENABLED(OF_REAL) static int omap_i2c_of_to_plat(struct udevice *bus) { struct omap_i2c_plat *plat = dev_get_plat(bus); @@ -1091,7 +1063,7 @@ static const struct dm_i2c_ops omap_i2c_ops = { U_BOOT_DRIVER(i2c_omap) = { .name = "i2c_omap", .id = UCLASS_I2C, -#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) +#if CONFIG_IS_ENABLED(OF_REAL) .of_match = omap_i2c_ids, .of_to_plat = omap_i2c_of_to_plat, .plat_auto = sizeof(struct omap_i2c_plat), diff --git a/drivers/i2c/rcar_i2c.c b/drivers/i2c/rcar_i2c.c index 14bb6603d5..d9ece5e3a8 100644 --- a/drivers/i2c/rcar_i2c.c +++ b/drivers/i2c/rcar_i2c.c @@ -64,6 +64,8 @@ enum rcar_i2c_type { struct rcar_i2c_priv { void __iomem *base; struct clk clk; + u32 fall_ns; + u32 rise_ns; u32 intdelay; u32 icccr; enum rcar_i2c_type type; @@ -278,7 +280,7 @@ static int rcar_i2c_set_speed(struct udevice *dev, uint bus_freq_hz) * = F[sum * ick / 1000000000] * = F[(ick / 1000000) * sum / 1000] */ - sum = 35 + 200 + priv->intdelay; + sum = priv->fall_ns + priv->rise_ns + priv->intdelay; round = (ick + 500000) / 1000000 * sum; round = (round + 500) / 1000; @@ -323,6 +325,10 @@ static int rcar_i2c_probe(struct udevice *dev) int ret; priv->base = dev_read_addr_ptr(dev); + priv->rise_ns = dev_read_u32_default(dev, + "i2c-scl-rising-time-ns", 200); + priv->fall_ns = dev_read_u32_default(dev, + "i2c-scl-falling-time-ns", 35); priv->intdelay = dev_read_u32_default(dev, "i2c-scl-internal-delay-ns", 5); priv->type = dev_get_driver_data(dev); diff --git a/drivers/i2c/s3c24x0_i2c.c b/drivers/i2c/s3c24x0_i2c.c index 56f0f69885..e0f499d759 100644 --- a/drivers/i2c/s3c24x0_i2c.c +++ b/drivers/i2c/s3c24x0_i2c.c @@ -21,12 +21,6 @@ #include <i2c.h> #include "s3c24x0_i2c.h" -#ifndef CONFIG_SYS_I2C_S3C24X0_SLAVE -#define SYS_I2C_S3C24X0_SLAVE_ADDR 0 -#else -#define SYS_I2C_S3C24X0_SLAVE_ADDR CONFIG_SYS_I2C_S3C24X0_SLAVE -#endif - DECLARE_GLOBAL_DATA_PTR; /* @@ -83,6 +77,8 @@ static void i2c_ch_init(struct s3c24x0_i2c *i2c, int speed, int slaveadd) writel(I2C_MODE_MT | I2C_TXRX_ENA, &i2c->iicstat); } +#define SYS_I2C_S3C24X0_SLAVE_ADDR 0 + static int s3c24x0_i2c_set_bus_speed(struct udevice *dev, unsigned int speed) { struct s3c24x0_i2c_bus *i2c_bus = dev_get_priv(dev); diff --git a/drivers/i2c/sh_i2c.c b/drivers/i2c/sh_i2c.c index 26a8700669..6cecec4145 100644 --- a/drivers/i2c/sh_i2c.c +++ b/drivers/i2c/sh_i2c.c @@ -294,20 +294,20 @@ static unsigned int sh_i2c_set_bus_speed(struct i2c_adapter *adap, * Register RCAR i2c adapters */ U_BOOT_I2C_ADAP_COMPLETE(sh_0, sh_i2c_init, sh_i2c_probe, sh_i2c_read, - sh_i2c_write, sh_i2c_set_bus_speed, CONFIG_SYS_I2C_SH_SPEED0, 0, 0) + sh_i2c_write, sh_i2c_set_bus_speed, CONFIG_SYS_I2C_SPEED, 0, 0) #ifdef CONFIG_SYS_I2C_SH_BASE1 U_BOOT_I2C_ADAP_COMPLETE(sh_1, sh_i2c_init, sh_i2c_probe, sh_i2c_read, - sh_i2c_write, sh_i2c_set_bus_speed, CONFIG_SYS_I2C_SH_SPEED1, 0, 1) + sh_i2c_write, sh_i2c_set_bus_speed, CONFIG_SYS_I2C_SPEED, 0, 1) #endif #ifdef CONFIG_SYS_I2C_SH_BASE2 U_BOOT_I2C_ADAP_COMPLETE(sh_2, sh_i2c_init, sh_i2c_probe, sh_i2c_read, - sh_i2c_write, sh_i2c_set_bus_speed, CONFIG_SYS_I2C_SH_SPEED2, 0, 2) + sh_i2c_write, sh_i2c_set_bus_speed, CONFIG_SYS_I2C_SPEED, 0, 2) #endif #ifdef CONFIG_SYS_I2C_SH_BASE3 U_BOOT_I2C_ADAP_COMPLETE(sh_3, sh_i2c_init, sh_i2c_probe, sh_i2c_read, - sh_i2c_write, sh_i2c_set_bus_speed, CONFIG_SYS_I2C_SH_SPEED3, 0, 3) + sh_i2c_write, sh_i2c_set_bus_speed, CONFIG_SYS_I2C_SPEED, 0, 3) #endif #ifdef CONFIG_SYS_I2C_SH_BASE4 U_BOOT_I2C_ADAP_COMPLETE(sh_4, sh_i2c_init, sh_i2c_probe, sh_i2c_read, - sh_i2c_write, sh_i2c_set_bus_speed, CONFIG_SYS_I2C_SH_SPEED4, 0, 4) + sh_i2c_write, sh_i2c_set_bus_speed, CONFIG_SYS_I2C_SPEED, 0, 4) #endif diff --git a/drivers/i2c/soft_i2c.c b/drivers/i2c/soft_i2c.c index db69c18cb6..c72839eb01 100644 --- a/drivers/i2c/soft_i2c.c +++ b/drivers/i2c/soft_i2c.c @@ -438,80 +438,3 @@ U_BOOT_I2C_ADAP_COMPLETE(soft00, soft_i2c_init, soft_i2c_probe, soft_i2c_read, soft_i2c_write, NULL, CONFIG_SYS_I2C_SOFT_SPEED, CONFIG_SYS_I2C_SOFT_SLAVE, 0) -#if defined(I2C_SOFT_DECLARATIONS2) -U_BOOT_I2C_ADAP_COMPLETE(soft01, soft_i2c_init, soft_i2c_probe, - soft_i2c_read, soft_i2c_write, NULL, - CONFIG_SYS_I2C_SOFT_SPEED_2, - CONFIG_SYS_I2C_SOFT_SLAVE_2, - 1) -#endif -#if defined(I2C_SOFT_DECLARATIONS3) -U_BOOT_I2C_ADAP_COMPLETE(soft02, soft_i2c_init, soft_i2c_probe, - soft_i2c_read, soft_i2c_write, NULL, - CONFIG_SYS_I2C_SOFT_SPEED_3, - CONFIG_SYS_I2C_SOFT_SLAVE_3, - 2) -#endif -#if defined(I2C_SOFT_DECLARATIONS4) -U_BOOT_I2C_ADAP_COMPLETE(soft03, soft_i2c_init, soft_i2c_probe, - soft_i2c_read, soft_i2c_write, NULL, - CONFIG_SYS_I2C_SOFT_SPEED_4, - CONFIG_SYS_I2C_SOFT_SLAVE_4, - 3) -#endif -#if defined(I2C_SOFT_DECLARATIONS5) -U_BOOT_I2C_ADAP_COMPLETE(soft04, soft_i2c_init, soft_i2c_probe, - soft_i2c_read, soft_i2c_write, NULL, - CONFIG_SYS_I2C_SOFT_SPEED_5, - CONFIG_SYS_I2C_SOFT_SLAVE_5, - 4) -#endif -#if defined(I2C_SOFT_DECLARATIONS6) -U_BOOT_I2C_ADAP_COMPLETE(soft05, soft_i2c_init, soft_i2c_probe, - soft_i2c_read, soft_i2c_write, NULL, - CONFIG_SYS_I2C_SOFT_SPEED_6, - CONFIG_SYS_I2C_SOFT_SLAVE_6, - 5) -#endif -#if defined(I2C_SOFT_DECLARATIONS7) -U_BOOT_I2C_ADAP_COMPLETE(soft06, soft_i2c_init, soft_i2c_probe, - soft_i2c_read, soft_i2c_write, NULL, - CONFIG_SYS_I2C_SOFT_SPEED_7, - CONFIG_SYS_I2C_SOFT_SLAVE_7, - 6) -#endif -#if defined(I2C_SOFT_DECLARATIONS8) -U_BOOT_I2C_ADAP_COMPLETE(soft07, soft_i2c_init, soft_i2c_probe, - soft_i2c_read, soft_i2c_write, NULL, - CONFIG_SYS_I2C_SOFT_SPEED_8, - CONFIG_SYS_I2C_SOFT_SLAVE_8, - 7) -#endif -#if defined(I2C_SOFT_DECLARATIONS9) -U_BOOT_I2C_ADAP_COMPLETE(soft08, soft_i2c_init, soft_i2c_probe, - soft_i2c_read, soft_i2c_write, NULL, - CONFIG_SYS_I2C_SOFT_SPEED_9, - CONFIG_SYS_I2C_SOFT_SLAVE_9, - 8) -#endif -#if defined(I2C_SOFT_DECLARATIONS10) -U_BOOT_I2C_ADAP_COMPLETE(soft09, soft_i2c_init, soft_i2c_probe, - soft_i2c_read, soft_i2c_write, NULL, - CONFIG_SYS_I2C_SOFT_SPEED_10, - CONFIG_SYS_I2C_SOFT_SLAVE_10, - 9) -#endif -#if defined(I2C_SOFT_DECLARATIONS11) -U_BOOT_I2C_ADAP_COMPLETE(soft10, soft_i2c_init, soft_i2c_probe, - soft_i2c_read, soft_i2c_write, NULL, - CONFIG_SYS_I2C_SOFT_SPEED_11, - CONFIG_SYS_I2C_SOFT_SLAVE_11, - 10) -#endif -#if defined(I2C_SOFT_DECLARATIONS12) -U_BOOT_I2C_ADAP_COMPLETE(soft11, soft_i2c_init, soft_i2c_probe, - soft_i2c_read, soft_i2c_write, NULL, - CONFIG_SYS_I2C_SOFT_SPEED_12, - CONFIG_SYS_I2C_SOFT_SLAVE_12, - 11) -#endif |