diff options
Diffstat (limited to 'drivers/fpga/spartan3.c')
| -rw-r--r-- | drivers/fpga/spartan3.c | 42 |
1 files changed, 21 insertions, 21 deletions
diff --git a/drivers/fpga/spartan3.c b/drivers/fpga/spartan3.c index 1d5073cb59..e892fa571f 100644 --- a/drivers/fpga/spartan3.c +++ b/drivers/fpga/spartan3.c @@ -17,11 +17,11 @@ /* Note: The assumption is that we cannot possibly run fast enough to * overrun the device (the Slave Parallel mode can free run at 50MHz). - * If there is a need to operate slower, define CONFIG_FPGA_DELAY in + * If there is a need to operate slower, define CFG_FPGA_DELAY in * the board config file to slow things down. */ -#ifndef CONFIG_FPGA_DELAY -#define CONFIG_FPGA_DELAY() +#ifndef CFG_FPGA_DELAY +#define CFG_FPGA_DELAY() #endif #ifndef CFG_SYS_FPGA_WAIT @@ -145,13 +145,13 @@ static int spartan3_sp_load(xilinx_desc *desc, const void *buf, size_t bsize) (*fn->pgm) (true, true, cookie); /* Assert the program, commit */ /* Get ready for the burn */ - CONFIG_FPGA_DELAY (); + CFG_FPGA_DELAY (); (*fn->pgm) (false, true, cookie); /* Deassert the program, commit */ ts = get_timer (0); /* get current time */ /* Now wait for INIT and BUSY to go high */ do { - CONFIG_FPGA_DELAY (); + CFG_FPGA_DELAY (); if (get_timer (ts) > CFG_SYS_FPGA_WAIT) { /* check the time */ puts ("** Timeout waiting for INIT to clear.\n"); (*fn->abort) (cookie); /* abort the burn */ @@ -169,9 +169,9 @@ static int spartan3_sp_load(xilinx_desc *desc, const void *buf, size_t bsize) /* XXX - Check the error bit? */ (*fn->wdata) (data[bytecount++], true, cookie); /* write the data */ - CONFIG_FPGA_DELAY (); + CFG_FPGA_DELAY (); (*fn->clk) (false, true, cookie); /* Deassert the clock pin */ - CONFIG_FPGA_DELAY (); + CFG_FPGA_DELAY (); (*fn->clk) (true, true, cookie); /* Assert the clock pin */ #ifdef CONFIG_SYS_FPGA_CHECK_BUSY @@ -180,9 +180,9 @@ static int spartan3_sp_load(xilinx_desc *desc, const void *buf, size_t bsize) /* XXX - we should have a check in here somewhere to * make sure we aren't busy forever... */ - CONFIG_FPGA_DELAY (); + CFG_FPGA_DELAY (); (*fn->clk) (false, true, cookie); /* Deassert the clock pin */ - CONFIG_FPGA_DELAY (); + CFG_FPGA_DELAY (); (*fn->clk) (true, true, cookie); /* Assert the clock pin */ if (get_timer (ts) > CFG_SYS_FPGA_WAIT) { /* check the time */ @@ -199,7 +199,7 @@ static int spartan3_sp_load(xilinx_desc *desc, const void *buf, size_t bsize) #endif } - CONFIG_FPGA_DELAY (); + CFG_FPGA_DELAY (); (*fn->cs) (false, true, cookie); /* Deassert the chip select */ (*fn->wr) (false, true, cookie); /* Deassert the write pin */ @@ -214,9 +214,9 @@ static int spartan3_sp_load(xilinx_desc *desc, const void *buf, size_t bsize) /* XXX - we should have a check in here somewhere to * make sure we aren't busy forever... */ - CONFIG_FPGA_DELAY (); + CFG_FPGA_DELAY (); (*fn->clk) (false, true, cookie); /* Deassert the clock pin */ - CONFIG_FPGA_DELAY (); + CFG_FPGA_DELAY (); (*fn->clk) (true, true, cookie); /* Assert the clock pin */ if (get_timer (ts) > CFG_SYS_FPGA_WAIT) { /* check the time */ @@ -337,7 +337,7 @@ static int spartan3_ss_load(xilinx_desc *desc, const void *buf, size_t bsize) /* Wait for INIT state (init low) */ ts = get_timer (0); /* get current time */ do { - CONFIG_FPGA_DELAY (); + CFG_FPGA_DELAY (); if (get_timer (ts) > CFG_SYS_FPGA_WAIT) { /* check the time */ puts ("** Timeout waiting for INIT to start.\n"); if (*fn->abort) @@ -347,13 +347,13 @@ static int spartan3_ss_load(xilinx_desc *desc, const void *buf, size_t bsize) } while (!(*fn->init) (cookie)); /* Get ready for the burn */ - CONFIG_FPGA_DELAY (); + CFG_FPGA_DELAY (); (*fn->pgm) (false, true, cookie); /* Deassert the program, commit */ ts = get_timer (0); /* get current time */ /* Now wait for INIT to go high */ do { - CONFIG_FPGA_DELAY (); + CFG_FPGA_DELAY (); if (get_timer (ts) > CFG_SYS_FPGA_WAIT) { /* check the time */ puts ("** Timeout waiting for INIT to clear.\n"); if (*fn->abort) @@ -381,13 +381,13 @@ static int spartan3_ss_load(xilinx_desc *desc, const void *buf, size_t bsize) do { /* Deassert the clock */ (*fn->clk) (false, true, cookie); - CONFIG_FPGA_DELAY (); + CFG_FPGA_DELAY (); /* Write data */ (*fn->wr) ((val & 0x80), true, cookie); - CONFIG_FPGA_DELAY (); + CFG_FPGA_DELAY (); /* Assert the clock */ (*fn->clk) (true, true, cookie); - CONFIG_FPGA_DELAY (); + CFG_FPGA_DELAY (); val <<= 1; i --; } while (i > 0); @@ -399,7 +399,7 @@ static int spartan3_ss_load(xilinx_desc *desc, const void *buf, size_t bsize) } } - CONFIG_FPGA_DELAY (); + CFG_FPGA_DELAY (); #ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK putc ('\n'); /* terminate the dotted line */ @@ -414,9 +414,9 @@ static int spartan3_ss_load(xilinx_desc *desc, const void *buf, size_t bsize) /* XXX - we should have a check in here somewhere to * make sure we aren't busy forever... */ - CONFIG_FPGA_DELAY (); + CFG_FPGA_DELAY (); (*fn->clk) (false, true, cookie); /* Deassert the clock pin */ - CONFIG_FPGA_DELAY (); + CFG_FPGA_DELAY (); (*fn->clk) (true, true, cookie); /* Assert the clock pin */ putc ('*'); |