diff options
Diffstat (limited to 'drivers/ddr/fsl/fsl_ddr_gen4.c')
| -rw-r--r-- | drivers/ddr/fsl/fsl_ddr_gen4.c | 28 |
1 files changed, 14 insertions, 14 deletions
diff --git a/drivers/ddr/fsl/fsl_ddr_gen4.c b/drivers/ddr/fsl/fsl_ddr_gen4.c index 49e4688351..1de7b72b4c 100644 --- a/drivers/ddr/fsl/fsl_ddr_gen4.c +++ b/drivers/ddr/fsl/fsl_ddr_gen4.c @@ -107,14 +107,14 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs, goto step2; #ifdef CONFIG_SYS_FSL_ERRATUM_A008336 -#ifdef CONFIG_LS2085A +#if defined(CONFIG_LS2080A) || defined(CONFIG_LS2085A) /* A008336 only applies to general DDR controllers */ if ((ctrl_num == 0) || (ctrl_num == 1)) #endif ddr_out32(eddrtqcr1, 0x63b30002); #endif #ifdef CONFIG_SYS_FSL_ERRATUM_A008514 -#ifdef CONFIG_LS2085A +#if defined(CONFIG_LS2080A) || defined(CONFIG_LS2085A) /* A008514 only applies to DP-DDR controler */ if (ctrl_num == 2) #endif @@ -423,16 +423,16 @@ step2: if (getenv_f("ddr_bist", buffer, CONFIG_SYS_CBSIZE) >= 0) { puts("Running BIST test. This will take a while..."); cs0_config = ddr_in32(&ddr->cs0_config); + cs0_bnds = ddr_in32(&ddr->cs0_bnds); + cs1_bnds = ddr_in32(&ddr->cs1_bnds); + cs2_bnds = ddr_in32(&ddr->cs2_bnds); + cs3_bnds = ddr_in32(&ddr->cs3_bnds); if (cs0_config & CTLR_INTLV_MASK) { - cs0_bnds = ddr_in32(&cs0_bnds); - cs1_bnds = ddr_in32(&cs1_bnds); - cs2_bnds = ddr_in32(&cs2_bnds); - cs3_bnds = ddr_in32(&cs3_bnds); /* set bnds to non-interleaving */ - ddr_out32(&cs0_bnds, (cs0_bnds & 0xfffefffe) >> 1); - ddr_out32(&cs1_bnds, (cs1_bnds & 0xfffefffe) >> 1); - ddr_out32(&cs2_bnds, (cs2_bnds & 0xfffefffe) >> 1); - ddr_out32(&cs3_bnds, (cs3_bnds & 0xfffefffe) >> 1); + ddr_out32(&ddr->cs0_bnds, (cs0_bnds & 0xfffefffe) >> 1); + ddr_out32(&ddr->cs1_bnds, (cs1_bnds & 0xfffefffe) >> 1); + ddr_out32(&ddr->cs2_bnds, (cs2_bnds & 0xfffefffe) >> 1); + ddr_out32(&ddr->cs3_bnds, (cs3_bnds & 0xfffefffe) >> 1); } ddr_out32(&ddr->mtp1, BIST_PATTERN1); ddr_out32(&ddr->mtp2, BIST_PATTERN1); @@ -469,10 +469,10 @@ step2: if (cs0_config & CTLR_INTLV_MASK) { /* restore bnds registers */ - ddr_out32(&cs0_bnds, cs0_bnds); - ddr_out32(&cs1_bnds, cs1_bnds); - ddr_out32(&cs2_bnds, cs2_bnds); - ddr_out32(&cs3_bnds, cs3_bnds); + ddr_out32(&ddr->cs0_bnds, cs0_bnds); + ddr_out32(&ddr->cs1_bnds, cs1_bnds); + ddr_out32(&ddr->cs2_bnds, cs2_bnds); + ddr_out32(&ddr->cs3_bnds, cs3_bnds); } } #endif |