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-rw-r--r--drivers/clk/altera/clk-agilex.c54
-rw-r--r--drivers/clk/altera/clk-arria10.c24
-rw-r--r--drivers/clk/aspeed/clk_ast2500.c6
-rw-r--r--drivers/clk/at91/compat.c86
-rw-r--r--drivers/clk/at91/sckc.c2
-rw-r--r--drivers/clk/clk-cdce9xx.c2
-rw-r--r--drivers/clk/clk-hsdk-cgu.c2
-rw-r--r--drivers/clk/clk-ti-sci.c2
-rw-r--r--drivers/clk/clk-uclass.c2
-rw-r--r--drivers/clk/clk.c8
-rw-r--r--drivers/clk/clk_bcm6345.c2
-rw-r--r--drivers/clk/clk_boston.c10
-rw-r--r--drivers/clk/clk_fixed_factor.c8
-rw-r--r--drivers/clk/clk_fixed_rate.c10
-rw-r--r--drivers/clk/clk_octeon.c2
-rw-r--r--drivers/clk/clk_pic32.c2
-rw-r--r--drivers/clk/clk_sandbox.c2
-rw-r--r--drivers/clk/clk_sandbox_test.c2
-rw-r--r--drivers/clk/clk_stm32f.c2
-rw-r--r--drivers/clk/clk_stm32h7.c2
-rw-r--r--drivers/clk/clk_stm32mp1.c4
-rw-r--r--drivers/clk/clk_versal.c2
-rw-r--r--drivers/clk/clk_vexpress_osc.c2
-rw-r--r--drivers/clk/clk_zynq.c2
-rw-r--r--drivers/clk/clk_zynqmp.c4
-rw-r--r--drivers/clk/exynos/clk-exynos7420.c4
-rw-r--r--drivers/clk/ics8n3qv01.c2
-rw-r--r--drivers/clk/imx/clk-imx8.c2
-rw-r--r--drivers/clk/mediatek/clk-mt7622.c16
-rw-r--r--drivers/clk/mediatek/clk-mt7623.c12
-rw-r--r--drivers/clk/mediatek/clk-mt7629.c14
-rw-r--r--drivers/clk/mediatek/clk-mt8512.c8
-rw-r--r--drivers/clk/mediatek/clk-mt8516.c6
-rw-r--r--drivers/clk/mediatek/clk-mt8518.c6
-rw-r--r--drivers/clk/mediatek/clk-mtk.c6
-rw-r--r--drivers/clk/meson/axg.c4
-rw-r--r--drivers/clk/meson/g12a.c4
-rw-r--r--drivers/clk/meson/gxbb.c4
-rw-r--r--drivers/clk/mpc83xx_clk.c2
-rw-r--r--drivers/clk/mtmips/clk-mt7628.c2
-rw-r--r--drivers/clk/mvebu/armada-37xx-periph.c2
-rw-r--r--drivers/clk/mvebu/armada-37xx-tbg.c2
-rw-r--r--drivers/clk/owl/clk_owl.c2
-rw-r--r--drivers/clk/renesas/r8a774a1-cpg-mssr.c2
-rw-r--r--drivers/clk/renesas/r8a774b1-cpg-mssr.c2
-rw-r--r--drivers/clk/renesas/r8a774c0-cpg-mssr.c2
-rw-r--r--drivers/clk/renesas/r8a774e1-cpg-mssr.c2
-rw-r--r--drivers/clk/renesas/r8a7790-cpg-mssr.c2
-rw-r--r--drivers/clk/renesas/r8a7791-cpg-mssr.c2
-rw-r--r--drivers/clk/renesas/r8a7792-cpg-mssr.c2
-rw-r--r--drivers/clk/renesas/r8a7794-cpg-mssr.c2
-rw-r--r--drivers/clk/renesas/r8a7795-cpg-mssr.c2
-rw-r--r--drivers/clk/renesas/r8a7796-cpg-mssr.c2
-rw-r--r--drivers/clk/renesas/r8a77965-cpg-mssr.c2
-rw-r--r--drivers/clk/renesas/r8a77970-cpg-mssr.c2
-rw-r--r--drivers/clk/renesas/r8a77980-cpg-mssr.c2
-rw-r--r--drivers/clk/renesas/r8a77990-cpg-mssr.c2
-rw-r--r--drivers/clk/renesas/r8a77995-cpg-mssr.c2
-rw-r--r--drivers/clk/rockchip/clk_px30.c15
-rw-r--r--drivers/clk/rockchip/clk_rk3036.c9
-rw-r--r--drivers/clk/rockchip/clk_rk3128.c9
-rw-r--r--drivers/clk/rockchip/clk_rk3188.c12
-rw-r--r--drivers/clk/rockchip/clk_rk322x.c9
-rw-r--r--drivers/clk/rockchip/clk_rk3288.c12
-rw-r--r--drivers/clk/rockchip/clk_rk3308.c9
-rw-r--r--drivers/clk/rockchip/clk_rk3328.c9
-rw-r--r--drivers/clk/rockchip/clk_rk3368.c13
-rw-r--r--drivers/clk/rockchip/clk_rk3399.c23
-rw-r--r--drivers/clk/rockchip/clk_rv1108.c9
-rw-r--r--drivers/clk/sifive/fu540-prci.c4
-rw-r--r--drivers/clk/sunxi/clk_a10.c2
-rw-r--r--drivers/clk/sunxi/clk_a10s.c2
-rw-r--r--drivers/clk/sunxi/clk_a23.c2
-rw-r--r--drivers/clk/sunxi/clk_a31.c2
-rw-r--r--drivers/clk/sunxi/clk_a64.c2
-rw-r--r--drivers/clk/sunxi/clk_a80.c2
-rw-r--r--drivers/clk/sunxi/clk_a83t.c2
-rw-r--r--drivers/clk/sunxi/clk_h3.c2
-rw-r--r--drivers/clk/sunxi/clk_h6.c2
-rw-r--r--drivers/clk/sunxi/clk_r40.c2
-rw-r--r--drivers/clk/sunxi/clk_v3s.c2
-rw-r--r--drivers/clk/uniphier/clk-uniphier-core.c2
82 files changed, 269 insertions, 260 deletions
diff --git a/drivers/clk/altera/clk-agilex.c b/drivers/clk/altera/clk-agilex.c
index a539889d5b..bac1d98e19 100644
--- a/drivers/clk/altera/clk-agilex.c
+++ b/drivers/clk/altera/clk-agilex.c
@@ -17,7 +17,7 @@
DECLARE_GLOBAL_DATA_PTR;
-struct socfpga_clk_platdata {
+struct socfpga_clk_plat {
void __iomem *regs;
};
@@ -25,20 +25,20 @@ struct socfpga_clk_platdata {
* function to write the bypass register which requires a poll of the
* busy bit
*/
-static void clk_write_bypass_mainpll(struct socfpga_clk_platdata *plat, u32 val)
+static void clk_write_bypass_mainpll(struct socfpga_clk_plat *plat, u32 val)
{
CM_REG_WRITEL(plat, val, CLKMGR_MAINPLL_BYPASS);
cm_wait_for_fsm();
}
-static void clk_write_bypass_perpll(struct socfpga_clk_platdata *plat, u32 val)
+static void clk_write_bypass_perpll(struct socfpga_clk_plat *plat, u32 val)
{
CM_REG_WRITEL(plat, val, CLKMGR_PERPLL_BYPASS);
cm_wait_for_fsm();
}
/* function to write the ctrl register which requires a poll of the busy bit */
-static void clk_write_ctrl(struct socfpga_clk_platdata *plat, u32 val)
+static void clk_write_ctrl(struct socfpga_clk_plat *plat, u32 val)
{
CM_REG_WRITEL(plat, val, CLKMGR_CTRL);
cm_wait_for_fsm();
@@ -108,7 +108,7 @@ static const struct {
},
};
-static int membus_wait_for_req(struct socfpga_clk_platdata *plat, u32 pll,
+static int membus_wait_for_req(struct socfpga_clk_plat *plat, u32 pll,
int timeout)
{
int cnt = 0;
@@ -133,7 +133,7 @@ static int membus_wait_for_req(struct socfpga_clk_platdata *plat, u32 pll,
return 0;
}
-static int membus_write_pll(struct socfpga_clk_platdata *plat, u32 pll,
+static int membus_write_pll(struct socfpga_clk_plat *plat, u32 pll,
u32 addr_offset, u32 wdat, int timeout)
{
u32 addr;
@@ -154,7 +154,7 @@ static int membus_write_pll(struct socfpga_clk_platdata *plat, u32 pll,
return membus_wait_for_req(plat, pll, timeout);
}
-static int membus_read_pll(struct socfpga_clk_platdata *plat, u32 pll,
+static int membus_read_pll(struct socfpga_clk_plat *plat, u32 pll,
u32 addr_offset, u32 *rdata, int timeout)
{
u32 addr;
@@ -184,7 +184,7 @@ static int membus_read_pll(struct socfpga_clk_platdata *plat, u32 pll,
return 0;
}
-static void membus_pll_configs(struct socfpga_clk_platdata *plat, u32 pll)
+static void membus_pll_configs(struct socfpga_clk_plat *plat, u32 pll)
{
int i;
u32 rdata;
@@ -236,7 +236,7 @@ static u32 calc_vocalib_pll(u32 pllm, u32 pllglob)
static void clk_basic_init(struct udevice *dev,
const struct cm_config * const cfg)
{
- struct socfpga_clk_platdata *plat = dev_get_platdata(dev);
+ struct socfpga_clk_plat *plat = dev_get_plat(dev);
u32 vcocalib;
if (!cfg)
@@ -342,7 +342,7 @@ static void clk_basic_init(struct udevice *dev,
CM_REG_READL(plat, CLKMGR_CTRL) & ~CLKMGR_CTRL_BOOTMODE);
}
-static u64 clk_get_vco_clk_hz(struct socfpga_clk_platdata *plat,
+static u64 clk_get_vco_clk_hz(struct socfpga_clk_plat *plat,
u32 pllglob_reg, u32 pllm_reg)
{
u64 fref, arefdiv, mdiv, reg, vco;
@@ -375,26 +375,26 @@ static u64 clk_get_vco_clk_hz(struct socfpga_clk_platdata *plat,
return vco;
}
-static u64 clk_get_main_vco_clk_hz(struct socfpga_clk_platdata *plat)
+static u64 clk_get_main_vco_clk_hz(struct socfpga_clk_plat *plat)
{
return clk_get_vco_clk_hz(plat, CLKMGR_MAINPLL_PLLGLOB,
CLKMGR_MAINPLL_PLLM);
}
-static u64 clk_get_per_vco_clk_hz(struct socfpga_clk_platdata *plat)
+static u64 clk_get_per_vco_clk_hz(struct socfpga_clk_plat *plat)
{
return clk_get_vco_clk_hz(plat, CLKMGR_PERPLL_PLLGLOB,
CLKMGR_PERPLL_PLLM);
}
-static u32 clk_get_5_1_clk_src(struct socfpga_clk_platdata *plat, u64 reg)
+static u32 clk_get_5_1_clk_src(struct socfpga_clk_plat *plat, u64 reg)
{
u32 clksrc = CM_REG_READL(plat, reg);
return (clksrc & CLKMGR_CLKSRC_MASK) >> CLKMGR_CLKSRC_OFFSET;
}
-static u64 clk_get_clksrc_hz(struct socfpga_clk_platdata *plat, u32 clksrc_reg,
+static u64 clk_get_clksrc_hz(struct socfpga_clk_plat *plat, u32 clksrc_reg,
u32 main_reg, u32 per_reg)
{
u64 clock;
@@ -431,7 +431,7 @@ static u64 clk_get_clksrc_hz(struct socfpga_clk_platdata *plat, u32 clksrc_reg,
return clock;
}
-static u64 clk_get_mpu_clk_hz(struct socfpga_clk_platdata *plat)
+static u64 clk_get_mpu_clk_hz(struct socfpga_clk_plat *plat)
{
u64 clock = clk_get_clksrc_hz(plat, CLKMGR_MAINPLL_MPUCLK,
CLKMGR_MAINPLL_PLLC0,
@@ -443,14 +443,14 @@ static u64 clk_get_mpu_clk_hz(struct socfpga_clk_platdata *plat)
return clock;
}
-static u32 clk_get_l3_main_clk_hz(struct socfpga_clk_platdata *plat)
+static u32 clk_get_l3_main_clk_hz(struct socfpga_clk_plat *plat)
{
return clk_get_clksrc_hz(plat, CLKMGR_MAINPLL_NOCCLK,
CLKMGR_MAINPLL_PLLC1,
CLKMGR_PERPLL_PLLC1);
}
-static u32 clk_get_l4_main_clk_hz(struct socfpga_clk_platdata *plat)
+static u32 clk_get_l4_main_clk_hz(struct socfpga_clk_plat *plat)
{
u64 clock = clk_get_l3_main_clk_hz(plat);
@@ -461,7 +461,7 @@ static u32 clk_get_l4_main_clk_hz(struct socfpga_clk_platdata *plat)
return clock;
}
-static u32 clk_get_sdmmc_clk_hz(struct socfpga_clk_platdata *plat)
+static u32 clk_get_sdmmc_clk_hz(struct socfpga_clk_plat *plat)
{
u64 clock = clk_get_clksrc_hz(plat, CLKMGR_ALTR_SDMMCCTR,
CLKMGR_MAINPLL_PLLC3,
@@ -473,7 +473,7 @@ static u32 clk_get_sdmmc_clk_hz(struct socfpga_clk_platdata *plat)
return clock / 4;
}
-static u32 clk_get_l4_sp_clk_hz(struct socfpga_clk_platdata *plat)
+static u32 clk_get_l4_sp_clk_hz(struct socfpga_clk_plat *plat)
{
u64 clock = clk_get_l3_main_clk_hz(plat);
@@ -484,7 +484,7 @@ static u32 clk_get_l4_sp_clk_hz(struct socfpga_clk_platdata *plat)
return clock;
}
-static u32 clk_get_l4_mp_clk_hz(struct socfpga_clk_platdata *plat)
+static u32 clk_get_l4_mp_clk_hz(struct socfpga_clk_plat *plat)
{
u64 clock = clk_get_l3_main_clk_hz(plat);
@@ -495,7 +495,7 @@ static u32 clk_get_l4_mp_clk_hz(struct socfpga_clk_platdata *plat)
return clock;
}
-static u32 clk_get_l4_sys_free_clk_hz(struct socfpga_clk_platdata *plat)
+static u32 clk_get_l4_sys_free_clk_hz(struct socfpga_clk_plat *plat)
{
if (CM_REG_READL(plat, CLKMGR_STAT) & CLKMGR_STAT_BOOTMODE)
return clk_get_l3_main_clk_hz(plat) / 2;
@@ -503,7 +503,7 @@ static u32 clk_get_l4_sys_free_clk_hz(struct socfpga_clk_platdata *plat)
return clk_get_l3_main_clk_hz(plat) / 4;
}
-static u32 clk_get_emac_clk_hz(struct socfpga_clk_platdata *plat, u32 emac_id)
+static u32 clk_get_emac_clk_hz(struct socfpga_clk_plat *plat, u32 emac_id)
{
bool emacsel_a;
u32 ctl;
@@ -585,7 +585,7 @@ static u32 clk_get_emac_clk_hz(struct socfpga_clk_platdata *plat, u32 emac_id)
static ulong socfpga_clk_get_rate(struct clk *clk)
{
- struct socfpga_clk_platdata *plat = dev_get_platdata(clk->dev);
+ struct socfpga_clk_plat *plat = dev_get_plat(clk->dev);
switch (clk->id) {
case AGILEX_MPU_CLK:
@@ -628,9 +628,9 @@ static int socfpga_clk_probe(struct udevice *dev)
return 0;
}
-static int socfpga_clk_ofdata_to_platdata(struct udevice *dev)
+static int socfpga_clk_of_to_plat(struct udevice *dev)
{
- struct socfpga_clk_platdata *plat = dev_get_platdata(dev);
+ struct socfpga_clk_plat *plat = dev_get_plat(dev);
fdt_addr_t addr;
addr = dev_read_addr(dev);
@@ -657,6 +657,6 @@ U_BOOT_DRIVER(socfpga_agilex_clk) = {
.of_match = socfpga_clk_match,
.ops = &socfpga_clk_ops,
.probe = socfpga_clk_probe,
- .ofdata_to_platdata = socfpga_clk_ofdata_to_platdata,
- .platdata_auto_alloc_size = sizeof(struct socfpga_clk_platdata),
+ .of_to_plat = socfpga_clk_of_to_plat,
+ .plat_auto = sizeof(struct socfpga_clk_plat),
};
diff --git a/drivers/clk/altera/clk-arria10.c b/drivers/clk/altera/clk-arria10.c
index 732ed4d79b..1812152d56 100644
--- a/drivers/clk/altera/clk-arria10.c
+++ b/drivers/clk/altera/clk-arria10.c
@@ -24,7 +24,7 @@ enum socfpga_a10_clk_type {
SOCFPGA_A10_CLK_UNKNOWN_CLK,
};
-struct socfpga_a10_clk_platdata {
+struct socfpga_a10_clk_plat {
enum socfpga_a10_clk_type type;
struct clk_bulk clks;
u32 regs;
@@ -43,7 +43,7 @@ struct socfpga_a10_clk_platdata {
static int socfpga_a10_clk_get_upstream(struct clk *clk, struct clk **upclk)
{
- struct socfpga_a10_clk_platdata *plat = dev_get_platdata(clk->dev);
+ struct socfpga_a10_clk_plat *plat = dev_get_plat(clk->dev);
u32 reg, maxval;
if (plat->clks.count == 0)
@@ -84,7 +84,7 @@ static int socfpga_a10_clk_get_upstream(struct clk *clk, struct clk **upclk)
static int socfpga_a10_clk_endisable(struct clk *clk, bool enable)
{
- struct socfpga_a10_clk_platdata *plat = dev_get_platdata(clk->dev);
+ struct socfpga_a10_clk_plat *plat = dev_get_plat(clk->dev);
struct clk *upclk = NULL;
int ret;
@@ -120,7 +120,7 @@ static int socfpga_a10_clk_disable(struct clk *clk)
static ulong socfpga_a10_clk_get_rate(struct clk *clk)
{
- struct socfpga_a10_clk_platdata *plat = dev_get_platdata(clk->dev);
+ struct socfpga_a10_clk_plat *plat = dev_get_plat(clk->dev);
struct clk *upclk = NULL;
ulong rate = 0, reg, numer, denom;
int ret;
@@ -190,7 +190,7 @@ static struct clk_ops socfpga_a10_clk_ops = {
*/
static void socfpga_a10_handoff_workaround(struct udevice *dev)
{
- struct socfpga_a10_clk_platdata *plat = dev_get_platdata(dev);
+ struct socfpga_a10_clk_plat *plat = dev_get_plat(dev);
const void *fdt = gd->fdt_blob;
struct clk_bulk *bulk = &plat->clks;
int i, ret, offset = dev_of_offset(dev);
@@ -274,8 +274,8 @@ static int socfpga_a10_clk_bind(struct udevice *dev)
static int socfpga_a10_clk_probe(struct udevice *dev)
{
- struct socfpga_a10_clk_platdata *plat = dev_get_platdata(dev);
- struct socfpga_a10_clk_platdata *pplat;
+ struct socfpga_a10_clk_plat *plat = dev_get_plat(dev);
+ struct socfpga_a10_clk_plat *pplat;
struct udevice *pdev;
const void *fdt = gd->fdt_blob;
int offset = dev_of_offset(dev);
@@ -291,7 +291,7 @@ static int socfpga_a10_clk_probe(struct udevice *dev)
if (!pdev)
return -ENODEV;
- pplat = dev_get_platdata(pdev);
+ pplat = dev_get_plat(pdev);
if (!pplat)
return -EINVAL;
@@ -319,9 +319,9 @@ static int socfpga_a10_clk_probe(struct udevice *dev)
return 0;
}
-static int socfpga_a10_ofdata_to_platdata(struct udevice *dev)
+static int socfpga_a10_of_to_plat(struct udevice *dev)
{
- struct socfpga_a10_clk_platdata *plat = dev_get_platdata(dev);
+ struct socfpga_a10_clk_plat *plat = dev_get_plat(dev);
unsigned int divreg[3], gatereg[2];
int ret;
@@ -357,7 +357,7 @@ U_BOOT_DRIVER(socfpga_a10_clk) = {
.ops = &socfpga_a10_clk_ops,
.bind = socfpga_a10_clk_bind,
.probe = socfpga_a10_clk_probe,
- .ofdata_to_platdata = socfpga_a10_ofdata_to_platdata,
+ .of_to_plat = socfpga_a10_of_to_plat,
- .platdata_auto_alloc_size = sizeof(struct socfpga_a10_clk_platdata),
+ .plat_auto = sizeof(struct socfpga_a10_clk_plat),
};
diff --git a/drivers/clk/aspeed/clk_ast2500.c b/drivers/clk/aspeed/clk_ast2500.c
index aab7d14deb..a090671625 100644
--- a/drivers/clk/aspeed/clk_ast2500.c
+++ b/drivers/clk/aspeed/clk_ast2500.c
@@ -491,7 +491,7 @@ struct clk_ops ast2500_clk_ops = {
.enable = ast2500_clk_enable,
};
-static int ast2500_clk_ofdata_to_platdata(struct udevice *dev)
+static int ast2500_clk_of_to_plat(struct udevice *dev)
{
struct ast2500_clk_priv *priv = dev_get_priv(dev);
@@ -523,8 +523,8 @@ U_BOOT_DRIVER(aspeed_ast2500_scu) = {
.name = "aspeed_ast2500_scu",
.id = UCLASS_CLK,
.of_match = ast2500_clk_ids,
- .priv_auto_alloc_size = sizeof(struct ast2500_clk_priv),
+ .priv_auto = sizeof(struct ast2500_clk_priv),
.ops = &ast2500_clk_ops,
.bind = ast2500_clk_bind,
- .ofdata_to_platdata = ast2500_clk_ofdata_to_platdata,
+ .of_to_plat = ast2500_clk_of_to_plat,
};
diff --git a/drivers/clk/at91/compat.c b/drivers/clk/at91/compat.c
index 9563285674..e514f26656 100644
--- a/drivers/clk/at91/compat.c
+++ b/drivers/clk/at91/compat.c
@@ -21,7 +21,7 @@
DECLARE_GLOBAL_DATA_PTR;
-struct pmc_platdata {
+struct pmc_plat {
struct at91_pmc *reg_base;
struct regmap *regmap_sfr;
};
@@ -45,7 +45,7 @@ U_BOOT_DRIVER(at91_pmc) = {
static int at91_pmc_core_probe(struct udevice *dev)
{
- struct pmc_platdata *plat = dev_get_platdata(dev);
+ struct pmc_plat *plat = dev_get_plat(dev);
dev = dev_get_parent(dev);
@@ -62,34 +62,30 @@ static int at91_pmc_core_probe(struct udevice *dev)
*/
int at91_clk_sub_device_bind(struct udevice *dev, const char *drv_name)
{
- const void *fdt = gd->fdt_blob;
- int offset = dev_of_offset(dev);
+ ofnode parent = dev_ofnode(dev);
+ ofnode node;
bool pre_reloc_only = !(gd->flags & GD_FLG_RELOC);
const char *name;
int ret;
- for (offset = fdt_first_subnode(fdt, offset);
- offset > 0;
- offset = fdt_next_subnode(fdt, offset)) {
- if (pre_reloc_only &&
- !ofnode_pre_reloc(offset_to_ofnode(offset)))
+ ofnode_for_each_subnode(node, parent) {
+ if (pre_reloc_only && !ofnode_pre_reloc(node))
continue;
/*
* If this node has "compatible" property, this is not
* a clock sub-node, but a normal device. skip.
*/
- fdt_get_property(fdt, offset, "compatible", &ret);
- if (ret >= 0)
+ if (ofnode_read_prop(node, "compatible", NULL))
continue;
if (ret != -FDT_ERR_NOTFOUND)
return ret;
- name = fdt_get_name(fdt, offset, NULL);
+ name = ofnode_get_name(node);
if (!name)
return -EINVAL;
- ret = device_bind_driver_to_node(dev, drv_name, name,
- offset_to_ofnode(offset), NULL);
+ ret = device_bind_driver_to_node(dev, drv_name, name, node,
+ NULL);
if (ret)
return ret;
}
@@ -119,7 +115,7 @@ int at91_clk_of_xlate(struct clk *clk, struct ofnode_phandle_args *args)
int at91_clk_probe(struct udevice *dev)
{
struct udevice *dev_periph_container, *dev_pmc;
- struct pmc_platdata *plat = dev_get_platdata(dev);
+ struct pmc_plat *plat = dev_get_plat(dev);
dev_periph_container = dev_get_parent(dev);
dev_pmc = dev_get_parent(dev_periph_container);
@@ -195,7 +191,7 @@ U_BOOT_DRIVER(at91_master_clk) = {
/* Main osc clock specific code. */
static int main_osc_clk_enable(struct clk *clk)
{
- struct pmc_platdata *plat = dev_get_platdata(clk->dev);
+ struct pmc_plat *plat = dev_get_plat(clk->dev);
struct at91_pmc *pmc = plat->reg_base;
if (readl(&pmc->sr) & AT91_PMC_MOSCSELS)
@@ -229,14 +225,14 @@ U_BOOT_DRIVER(at91sam9x5_main_osc_clk) = {
.id = UCLASS_CLK,
.of_match = main_osc_clk_match,
.probe = main_osc_clk_probe,
- .platdata_auto_alloc_size = sizeof(struct pmc_platdata),
+ .plat_auto = sizeof(struct pmc_plat),
.ops = &main_osc_clk_ops,
};
/* PLLA clock specific code. */
static int plla_clk_enable(struct clk *clk)
{
- struct pmc_platdata *plat = dev_get_platdata(clk->dev);
+ struct pmc_plat *plat = dev_get_plat(clk->dev);
struct at91_pmc *pmc = plat->reg_base;
if (readl(&pmc->sr) & AT91_PMC_LOCKA)
@@ -270,7 +266,7 @@ U_BOOT_DRIVER(at91_plla_clk) = {
.id = UCLASS_CLK,
.of_match = plla_clk_match,
.probe = plla_clk_probe,
- .platdata_auto_alloc_size = sizeof(struct pmc_platdata),
+ .plat_auto = sizeof(struct pmc_plat),
.ops = &plla_clk_ops,
};
@@ -282,7 +278,7 @@ static int at91_plladiv_clk_enable(struct clk *clk)
static ulong at91_plladiv_clk_get_rate(struct clk *clk)
{
- struct pmc_platdata *plat = dev_get_platdata(clk->dev);
+ struct pmc_plat *plat = dev_get_plat(clk->dev);
struct at91_pmc *pmc = plat->reg_base;
struct clk source;
ulong clk_rate;
@@ -301,7 +297,7 @@ static ulong at91_plladiv_clk_get_rate(struct clk *clk)
static ulong at91_plladiv_clk_set_rate(struct clk *clk, ulong rate)
{
- struct pmc_platdata *plat = dev_get_platdata(clk->dev);
+ struct pmc_plat *plat = dev_get_plat(clk->dev);
struct at91_pmc *pmc = plat->reg_base;
struct clk source;
ulong parent_rate;
@@ -344,7 +340,7 @@ U_BOOT_DRIVER(at91_plladiv_clk) = {
.id = UCLASS_CLK,
.of_match = at91_plladiv_clk_match,
.probe = at91_plladiv_clk_probe,
- .platdata_auto_alloc_size = sizeof(struct pmc_platdata),
+ .plat_auto = sizeof(struct pmc_plat),
.ops = &at91_plladiv_clk_ops,
};
@@ -405,7 +401,7 @@ static ulong system_clk_set_rate(struct clk *clk, ulong rate)
static int system_clk_enable(struct clk *clk)
{
- struct pmc_platdata *plat = dev_get_platdata(clk->dev);
+ struct pmc_plat *plat = dev_get_plat(clk->dev);
struct at91_pmc *pmc = plat->reg_base;
u32 mask;
@@ -441,7 +437,7 @@ U_BOOT_DRIVER(system_clk) = {
.name = "system-clk",
.id = UCLASS_CLK,
.probe = at91_clk_probe,
- .platdata_auto_alloc_size = sizeof(struct pmc_platdata),
+ .plat_auto = sizeof(struct pmc_plat),
.ops = &system_clk_ops,
};
@@ -487,7 +483,7 @@ U_BOOT_DRIVER(sam9x5_periph_clk) = {
static int periph_clk_enable(struct clk *clk)
{
- struct pmc_platdata *plat = dev_get_platdata(clk->dev);
+ struct pmc_plat *plat = dev_get_plat(clk->dev);
struct at91_pmc *pmc = plat->reg_base;
enum periph_clk_type clk_type;
void *addr;
@@ -540,7 +536,7 @@ static struct clk_ops periph_clk_ops = {
U_BOOT_DRIVER(clk_periph) = {
.name = "periph-clk",
.id = UCLASS_CLK,
- .platdata_auto_alloc_size = sizeof(struct pmc_platdata),
+ .plat_auto = sizeof(struct pmc_plat),
.probe = at91_clk_probe,
.ops = &periph_clk_ops,
};
@@ -556,7 +552,7 @@ U_BOOT_DRIVER(clk_periph) = {
static int utmi_clk_enable(struct clk *clk)
{
- struct pmc_platdata *plat = dev_get_platdata(clk->dev);
+ struct pmc_plat *plat = dev_get_plat(clk->dev);
struct at91_pmc *pmc = plat->reg_base;
struct clk clk_dev;
ulong clk_rate;
@@ -642,9 +638,9 @@ static struct clk_ops utmi_clk_ops = {
.get_rate = utmi_clk_get_rate,
};
-static int utmi_clk_ofdata_to_platdata(struct udevice *dev)
+static int utmi_clk_of_to_plat(struct udevice *dev)
{
- struct pmc_platdata *plat = dev_get_platdata(dev);
+ struct pmc_plat *plat = dev_get_plat(dev);
struct udevice *syscon;
uclass_get_device_by_phandle(UCLASS_SYSCON, dev,
@@ -671,8 +667,8 @@ U_BOOT_DRIVER(at91sam9x5_utmi_clk) = {
.id = UCLASS_CLK,
.of_match = utmi_clk_match,
.probe = utmi_clk_probe,
- .ofdata_to_platdata = utmi_clk_ofdata_to_platdata,
- .platdata_auto_alloc_size = sizeof(struct pmc_platdata),
+ .of_to_plat = utmi_clk_of_to_plat,
+ .plat_auto = sizeof(struct pmc_plat),
.ops = &utmi_clk_ops,
};
@@ -685,7 +681,7 @@ U_BOOT_DRIVER(at91sam9x5_utmi_clk) = {
static ulong sama5d4_h32mx_clk_get_rate(struct clk *clk)
{
- struct pmc_platdata *plat = dev_get_platdata(clk->dev);
+ struct pmc_plat *plat = dev_get_plat(clk->dev);
struct at91_pmc *pmc = plat->reg_base;
ulong rate = gd->arch.mck_rate_hz;
@@ -717,7 +713,7 @@ U_BOOT_DRIVER(sama5d4_h32mx_clk) = {
.id = UCLASS_CLK,
.of_match = sama5d4_h32mx_clk_match,
.probe = sama5d4_h32mx_clk_probe,
- .platdata_auto_alloc_size = sizeof(struct pmc_platdata),
+ .plat_auto = sizeof(struct pmc_plat),
.ops = &sama5d4_h32mx_clk_ops,
};
@@ -758,7 +754,7 @@ struct generic_clk_priv {
static ulong generic_clk_get_rate(struct clk *clk)
{
- struct pmc_platdata *plat = dev_get_platdata(clk->dev);
+ struct pmc_plat *plat = dev_get_plat(clk->dev);
struct at91_pmc *pmc = plat->reg_base;
struct clk parent;
ulong clk_rate;
@@ -786,7 +782,7 @@ static ulong generic_clk_get_rate(struct clk *clk)
static ulong generic_clk_set_rate(struct clk *clk, ulong rate)
{
- struct pmc_platdata *plat = dev_get_platdata(clk->dev);
+ struct pmc_plat *plat = dev_get_plat(clk->dev);
struct at91_pmc *pmc = plat->reg_base;
struct generic_clk_priv *priv = dev_get_priv(clk->dev);
struct clk parent, best_parent;
@@ -857,7 +853,7 @@ static struct clk_ops generic_clk_ops = {
.set_rate = generic_clk_set_rate,
};
-static int generic_clk_ofdata_to_platdata(struct udevice *dev)
+static int generic_clk_of_to_plat(struct udevice *dev)
{
struct generic_clk_priv *priv = dev_get_priv(dev);
u32 cells[GENERATED_SOURCE_MAX];
@@ -879,9 +875,9 @@ U_BOOT_DRIVER(generic_clk) = {
.name = "generic-clk",
.id = UCLASS_CLK,
.probe = at91_clk_probe,
- .ofdata_to_platdata = generic_clk_ofdata_to_platdata,
- .priv_auto_alloc_size = sizeof(struct generic_clk_priv),
- .platdata_auto_alloc_size = sizeof(struct pmc_platdata),
+ .of_to_plat = generic_clk_of_to_plat,
+ .priv_auto = sizeof(struct generic_clk_priv),
+ .plat_auto = sizeof(struct pmc_plat),
.ops = &generic_clk_ops,
};
@@ -899,7 +895,7 @@ struct at91_usb_clk_priv {
static ulong at91_usb_clk_get_rate(struct clk *clk)
{
- struct pmc_platdata *plat = dev_get_platdata(clk->dev);
+ struct pmc_plat *plat = dev_get_plat(clk->dev);
struct at91_pmc *pmc = plat->reg_base;
struct clk source;
u32 tmp, usbdiv;
@@ -920,7 +916,7 @@ static ulong at91_usb_clk_get_rate(struct clk *clk)
static ulong at91_usb_clk_set_rate(struct clk *clk, ulong rate)
{
- struct pmc_platdata *plat = dev_get_platdata(clk->dev);
+ struct pmc_plat *plat = dev_get_plat(clk->dev);
struct at91_pmc *pmc = plat->reg_base;
struct at91_usb_clk_priv *priv = dev_get_priv(clk->dev);
struct clk source, best_source;
@@ -981,7 +977,7 @@ static struct clk_ops at91_usb_clk_ops = {
.set_rate = at91_usb_clk_set_rate,
};
-static int at91_usb_clk_ofdata_to_platdata(struct udevice *dev)
+static int at91_usb_clk_of_to_plat(struct udevice *dev)
{
struct at91_usb_clk_priv *priv = dev_get_priv(dev);
u32 cells[AT91_USB_CLK_SOURCE_MAX];
@@ -1015,9 +1011,9 @@ U_BOOT_DRIVER(at91_usb_clk) = {
.id = UCLASS_CLK,
.of_match = at91_usb_clk_match,
.probe = at91_usb_clk_probe,
- .ofdata_to_platdata = at91_usb_clk_ofdata_to_platdata,
- .priv_auto_alloc_size = sizeof(struct at91_usb_clk_priv),
- .platdata_auto_alloc_size = sizeof(struct pmc_platdata),
+ .of_to_plat = at91_usb_clk_of_to_plat,
+ .priv_auto = sizeof(struct at91_usb_clk_priv),
+ .plat_auto = sizeof(struct pmc_plat),
.ops = &at91_usb_clk_ops,
};
diff --git a/drivers/clk/at91/sckc.c b/drivers/clk/at91/sckc.c
index dd62dc5510..34ce611a98 100644
--- a/drivers/clk/at91/sckc.c
+++ b/drivers/clk/at91/sckc.c
@@ -165,7 +165,7 @@ U_BOOT_DRIVER(at91_sckc) = {
.name = UBOOT_DM_CLK_AT91_SCKC,
.id = UCLASS_CLK,
.of_match = sam9x60_sckc_ids,
- .priv_auto_alloc_size = sizeof(struct sam9x60_sckc) * 2,
+ .priv_auto = sizeof(struct sam9x60_sckc) * 2,
.ops = &sam9x60_sckc_ops,
.probe = at91_sam9x60_sckc_probe,
.flags = DM_FLAG_PRE_RELOC,
diff --git a/drivers/clk/clk-cdce9xx.c b/drivers/clk/clk-cdce9xx.c
index fd47872ab9..6634b7b799 100644
--- a/drivers/clk/clk-cdce9xx.c
+++ b/drivers/clk/clk-cdce9xx.c
@@ -251,6 +251,6 @@ U_BOOT_DRIVER(cdce9xx_clk) = {
.id = UCLASS_CLK,
.of_match = cdce9xx_clk_of_match,
.probe = cdce9xx_clk_probe,
- .priv_auto_alloc_size = sizeof(struct cdce9xx_clk_data),
+ .priv_auto = sizeof(struct cdce9xx_clk_data),
.ops = &cdce9xx_clk_ops,
};
diff --git a/drivers/clk/clk-hsdk-cgu.c b/drivers/clk/clk-hsdk-cgu.c
index 3eb93a55fc..449b430e23 100644
--- a/drivers/clk/clk-hsdk-cgu.c
+++ b/drivers/clk/clk-hsdk-cgu.c
@@ -774,6 +774,6 @@ U_BOOT_DRIVER(hsdk_cgu_clk) = {
.id = UCLASS_CLK,
.of_match = hsdk_cgu_clk_id,
.probe = hsdk_cgu_clk_probe,
- .priv_auto_alloc_size = sizeof(struct hsdk_cgu_clk),
+ .priv_auto = sizeof(struct hsdk_cgu_clk),
.ops = &hsdk_cgu_ops,
};
diff --git a/drivers/clk/clk-ti-sci.c b/drivers/clk/clk-ti-sci.c
index 7a9a645137..6f0fdaa111 100644
--- a/drivers/clk/clk-ti-sci.c
+++ b/drivers/clk/clk-ti-sci.c
@@ -220,6 +220,6 @@ U_BOOT_DRIVER(ti_sci_clk) = {
.id = UCLASS_CLK,
.of_match = ti_sci_clk_of_match,
.probe = ti_sci_clk_probe,
- .priv_auto_alloc_size = sizeof(struct ti_sci_clk_data),
+ .priv_auto = sizeof(struct ti_sci_clk_data),
.ops = &ti_sci_clk_ops,
};
diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
index ac954a34d2..5cfd00ce77 100644
--- a/drivers/clk/clk-uclass.c
+++ b/drivers/clk/clk-uclass.c
@@ -345,7 +345,7 @@ int clk_set_defaults(struct udevice *dev, int stage)
{
int ret;
- if (!dev_of_valid(dev))
+ if (!dev_has_ofnode(dev))
return 0;
/* If this not in SPL and pre-reloc state, don't take any action. */
diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
index 319808d433..1efb7fe9f3 100644
--- a/drivers/clk/clk.c
+++ b/drivers/clk/clk.c
@@ -36,7 +36,7 @@ int clk_register(struct clk *clk, const char *drv_name,
return -ENOENT;
}
- ret = device_bind(parent, drv, name, NULL, -1, &clk->dev);
+ ret = device_bind(parent, drv, name, NULL, ofnode_null(), &clk->dev);
if (ret) {
printf("%s: CLK: %s driver bind error [%d]!\n", __func__, name,
ret);
@@ -44,8 +44,10 @@ int clk_register(struct clk *clk, const char *drv_name,
}
clk->enable_count = 0;
+
/* Store back pointer to clk from udevice */
- clk->dev->uclass_priv = clk;
+ /* FIXME: This is not allowed...should be allocated by driver model */
+ dev_set_uclass_priv(clk->dev, clk);
return 0;
}
@@ -65,7 +67,7 @@ const char *clk_hw_get_name(const struct clk *hw)
bool clk_dev_binded(struct clk *clk)
{
- if (clk->dev && (clk->dev->flags & DM_FLAG_BOUND))
+ if (clk->dev && (dev_get_flags(clk->dev) & DM_FLAG_BOUND))
return true;
return false;
diff --git a/drivers/clk/clk_bcm6345.c b/drivers/clk/clk_bcm6345.c
index b850b9fc06..8c22ed2f43 100644
--- a/drivers/clk/clk_bcm6345.c
+++ b/drivers/clk/clk_bcm6345.c
@@ -70,5 +70,5 @@ U_BOOT_DRIVER(clk_bcm6345) = {
.of_match = bcm6345_clk_ids,
.ops = &bcm6345_clk_ops,
.probe = bcm63xx_clk_probe,
- .priv_auto_alloc_size = sizeof(struct bcm6345_clk_priv),
+ .priv_auto = sizeof(struct bcm6345_clk_priv),
};
diff --git a/drivers/clk/clk_boston.c b/drivers/clk/clk_boston.c
index 2318dcf6a4..2e81777b70 100644
--- a/drivers/clk/clk_boston.c
+++ b/drivers/clk/clk_boston.c
@@ -28,7 +28,7 @@ static uint32_t ext_field(uint32_t val, uint32_t mask)
static ulong clk_boston_get_rate(struct clk *clk)
{
- struct clk_boston *state = dev_get_platdata(clk->dev);
+ struct clk_boston *state = dev_get_plat(clk->dev);
uint32_t in_rate, mul, div;
uint mmcmdiv;
int err;
@@ -58,9 +58,9 @@ const struct clk_ops clk_boston_ops = {
.get_rate = clk_boston_get_rate,
};
-static int clk_boston_ofdata_to_platdata(struct udevice *dev)
+static int clk_boston_of_to_plat(struct udevice *dev)
{
- struct clk_boston *state = dev_get_platdata(dev);
+ struct clk_boston *state = dev_get_plat(dev);
struct udevice *syscon;
int err;
@@ -91,7 +91,7 @@ U_BOOT_DRIVER(clk_boston) = {
.name = "boston_clock",
.id = UCLASS_CLK,
.of_match = clk_boston_match,
- .ofdata_to_platdata = clk_boston_ofdata_to_platdata,
- .platdata_auto_alloc_size = sizeof(struct clk_boston),
+ .of_to_plat = clk_boston_of_to_plat,
+ .plat_auto = sizeof(struct clk_boston),
.ops = &clk_boston_ops,
};
diff --git a/drivers/clk/clk_fixed_factor.c b/drivers/clk/clk_fixed_factor.c
index cf9c4ae367..e51f94a937 100644
--- a/drivers/clk/clk_fixed_factor.c
+++ b/drivers/clk/clk_fixed_factor.c
@@ -18,7 +18,7 @@ struct clk_fixed_factor {
};
#define to_clk_fixed_factor(dev) \
- ((struct clk_fixed_factor *)dev_get_platdata(dev))
+ ((struct clk_fixed_factor *)dev_get_plat(dev))
static ulong clk_fixed_factor_get_rate(struct clk *clk)
{
@@ -38,7 +38,7 @@ const struct clk_ops clk_fixed_factor_ops = {
.get_rate = clk_fixed_factor_get_rate,
};
-static int clk_fixed_factor_ofdata_to_platdata(struct udevice *dev)
+static int clk_fixed_factor_of_to_plat(struct udevice *dev)
{
#if !CONFIG_IS_ENABLED(OF_PLATDATA)
int err;
@@ -66,7 +66,7 @@ U_BOOT_DRIVER(clk_fixed_factor) = {
.name = "fixed_factor_clock",
.id = UCLASS_CLK,
.of_match = clk_fixed_factor_match,
- .ofdata_to_platdata = clk_fixed_factor_ofdata_to_platdata,
- .platdata_auto_alloc_size = sizeof(struct clk_fixed_factor),
+ .of_to_plat = clk_fixed_factor_of_to_plat,
+ .plat_auto = sizeof(struct clk_fixed_factor),
.ops = &clk_fixed_factor_ops,
};
diff --git a/drivers/clk/clk_fixed_rate.c b/drivers/clk/clk_fixed_rate.c
index f86b4a0e92..3c5a83c523 100644
--- a/drivers/clk/clk_fixed_rate.c
+++ b/drivers/clk/clk_fixed_rate.c
@@ -6,6 +6,7 @@
#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
+#include <dm/device-internal.h>
#include <linux/clk-provider.h>
static ulong clk_fixed_rate_get_rate(struct clk *clk)
@@ -24,7 +25,7 @@ const struct clk_ops clk_fixed_rate_ops = {
.enable = dummy_enable,
};
-static int clk_fixed_rate_ofdata_to_platdata(struct udevice *dev)
+static int clk_fixed_rate_of_to_plat(struct udevice *dev)
{
struct clk *clk = &to_clk_fixed_rate(dev)->clk;
#if !CONFIG_IS_ENABLED(OF_PLATDATA)
@@ -32,7 +33,8 @@ static int clk_fixed_rate_ofdata_to_platdata(struct udevice *dev)
dev_read_u32_default(dev, "clock-frequency", 0);
#endif
/* Make fixed rate clock accessible from higher level struct clk */
- dev->uclass_priv = clk;
+ /* FIXME: This is not allowed */
+ dev_set_uclass_priv(dev, clk);
clk->dev = dev;
clk->enable_count = 0;
@@ -50,8 +52,8 @@ U_BOOT_DRIVER(fixed_clock) = {
.name = "fixed_clock",
.id = UCLASS_CLK,
.of_match = clk_fixed_rate_match,
- .ofdata_to_platdata = clk_fixed_rate_ofdata_to_platdata,
- .platdata_auto_alloc_size = sizeof(struct clk_fixed_rate),
+ .of_to_plat = clk_fixed_rate_of_to_plat,
+ .plat_auto = sizeof(struct clk_fixed_rate),
.ops = &clk_fixed_rate_ops,
.flags = DM_FLAG_PRE_RELOC,
};
diff --git a/drivers/clk/clk_octeon.c b/drivers/clk/clk_octeon.c
index fd559e05fc..ce274549da 100644
--- a/drivers/clk/clk_octeon.c
+++ b/drivers/clk/clk_octeon.c
@@ -68,5 +68,5 @@ U_BOOT_DRIVER(clk_octeon) = {
.of_match = octeon_clk_ids,
.ops = &octeon_clk_ops,
.probe = octeon_clk_probe,
- .priv_auto_alloc_size = sizeof(struct octeon_clk_priv),
+ .priv_auto = sizeof(struct octeon_clk_priv),
};
diff --git a/drivers/clk/clk_pic32.c b/drivers/clk/clk_pic32.c
index dc46de2a7c..5a10d4640d 100644
--- a/drivers/clk/clk_pic32.c
+++ b/drivers/clk/clk_pic32.c
@@ -423,5 +423,5 @@ U_BOOT_DRIVER(pic32_clk) = {
.of_match = pic32_clk_ids,
.ops = &pic32_pic32_clk_ops,
.probe = pic32_clk_probe,
- .priv_auto_alloc_size = sizeof(struct pic32_clk_priv),
+ .priv_auto = sizeof(struct pic32_clk_priv),
};
diff --git a/drivers/clk/clk_sandbox.c b/drivers/clk/clk_sandbox.c
index 0ff1b49633..2c6c0e239f 100644
--- a/drivers/clk/clk_sandbox.c
+++ b/drivers/clk/clk_sandbox.c
@@ -130,7 +130,7 @@ U_BOOT_DRIVER(sandbox_clk) = {
.of_match = sandbox_clk_ids,
.ops = &sandbox_clk_ops,
.probe = sandbox_clk_probe,
- .priv_auto_alloc_size = sizeof(struct sandbox_clk_priv),
+ .priv_auto = sizeof(struct sandbox_clk_priv),
};
ulong sandbox_clk_query_rate(struct udevice *dev, int id)
diff --git a/drivers/clk/clk_sandbox_test.c b/drivers/clk/clk_sandbox_test.c
index 873383856f..e9eb738684 100644
--- a/drivers/clk/clk_sandbox_test.c
+++ b/drivers/clk/clk_sandbox_test.c
@@ -189,5 +189,5 @@ U_BOOT_DRIVER(sandbox_clk_test) = {
.id = UCLASS_MISC,
.of_match = sandbox_clk_test_ids,
.probe = sandbox_clk_test_probe,
- .priv_auto_alloc_size = sizeof(struct sandbox_clk_test),
+ .priv_auto = sizeof(struct sandbox_clk_test),
};
diff --git a/drivers/clk/clk_stm32f.c b/drivers/clk/clk_stm32f.c
index 93722f74ae..7e67895ab7 100644
--- a/drivers/clk/clk_stm32f.c
+++ b/drivers/clk/clk_stm32f.c
@@ -726,6 +726,6 @@ U_BOOT_DRIVER(stm32fx_clk) = {
.id = UCLASS_CLK,
.ops = &stm32_clk_ops,
.probe = stm32_clk_probe,
- .priv_auto_alloc_size = sizeof(struct stm32_clk),
+ .priv_auto = sizeof(struct stm32_clk),
.flags = DM_FLAG_PRE_RELOC,
};
diff --git a/drivers/clk/clk_stm32h7.c b/drivers/clk/clk_stm32h7.c
index edf90ee00f..0171fe8c11 100644
--- a/drivers/clk/clk_stm32h7.c
+++ b/drivers/clk/clk_stm32h7.c
@@ -868,6 +868,6 @@ U_BOOT_DRIVER(stm32h7_clk) = {
.id = UCLASS_CLK,
.ops = &stm32_clk_ops,
.probe = stm32_clk_probe,
- .priv_auto_alloc_size = sizeof(struct stm32_clk),
+ .priv_auto = sizeof(struct stm32_clk),
.flags = DM_FLAG_PRE_RELOC,
};
diff --git a/drivers/clk/clk_stm32mp1.c b/drivers/clk/clk_stm32mp1.c
index c8840b9e5f..5bea2b60b9 100644
--- a/drivers/clk/clk_stm32mp1.c
+++ b/drivers/clk/clk_stm32mp1.c
@@ -2253,7 +2253,7 @@ int soc_clk_dump(void)
int ret;
ret = uclass_get_device_by_driver(UCLASS_CLK,
- DM_GET_DRIVER(stm32mp1_clock),
+ DM_DRIVER_GET(stm32mp1_clock),
&dev);
if (ret)
return ret;
@@ -2332,6 +2332,6 @@ U_BOOT_DRIVER(stm32mp1_clock) = {
.name = "stm32mp1_clk",
.id = UCLASS_CLK,
.ops = &stm32mp1_clk_ops,
- .priv_auto_alloc_size = sizeof(struct stm32mp1_clk_priv),
+ .priv_auto = sizeof(struct stm32mp1_clk_priv),
.probe = stm32mp1_clk_probe,
};
diff --git a/drivers/clk/clk_versal.c b/drivers/clk/clk_versal.c
index d93b860aed..908bc7519c 100644
--- a/drivers/clk/clk_versal.c
+++ b/drivers/clk/clk_versal.c
@@ -734,5 +734,5 @@ U_BOOT_DRIVER(versal_clk) = {
.of_match = versal_clk_ids,
.probe = versal_clk_probe,
.ops = &versal_clk_ops,
- .priv_auto_alloc_size = sizeof(struct versal_clk_priv),
+ .priv_auto = sizeof(struct versal_clk_priv),
};
diff --git a/drivers/clk/clk_vexpress_osc.c b/drivers/clk/clk_vexpress_osc.c
index b48319bba6..3b1e0208d4 100644
--- a/drivers/clk/clk_vexpress_osc.c
+++ b/drivers/clk/clk_vexpress_osc.c
@@ -107,6 +107,6 @@ U_BOOT_DRIVER(vexpress_osc_clk) = {
.id = UCLASS_CLK,
.of_match = vexpress_osc_clk_ids,
.ops = &vexpress_osc_clk_ops,
- .priv_auto_alloc_size = sizeof(struct vexpress_osc_clk_priv),
+ .priv_auto = sizeof(struct vexpress_osc_clk_priv),
.probe = vexpress_osc_clk_probe,
};
diff --git a/drivers/clk/clk_zynq.c b/drivers/clk/clk_zynq.c
index a699a3664c..bf32d8317a 100644
--- a/drivers/clk/clk_zynq.c
+++ b/drivers/clk/clk_zynq.c
@@ -485,6 +485,6 @@ U_BOOT_DRIVER(zynq_clk) = {
.id = UCLASS_CLK,
.of_match = zynq_clk_ids,
.ops = &zynq_clk_ops,
- .priv_auto_alloc_size = sizeof(struct zynq_clk_priv),
+ .priv_auto = sizeof(struct zynq_clk_priv),
.probe = zynq_clk_probe,
};
diff --git a/drivers/clk/clk_zynqmp.c b/drivers/clk/clk_zynqmp.c
index 7795119756..e8acca0066 100644
--- a/drivers/clk/clk_zynqmp.c
+++ b/drivers/clk/clk_zynqmp.c
@@ -617,7 +617,7 @@ int soc_clk_dump(void)
int i, ret;
ret = uclass_get_device_by_driver(UCLASS_CLK,
- DM_GET_DRIVER(zynqmp_clk), &dev);
+ DM_DRIVER_GET(zynqmp_clk), &dev);
if (ret)
return ret;
@@ -715,5 +715,5 @@ U_BOOT_DRIVER(zynqmp_clk) = {
.of_match = zynqmp_clk_ids,
.probe = zynqmp_clk_probe,
.ops = &zynqmp_clk_ops,
- .priv_auto_alloc_size = sizeof(struct zynqmp_clk_priv),
+ .priv_auto = sizeof(struct zynqmp_clk_priv),
};
diff --git a/drivers/clk/exynos/clk-exynos7420.c b/drivers/clk/exynos/clk-exynos7420.c
index 4a023ea736..7d869eb02b 100644
--- a/drivers/clk/exynos/clk-exynos7420.c
+++ b/drivers/clk/exynos/clk-exynos7420.c
@@ -199,7 +199,7 @@ U_BOOT_DRIVER(exynos7420_clk_topc) = {
.id = UCLASS_CLK,
.of_match = exynos7420_clk_topc_compat,
.probe = exynos7420_clk_topc_probe,
- .priv_auto_alloc_size = sizeof(struct exynos7420_clk_topc_priv),
+ .priv_auto = sizeof(struct exynos7420_clk_topc_priv),
.ops = &exynos7420_clk_topc_ops,
};
@@ -213,7 +213,7 @@ U_BOOT_DRIVER(exynos7420_clk_top0) = {
.id = UCLASS_CLK,
.of_match = exynos7420_clk_top0_compat,
.probe = exynos7420_clk_top0_probe,
- .priv_auto_alloc_size = sizeof(struct exynos7420_clk_top0_priv),
+ .priv_auto = sizeof(struct exynos7420_clk_top0_priv),
.ops = &exynos7420_clk_top0_ops,
};
diff --git a/drivers/clk/ics8n3qv01.c b/drivers/clk/ics8n3qv01.c
index 76b27ad7fd..6bc1b8ba9d 100644
--- a/drivers/clk/ics8n3qv01.c
+++ b/drivers/clk/ics8n3qv01.c
@@ -226,5 +226,5 @@ U_BOOT_DRIVER(ics8n3qv01) = {
.ops = &ics8n3qv01_ops,
.of_match = ics8n3qv01_ids,
.probe = ics8n3qv01_probe,
- .priv_auto_alloc_size = sizeof(struct ics8n3qv01_priv),
+ .priv_auto = sizeof(struct ics8n3qv01_priv),
};
diff --git a/drivers/clk/imx/clk-imx8.c b/drivers/clk/imx/clk-imx8.c
index 27a652a625..8484613eed 100644
--- a/drivers/clk/imx/clk-imx8.c
+++ b/drivers/clk/imx/clk-imx8.c
@@ -51,7 +51,7 @@ int soc_clk_dump(void)
int i, ret;
ret = uclass_get_device_by_driver(UCLASS_CLK,
- DM_GET_DRIVER(imx8_clk), &dev);
+ DM_DRIVER_GET(imx8_clk), &dev);
if (ret)
return ret;
diff --git a/drivers/clk/mediatek/clk-mt7622.c b/drivers/clk/mediatek/clk-mt7622.c
index 0246149107..259ea33595 100644
--- a/drivers/clk/mediatek/clk-mt7622.c
+++ b/drivers/clk/mediatek/clk-mt7622.c
@@ -716,7 +716,7 @@ U_BOOT_DRIVER(mtk_clk_apmixedsys) = {
.id = UCLASS_CLK,
.of_match = mt7622_apmixed_compat,
.probe = mt7622_apmixedsys_probe,
- .priv_auto_alloc_size = sizeof(struct mtk_clk_priv),
+ .priv_auto = sizeof(struct mtk_clk_priv),
.ops = &mtk_clk_apmixedsys_ops,
.flags = DM_FLAG_PRE_RELOC,
};
@@ -726,7 +726,7 @@ U_BOOT_DRIVER(mtk_clk_topckgen) = {
.id = UCLASS_CLK,
.of_match = mt7622_topckgen_compat,
.probe = mt7622_topckgen_probe,
- .priv_auto_alloc_size = sizeof(struct mtk_clk_priv),
+ .priv_auto = sizeof(struct mtk_clk_priv),
.ops = &mtk_clk_topckgen_ops,
.flags = DM_FLAG_PRE_RELOC,
};
@@ -736,7 +736,7 @@ U_BOOT_DRIVER(mtk_clk_infracfg) = {
.id = UCLASS_CLK,
.of_match = mt7622_infracfg_compat,
.probe = mt7622_infracfg_probe,
- .priv_auto_alloc_size = sizeof(struct mtk_cg_priv),
+ .priv_auto = sizeof(struct mtk_cg_priv),
.ops = &mtk_clk_gate_ops,
.flags = DM_FLAG_PRE_RELOC,
};
@@ -746,7 +746,7 @@ U_BOOT_DRIVER(mtk_clk_pericfg) = {
.id = UCLASS_CLK,
.of_match = mt7622_pericfg_compat,
.probe = mt7622_pericfg_probe,
- .priv_auto_alloc_size = sizeof(struct mtk_cg_priv),
+ .priv_auto = sizeof(struct mtk_cg_priv),
.ops = &mtk_clk_gate_ops,
.flags = DM_FLAG_PRE_RELOC,
};
@@ -757,7 +757,7 @@ U_BOOT_DRIVER(mtk_clk_pciesys) = {
.of_match = mt7622_pciesys_compat,
.probe = mt7622_pciesys_probe,
.bind = mt7622_pciesys_bind,
- .priv_auto_alloc_size = sizeof(struct mtk_cg_priv),
+ .priv_auto = sizeof(struct mtk_cg_priv),
.ops = &mtk_clk_gate_ops,
};
@@ -767,7 +767,7 @@ U_BOOT_DRIVER(mtk_clk_ethsys) = {
.of_match = mt7622_ethsys_compat,
.probe = mt7622_ethsys_probe,
.bind = mt7622_ethsys_bind,
- .priv_auto_alloc_size = sizeof(struct mtk_cg_priv),
+ .priv_auto = sizeof(struct mtk_cg_priv),
.ops = &mtk_clk_gate_ops,
};
@@ -776,7 +776,7 @@ U_BOOT_DRIVER(mtk_clk_sgmiisys) = {
.id = UCLASS_CLK,
.of_match = mt7622_sgmiisys_compat,
.probe = mt7622_sgmiisys_probe,
- .priv_auto_alloc_size = sizeof(struct mtk_cg_priv),
+ .priv_auto = sizeof(struct mtk_cg_priv),
.ops = &mtk_clk_gate_ops,
};
@@ -785,6 +785,6 @@ U_BOOT_DRIVER(mtk_clk_ssusbsys) = {
.id = UCLASS_CLK,
.of_match = mt7622_ssusbsys_compat,
.probe = mt7622_ssusbsys_probe,
- .priv_auto_alloc_size = sizeof(struct mtk_cg_priv),
+ .priv_auto = sizeof(struct mtk_cg_priv),
.ops = &mtk_clk_gate_ops,
};
diff --git a/drivers/clk/mediatek/clk-mt7623.c b/drivers/clk/mediatek/clk-mt7623.c
index a15fb45e8e..0c7411ee81 100644
--- a/drivers/clk/mediatek/clk-mt7623.c
+++ b/drivers/clk/mediatek/clk-mt7623.c
@@ -859,7 +859,7 @@ U_BOOT_DRIVER(mtk_clk_apmixedsys) = {
.id = UCLASS_CLK,
.of_match = mt7623_apmixed_compat,
.probe = mt7623_apmixedsys_probe,
- .priv_auto_alloc_size = sizeof(struct mtk_clk_priv),
+ .priv_auto = sizeof(struct mtk_clk_priv),
.ops = &mtk_clk_apmixedsys_ops,
.flags = DM_FLAG_PRE_RELOC,
};
@@ -869,7 +869,7 @@ U_BOOT_DRIVER(mtk_clk_topckgen) = {
.id = UCLASS_CLK,
.of_match = mt7623_topckgen_compat,
.probe = mt7623_topckgen_probe,
- .priv_auto_alloc_size = sizeof(struct mtk_clk_priv),
+ .priv_auto = sizeof(struct mtk_clk_priv),
.ops = &mtk_clk_topckgen_ops,
.flags = DM_FLAG_PRE_RELOC,
};
@@ -879,7 +879,7 @@ U_BOOT_DRIVER(mtk_clk_infracfg) = {
.id = UCLASS_CLK,
.of_match = mt7623_infracfg_compat,
.probe = mt7623_infracfg_probe,
- .priv_auto_alloc_size = sizeof(struct mtk_cg_priv),
+ .priv_auto = sizeof(struct mtk_cg_priv),
.ops = &mtk_clk_gate_ops,
.flags = DM_FLAG_PRE_RELOC,
};
@@ -889,7 +889,7 @@ U_BOOT_DRIVER(mtk_clk_pericfg) = {
.id = UCLASS_CLK,
.of_match = mt7623_pericfg_compat,
.probe = mt7623_pericfg_probe,
- .priv_auto_alloc_size = sizeof(struct mtk_cg_priv),
+ .priv_auto = sizeof(struct mtk_cg_priv),
.ops = &mtk_clk_gate_ops,
.flags = DM_FLAG_PRE_RELOC,
};
@@ -900,7 +900,7 @@ U_BOOT_DRIVER(mtk_clk_hifsys) = {
.of_match = mt7623_hifsys_compat,
.probe = mt7623_hifsys_probe,
.bind = mt7623_ethsys_hifsys_bind,
- .priv_auto_alloc_size = sizeof(struct mtk_cg_priv),
+ .priv_auto = sizeof(struct mtk_cg_priv),
.ops = &mtk_clk_gate_ops,
};
@@ -910,6 +910,6 @@ U_BOOT_DRIVER(mtk_clk_ethsys) = {
.of_match = mt7623_ethsys_compat,
.probe = mt7623_ethsys_probe,
.bind = mt7623_ethsys_hifsys_bind,
- .priv_auto_alloc_size = sizeof(struct mtk_cg_priv),
+ .priv_auto = sizeof(struct mtk_cg_priv),
.ops = &mtk_clk_gate_ops,
};
diff --git a/drivers/clk/mediatek/clk-mt7629.c b/drivers/clk/mediatek/clk-mt7629.c
index 5b2aa5f200..31b6fa0225 100644
--- a/drivers/clk/mediatek/clk-mt7629.c
+++ b/drivers/clk/mediatek/clk-mt7629.c
@@ -704,7 +704,7 @@ U_BOOT_DRIVER(mtk_clk_apmixedsys) = {
.id = UCLASS_CLK,
.of_match = mt7629_apmixed_compat,
.probe = mt7629_apmixedsys_probe,
- .priv_auto_alloc_size = sizeof(struct mtk_clk_priv),
+ .priv_auto = sizeof(struct mtk_clk_priv),
.ops = &mtk_clk_apmixedsys_ops,
.flags = DM_FLAG_PRE_RELOC,
};
@@ -714,7 +714,7 @@ U_BOOT_DRIVER(mtk_clk_topckgen) = {
.id = UCLASS_CLK,
.of_match = mt7629_topckgen_compat,
.probe = mt7629_topckgen_probe,
- .priv_auto_alloc_size = sizeof(struct mtk_clk_priv),
+ .priv_auto = sizeof(struct mtk_clk_priv),
.ops = &mtk_clk_topckgen_ops,
.flags = DM_FLAG_PRE_RELOC,
};
@@ -724,7 +724,7 @@ U_BOOT_DRIVER(mtk_clk_infracfg) = {
.id = UCLASS_CLK,
.of_match = mt7629_infracfg_compat,
.probe = mt7629_infracfg_probe,
- .priv_auto_alloc_size = sizeof(struct mtk_cg_priv),
+ .priv_auto = sizeof(struct mtk_cg_priv),
.ops = &mtk_clk_gate_ops,
.flags = DM_FLAG_PRE_RELOC,
};
@@ -734,7 +734,7 @@ U_BOOT_DRIVER(mtk_clk_pericfg) = {
.id = UCLASS_CLK,
.of_match = mt7629_pericfg_compat,
.probe = mt7629_pericfg_probe,
- .priv_auto_alloc_size = sizeof(struct mtk_cg_priv),
+ .priv_auto = sizeof(struct mtk_cg_priv),
.ops = &mtk_clk_gate_ops,
.flags = DM_FLAG_PRE_RELOC,
};
@@ -745,7 +745,7 @@ U_BOOT_DRIVER(mtk_clk_ethsys) = {
.of_match = mt7629_ethsys_compat,
.probe = mt7629_ethsys_probe,
.bind = mt7629_ethsys_bind,
- .priv_auto_alloc_size = sizeof(struct mtk_cg_priv),
+ .priv_auto = sizeof(struct mtk_cg_priv),
.ops = &mtk_clk_gate_ops,
};
@@ -754,7 +754,7 @@ U_BOOT_DRIVER(mtk_clk_sgmiisys) = {
.id = UCLASS_CLK,
.of_match = mt7629_sgmiisys_compat,
.probe = mt7629_sgmiisys_probe,
- .priv_auto_alloc_size = sizeof(struct mtk_cg_priv),
+ .priv_auto = sizeof(struct mtk_cg_priv),
.ops = &mtk_clk_gate_ops,
};
@@ -763,6 +763,6 @@ U_BOOT_DRIVER(mtk_clk_ssusbsys) = {
.id = UCLASS_CLK,
.of_match = mt7629_ssusbsys_compat,
.probe = mt7629_ssusbsys_probe,
- .priv_auto_alloc_size = sizeof(struct mtk_cg_priv),
+ .priv_auto = sizeof(struct mtk_cg_priv),
.ops = &mtk_clk_gate_ops,
};
diff --git a/drivers/clk/mediatek/clk-mt8512.c b/drivers/clk/mediatek/clk-mt8512.c
index ad254d1cce..193e069cb0 100644
--- a/drivers/clk/mediatek/clk-mt8512.c
+++ b/drivers/clk/mediatek/clk-mt8512.c
@@ -838,7 +838,7 @@ U_BOOT_DRIVER(mtk_clk_apmixedsys) = {
.id = UCLASS_CLK,
.of_match = mt8512_apmixed_compat,
.probe = mt8512_apmixedsys_probe,
- .priv_auto_alloc_size = sizeof(struct mtk_clk_priv),
+ .priv_auto = sizeof(struct mtk_clk_priv),
.ops = &mtk_clk_apmixedsys_ops,
.flags = DM_FLAG_PRE_RELOC,
};
@@ -848,7 +848,7 @@ U_BOOT_DRIVER(mtk_clk_topckgen) = {
.id = UCLASS_CLK,
.of_match = mt8512_topckgen_compat,
.probe = mt8512_topckgen_probe,
- .priv_auto_alloc_size = sizeof(struct mtk_clk_priv),
+ .priv_auto = sizeof(struct mtk_clk_priv),
.ops = &mtk_clk_topckgen_ops,
.flags = DM_FLAG_PRE_RELOC,
};
@@ -858,7 +858,7 @@ U_BOOT_DRIVER(mtk_clk_topckgen_cg) = {
.id = UCLASS_CLK,
.of_match = mt8512_topckgen_cg_compat,
.probe = mt8512_topckgen_cg_probe,
- .priv_auto_alloc_size = sizeof(struct mtk_cg_priv),
+ .priv_auto = sizeof(struct mtk_cg_priv),
.ops = &mtk_clk_gate_ops,
.flags = DM_FLAG_PRE_RELOC,
};
@@ -868,7 +868,7 @@ U_BOOT_DRIVER(mtk_clk_infracfg) = {
.id = UCLASS_CLK,
.of_match = mt8512_infracfg_compat,
.probe = mt8512_infracfg_probe,
- .priv_auto_alloc_size = sizeof(struct mtk_cg_priv),
+ .priv_auto = sizeof(struct mtk_cg_priv),
.ops = &mtk_clk_gate_ops,
.flags = DM_FLAG_PRE_RELOC,
};
diff --git a/drivers/clk/mediatek/clk-mt8516.c b/drivers/clk/mediatek/clk-mt8516.c
index cd1db25783..29f70620e0 100644
--- a/drivers/clk/mediatek/clk-mt8516.c
+++ b/drivers/clk/mediatek/clk-mt8516.c
@@ -777,7 +777,7 @@ U_BOOT_DRIVER(mtk_clk_apmixedsys) = {
.id = UCLASS_CLK,
.of_match = mt8516_apmixed_compat,
.probe = mt8516_apmixedsys_probe,
- .priv_auto_alloc_size = sizeof(struct mtk_clk_priv),
+ .priv_auto = sizeof(struct mtk_clk_priv),
.ops = &mtk_clk_apmixedsys_ops,
.flags = DM_FLAG_PRE_RELOC,
};
@@ -787,7 +787,7 @@ U_BOOT_DRIVER(mtk_clk_topckgen) = {
.id = UCLASS_CLK,
.of_match = mt8516_topckgen_compat,
.probe = mt8516_topckgen_probe,
- .priv_auto_alloc_size = sizeof(struct mtk_clk_priv),
+ .priv_auto = sizeof(struct mtk_clk_priv),
.ops = &mtk_clk_topckgen_ops,
.flags = DM_FLAG_PRE_RELOC,
};
@@ -797,7 +797,7 @@ U_BOOT_DRIVER(mtk_clk_topckgen_cg) = {
.id = UCLASS_CLK,
.of_match = mt8516_topckgen_cg_compat,
.probe = mt8516_topckgen_cg_probe,
- .priv_auto_alloc_size = sizeof(struct mtk_cg_priv),
+ .priv_auto = sizeof(struct mtk_cg_priv),
.ops = &mtk_clk_gate_ops,
.flags = DM_FLAG_PRE_RELOC,
};
diff --git a/drivers/clk/mediatek/clk-mt8518.c b/drivers/clk/mediatek/clk-mt8518.c
index 985a0c1de5..2386514837 100644
--- a/drivers/clk/mediatek/clk-mt8518.c
+++ b/drivers/clk/mediatek/clk-mt8518.c
@@ -1533,7 +1533,7 @@ U_BOOT_DRIVER(mtk_clk_apmixedsys) = {
.id = UCLASS_CLK,
.of_match = mt8518_apmixed_compat,
.probe = mt8518_apmixedsys_probe,
- .priv_auto_alloc_size = sizeof(struct mtk_clk_priv),
+ .priv_auto = sizeof(struct mtk_clk_priv),
.ops = &mtk_clk_apmixedsys_ops,
.flags = DM_FLAG_PRE_RELOC,
};
@@ -1543,7 +1543,7 @@ U_BOOT_DRIVER(mtk_clk_topckgen) = {
.id = UCLASS_CLK,
.of_match = mt8518_topckgen_compat,
.probe = mt8518_topckgen_probe,
- .priv_auto_alloc_size = sizeof(struct mtk_clk_priv),
+ .priv_auto = sizeof(struct mtk_clk_priv),
.ops = &mtk_clk_topckgen_ops,
.flags = DM_FLAG_PRE_RELOC,
};
@@ -1553,7 +1553,7 @@ U_BOOT_DRIVER(mtk_clk_topckgen_cg) = {
.id = UCLASS_CLK,
.of_match = mt8518_topckgen_cg_compat,
.probe = mt8518_topckgen_cg_probe,
- .priv_auto_alloc_size = sizeof(struct mtk_cg_priv),
+ .priv_auto = sizeof(struct mtk_cg_priv),
.ops = &mtk_clk_gate_ops,
.flags = DM_FLAG_PRE_RELOC,
};
diff --git a/drivers/clk/mediatek/clk-mtk.c b/drivers/clk/mediatek/clk-mtk.c
index 388471b03a..d43b8a0648 100644
--- a/drivers/clk/mediatek/clk-mtk.c
+++ b/drivers/clk/mediatek/clk-mtk.c
@@ -296,7 +296,7 @@ static ulong mtk_topckgen_get_factor_rate(struct clk *clk, u32 off)
switch (fdiv->flags & CLK_PARENT_MASK) {
case CLK_PARENT_APMIXED:
rate = mtk_clk_find_parent_rate(clk, fdiv->parent,
- DM_GET_DRIVER(mtk_clk_apmixedsys));
+ DM_DRIVER_GET(mtk_clk_apmixedsys));
break;
case CLK_PARENT_TOPCKGEN:
rate = mtk_clk_find_parent_rate(clk, fdiv->parent, NULL);
@@ -474,11 +474,11 @@ static ulong mtk_clk_gate_get_rate(struct clk *clk)
switch (gate->flags & CLK_PARENT_MASK) {
case CLK_PARENT_APMIXED:
return mtk_clk_find_parent_rate(clk, gate->parent,
- DM_GET_DRIVER(mtk_clk_apmixedsys));
+ DM_DRIVER_GET(mtk_clk_apmixedsys));
break;
case CLK_PARENT_TOPCKGEN:
return mtk_clk_find_parent_rate(clk, gate->parent,
- DM_GET_DRIVER(mtk_clk_topckgen));
+ DM_DRIVER_GET(mtk_clk_topckgen));
break;
default:
diff --git a/drivers/clk/meson/axg.c b/drivers/clk/meson/axg.c
index 6ef8b418d7..d6da59d269 100644
--- a/drivers/clk/meson/axg.c
+++ b/drivers/clk/meson/axg.c
@@ -289,7 +289,7 @@ static int meson_clk_probe(struct udevice *dev)
{
struct meson_clk *priv = dev_get_priv(dev);
- priv->map = syscon_node_to_regmap(dev_get_parent(dev)->node);
+ priv->map = syscon_node_to_regmap(dev_ofnode(dev_get_parent(dev)));
if (IS_ERR(priv->map))
return PTR_ERR(priv->map);
@@ -320,7 +320,7 @@ U_BOOT_DRIVER(meson_clk_axg) = {
.name = "meson_clk_axg",
.id = UCLASS_CLK,
.of_match = meson_clk_ids,
- .priv_auto_alloc_size = sizeof(struct meson_clk),
+ .priv_auto = sizeof(struct meson_clk),
.ops = &meson_clk_ops,
.probe = meson_clk_probe,
};
diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c
index bf2f357435..5058db1a47 100644
--- a/drivers/clk/meson/g12a.c
+++ b/drivers/clk/meson/g12a.c
@@ -979,7 +979,7 @@ static int meson_clk_probe(struct udevice *dev)
{
struct meson_clk *priv = dev_get_priv(dev);
- priv->map = syscon_node_to_regmap(dev_get_parent(dev)->node);
+ priv->map = syscon_node_to_regmap(dev_ofnode(dev_get_parent(dev)));
if (IS_ERR(priv->map))
return PTR_ERR(priv->map);
@@ -1014,7 +1014,7 @@ U_BOOT_DRIVER(meson_clk_g12a) = {
.name = "meson_clk_g12a",
.id = UCLASS_CLK,
.of_match = meson_clk_ids,
- .priv_auto_alloc_size = sizeof(struct meson_clk),
+ .priv_auto = sizeof(struct meson_clk),
.ops = &meson_clk_ops,
.probe = meson_clk_probe,
};
diff --git a/drivers/clk/meson/gxbb.c b/drivers/clk/meson/gxbb.c
index b9353c053e..e379540dee 100644
--- a/drivers/clk/meson/gxbb.c
+++ b/drivers/clk/meson/gxbb.c
@@ -885,7 +885,7 @@ static int meson_clk_probe(struct udevice *dev)
{
struct meson_clk *priv = dev_get_priv(dev);
- priv->map = syscon_node_to_regmap(dev_get_parent(dev)->node);
+ priv->map = syscon_node_to_regmap(dev_ofnode(dev_get_parent(dev)));
if (IS_ERR(priv->map))
return PTR_ERR(priv->map);
@@ -919,7 +919,7 @@ U_BOOT_DRIVER(meson_clk) = {
.name = "meson_clk",
.id = UCLASS_CLK,
.of_match = meson_clk_ids,
- .priv_auto_alloc_size = sizeof(struct meson_clk),
+ .priv_auto = sizeof(struct meson_clk),
.ops = &meson_clk_ops,
.probe = meson_clk_probe,
};
diff --git a/drivers/clk/mpc83xx_clk.c b/drivers/clk/mpc83xx_clk.c
index 8d96ec767a..c5ced1f132 100644
--- a/drivers/clk/mpc83xx_clk.c
+++ b/drivers/clk/mpc83xx_clk.c
@@ -389,7 +389,7 @@ U_BOOT_DRIVER(mpc83xx_clk) = {
.of_match = mpc83xx_clk_match,
.ops = &mpc83xx_clk_ops,
.probe = mpc83xx_clk_probe,
- .priv_auto_alloc_size = sizeof(struct mpc83xx_clk_priv),
+ .priv_auto = sizeof(struct mpc83xx_clk_priv),
.bind = mpc83xx_clk_bind,
};
diff --git a/drivers/clk/mtmips/clk-mt7628.c b/drivers/clk/mtmips/clk-mt7628.c
index 35780de8c4..4d3ac847d1 100644
--- a/drivers/clk/mtmips/clk-mt7628.c
+++ b/drivers/clk/mtmips/clk-mt7628.c
@@ -153,6 +153,6 @@ U_BOOT_DRIVER(mt7628_clk) = {
.id = UCLASS_CLK,
.of_match = mt7628_clk_ids,
.probe = mt7628_clk_probe,
- .priv_auto_alloc_size = sizeof(struct mt7628_clk_priv),
+ .priv_auto = sizeof(struct mt7628_clk_priv),
.ops = &mt7628_clk_ops,
};
diff --git a/drivers/clk/mvebu/armada-37xx-periph.c b/drivers/clk/mvebu/armada-37xx-periph.c
index 223da22c1b..0132fcb7e6 100644
--- a/drivers/clk/mvebu/armada-37xx-periph.c
+++ b/drivers/clk/mvebu/armada-37xx-periph.c
@@ -624,6 +624,6 @@ U_BOOT_DRIVER(armada_37xx_periph_clk) = {
.id = UCLASS_CLK,
.of_match = armada_37xx_periph_clk_ids,
.ops = &armada_37xx_periph_clk_ops,
- .priv_auto_alloc_size = sizeof(struct a37xx_periphclk),
+ .priv_auto = sizeof(struct a37xx_periphclk),
.probe = armada_37xx_periph_clk_probe,
};
diff --git a/drivers/clk/mvebu/armada-37xx-tbg.c b/drivers/clk/mvebu/armada-37xx-tbg.c
index 233926e9b6..b1c0852e89 100644
--- a/drivers/clk/mvebu/armada-37xx-tbg.c
+++ b/drivers/clk/mvebu/armada-37xx-tbg.c
@@ -150,6 +150,6 @@ U_BOOT_DRIVER(armada_37xx_tbg_clk) = {
.id = UCLASS_CLK,
.of_match = armada_37xx_tbg_clk_ids,
.ops = &armada_37xx_tbg_clk_ops,
- .priv_auto_alloc_size = sizeof(struct a37xx_tbgclk),
+ .priv_auto = sizeof(struct a37xx_tbgclk),
.probe = armada_37xx_tbg_clk_probe,
};
diff --git a/drivers/clk/owl/clk_owl.c b/drivers/clk/owl/clk_owl.c
index 1999c87a33..96ab7fed1f 100644
--- a/drivers/clk/owl/clk_owl.c
+++ b/drivers/clk/owl/clk_owl.c
@@ -161,6 +161,6 @@ U_BOOT_DRIVER(clk_owl) = {
.id = UCLASS_CLK,
.of_match = owl_clk_ids,
.ops = &owl_clk_ops,
- .priv_auto_alloc_size = sizeof(struct owl_clk_priv),
+ .priv_auto = sizeof(struct owl_clk_priv),
.probe = owl_clk_probe,
};
diff --git a/drivers/clk/renesas/r8a774a1-cpg-mssr.c b/drivers/clk/renesas/r8a774a1-cpg-mssr.c
index 6997054b30..1c54eca6c0 100644
--- a/drivers/clk/renesas/r8a774a1-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a774a1-cpg-mssr.c
@@ -336,7 +336,7 @@ U_BOOT_DRIVER(clk_r8a774a1) = {
.name = "clk_r8a774a1",
.id = UCLASS_CLK,
.of_match = r8a774a1_clk_ids,
- .priv_auto_alloc_size = sizeof(struct gen3_clk_priv),
+ .priv_auto = sizeof(struct gen3_clk_priv),
.ops = &gen3_clk_ops,
.probe = gen3_clk_probe,
.remove = gen3_clk_remove,
diff --git a/drivers/clk/renesas/r8a774b1-cpg-mssr.c b/drivers/clk/renesas/r8a774b1-cpg-mssr.c
index 7b6947b5b9..03851d0b5a 100644
--- a/drivers/clk/renesas/r8a774b1-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a774b1-cpg-mssr.c
@@ -329,7 +329,7 @@ U_BOOT_DRIVER(clk_r8a774b1) = {
.name = "clk_r8a774b1",
.id = UCLASS_CLK,
.of_match = r8a774b1_clk_ids,
- .priv_auto_alloc_size = sizeof(struct gen3_clk_priv),
+ .priv_auto = sizeof(struct gen3_clk_priv),
.ops = &gen3_clk_ops,
.probe = gen3_clk_probe,
.remove = gen3_clk_remove,
diff --git a/drivers/clk/renesas/r8a774c0-cpg-mssr.c b/drivers/clk/renesas/r8a774c0-cpg-mssr.c
index c9f0f7221d..37a7123f73 100644
--- a/drivers/clk/renesas/r8a774c0-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a774c0-cpg-mssr.c
@@ -301,7 +301,7 @@ U_BOOT_DRIVER(clk_r8a774c0) = {
.name = "clk_r8a774c0",
.id = UCLASS_CLK,
.of_match = r8a774c0_clk_ids,
- .priv_auto_alloc_size = sizeof(struct gen3_clk_priv),
+ .priv_auto = sizeof(struct gen3_clk_priv),
.ops = &gen3_clk_ops,
.probe = gen3_clk_probe,
.remove = gen3_clk_remove,
diff --git a/drivers/clk/renesas/r8a774e1-cpg-mssr.c b/drivers/clk/renesas/r8a774e1-cpg-mssr.c
index 6cce007aa1..c969ec6888 100644
--- a/drivers/clk/renesas/r8a774e1-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a774e1-cpg-mssr.c
@@ -351,7 +351,7 @@ U_BOOT_DRIVER(clk_r8a774e1) = {
.name = "clk_r8a774e1",
.id = UCLASS_CLK,
.of_match = r8a774e1_clk_ids,
- .priv_auto_alloc_size = sizeof(struct gen3_clk_priv),
+ .priv_auto = sizeof(struct gen3_clk_priv),
.ops = &gen3_clk_ops,
.probe = gen3_clk_probe,
.remove = gen3_clk_remove,
diff --git a/drivers/clk/renesas/r8a7790-cpg-mssr.c b/drivers/clk/renesas/r8a7790-cpg-mssr.c
index 7451f53ba3..09e7dbd3a3 100644
--- a/drivers/clk/renesas/r8a7790-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7790-cpg-mssr.c
@@ -283,7 +283,7 @@ U_BOOT_DRIVER(clk_r8a7790) = {
.name = "clk_r8a7790",
.id = UCLASS_CLK,
.of_match = r8a7790_clk_ids,
- .priv_auto_alloc_size = sizeof(struct gen2_clk_priv),
+ .priv_auto = sizeof(struct gen2_clk_priv),
.ops = &gen2_clk_ops,
.probe = gen2_clk_probe,
.remove = gen2_clk_remove,
diff --git a/drivers/clk/renesas/r8a7791-cpg-mssr.c b/drivers/clk/renesas/r8a7791-cpg-mssr.c
index 25fd489609..675ac83a61 100644
--- a/drivers/clk/renesas/r8a7791-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7791-cpg-mssr.c
@@ -289,7 +289,7 @@ U_BOOT_DRIVER(clk_r8a7791) = {
.name = "clk_r8a7791",
.id = UCLASS_CLK,
.of_match = r8a7791_clk_ids,
- .priv_auto_alloc_size = sizeof(struct gen2_clk_priv),
+ .priv_auto = sizeof(struct gen2_clk_priv),
.ops = &gen2_clk_ops,
.probe = gen2_clk_probe,
.remove = gen2_clk_remove,
diff --git a/drivers/clk/renesas/r8a7792-cpg-mssr.c b/drivers/clk/renesas/r8a7792-cpg-mssr.c
index d47ab99e88..d2225a3ff5 100644
--- a/drivers/clk/renesas/r8a7792-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7792-cpg-mssr.c
@@ -235,7 +235,7 @@ U_BOOT_DRIVER(clk_r8a7792) = {
.name = "clk_r8a7792",
.id = UCLASS_CLK,
.of_match = r8a7792_clk_ids,
- .priv_auto_alloc_size = sizeof(struct gen2_clk_priv),
+ .priv_auto = sizeof(struct gen2_clk_priv),
.ops = &gen2_clk_ops,
.probe = gen2_clk_probe,
.remove = gen2_clk_remove,
diff --git a/drivers/clk/renesas/r8a7794-cpg-mssr.c b/drivers/clk/renesas/r8a7794-cpg-mssr.c
index 7093e0d42c..1fcac9b59d 100644
--- a/drivers/clk/renesas/r8a7794-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7794-cpg-mssr.c
@@ -264,7 +264,7 @@ U_BOOT_DRIVER(clk_r8a7794) = {
.name = "clk_r8a7794",
.id = UCLASS_CLK,
.of_match = r8a7794_clk_ids,
- .priv_auto_alloc_size = sizeof(struct gen2_clk_priv),
+ .priv_auto = sizeof(struct gen2_clk_priv),
.ops = &gen2_clk_ops,
.probe = gen2_clk_probe,
.remove = gen2_clk_remove,
diff --git a/drivers/clk/renesas/r8a7795-cpg-mssr.c b/drivers/clk/renesas/r8a7795-cpg-mssr.c
index dcd96ad017..101f6583fa 100644
--- a/drivers/clk/renesas/r8a7795-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7795-cpg-mssr.c
@@ -373,7 +373,7 @@ U_BOOT_DRIVER(clk_r8a7795) = {
.name = "clk_r8a7795",
.id = UCLASS_CLK,
.of_match = r8a7795_clk_ids,
- .priv_auto_alloc_size = sizeof(struct gen3_clk_priv),
+ .priv_auto = sizeof(struct gen3_clk_priv),
.ops = &gen3_clk_ops,
.probe = gen3_clk_probe,
.remove = gen3_clk_remove,
diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c b/drivers/clk/renesas/r8a7796-cpg-mssr.c
index 89dc141239..3c17bcbb18 100644
--- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
@@ -351,7 +351,7 @@ U_BOOT_DRIVER(clk_r8a7796) = {
.name = "clk_r8a7796",
.id = UCLASS_CLK,
.of_match = r8a7796_clk_ids,
- .priv_auto_alloc_size = sizeof(struct gen3_clk_priv),
+ .priv_auto = sizeof(struct gen3_clk_priv),
.ops = &gen3_clk_ops,
.probe = gen3_clk_probe,
.remove = gen3_clk_remove,
diff --git a/drivers/clk/renesas/r8a77965-cpg-mssr.c b/drivers/clk/renesas/r8a77965-cpg-mssr.c
index 6ed88295c9..5f37f6285f 100644
--- a/drivers/clk/renesas/r8a77965-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a77965-cpg-mssr.c
@@ -349,7 +349,7 @@ U_BOOT_DRIVER(clk_r8a77965) = {
.name = "clk_r8a77965",
.id = UCLASS_CLK,
.of_match = r8a77965_clk_ids,
- .priv_auto_alloc_size = sizeof(struct gen3_clk_priv),
+ .priv_auto = sizeof(struct gen3_clk_priv),
.ops = &gen3_clk_ops,
.probe = gen3_clk_probe,
.remove = gen3_clk_remove,
diff --git a/drivers/clk/renesas/r8a77970-cpg-mssr.c b/drivers/clk/renesas/r8a77970-cpg-mssr.c
index df07120171..bafe4bbb09 100644
--- a/drivers/clk/renesas/r8a77970-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a77970-cpg-mssr.c
@@ -226,7 +226,7 @@ U_BOOT_DRIVER(clk_r8a77970) = {
.name = "clk_r8a77970",
.id = UCLASS_CLK,
.of_match = r8a77970_clk_ids,
- .priv_auto_alloc_size = sizeof(struct gen3_clk_priv),
+ .priv_auto = sizeof(struct gen3_clk_priv),
.ops = &gen3_clk_ops,
.probe = gen3_clk_probe,
.remove = gen3_clk_remove,
diff --git a/drivers/clk/renesas/r8a77980-cpg-mssr.c b/drivers/clk/renesas/r8a77980-cpg-mssr.c
index c8d7a9469b..a202005121 100644
--- a/drivers/clk/renesas/r8a77980-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a77980-cpg-mssr.c
@@ -249,7 +249,7 @@ U_BOOT_DRIVER(clk_r8a77980) = {
.name = "clk_r8a77980",
.id = UCLASS_CLK,
.of_match = r8a77980_clk_ids,
- .priv_auto_alloc_size = sizeof(struct gen3_clk_priv),
+ .priv_auto = sizeof(struct gen3_clk_priv),
.ops = &gen3_clk_ops,
.probe = gen3_clk_probe,
.remove = gen3_clk_remove,
diff --git a/drivers/clk/renesas/r8a77990-cpg-mssr.c b/drivers/clk/renesas/r8a77990-cpg-mssr.c
index 357e7b534d..5cc9270869 100644
--- a/drivers/clk/renesas/r8a77990-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a77990-cpg-mssr.c
@@ -308,7 +308,7 @@ U_BOOT_DRIVER(clk_r8a77990) = {
.name = "clk_r8a77990",
.id = UCLASS_CLK,
.of_match = r8a77990_clk_ids,
- .priv_auto_alloc_size = sizeof(struct gen3_clk_priv),
+ .priv_auto = sizeof(struct gen3_clk_priv),
.ops = &gen3_clk_ops,
.probe = gen3_clk_probe,
.remove = gen3_clk_remove,
diff --git a/drivers/clk/renesas/r8a77995-cpg-mssr.c b/drivers/clk/renesas/r8a77995-cpg-mssr.c
index d62aeba635..eef154bc82 100644
--- a/drivers/clk/renesas/r8a77995-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a77995-cpg-mssr.c
@@ -247,7 +247,7 @@ U_BOOT_DRIVER(clk_r8a77995) = {
.name = "clk_r8a77995",
.id = UCLASS_CLK,
.of_match = r8a77995_clk_ids,
- .priv_auto_alloc_size = sizeof(struct gen3_clk_priv),
+ .priv_auto = sizeof(struct gen3_clk_priv),
.ops = &gen3_clk_ops,
.probe = gen3_clk_probe,
.remove = gen3_clk_remove,
diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index 71916dbf3b..a2a5939d4b 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -15,6 +15,7 @@
#include <asm/arch-rockchip/cru_px30.h>
#include <asm/arch-rockchip/hardware.h>
#include <asm/io.h>
+#include <dm/device-internal.h>
#include <dm/lists.h>
#include <dt-bindings/clock/px30-cru.h>
#include <linux/bitops.h>
@@ -1432,7 +1433,7 @@ static int px30_clk_probe(struct udevice *dev)
return 0;
}
-static int px30_clk_ofdata_to_platdata(struct udevice *dev)
+static int px30_clk_of_to_plat(struct udevice *dev)
{
struct px30_clk_priv *priv = dev_get_priv(dev);
@@ -1458,7 +1459,7 @@ static int px30_clk_bind(struct udevice *dev)
glb_srst_fst);
priv->glb_srst_snd_value = offsetof(struct px30_cru,
glb_srst_snd);
- sys_child->priv = priv;
+ dev_set_priv(sys_child, priv);
}
#if CONFIG_IS_ENABLED(RESET_ROCKCHIP)
@@ -1480,8 +1481,8 @@ U_BOOT_DRIVER(rockchip_px30_cru) = {
.name = "rockchip_px30_cru",
.id = UCLASS_CLK,
.of_match = px30_clk_ids,
- .priv_auto_alloc_size = sizeof(struct px30_clk_priv),
- .ofdata_to_platdata = px30_clk_ofdata_to_platdata,
+ .priv_auto = sizeof(struct px30_clk_priv),
+ .of_to_plat = px30_clk_of_to_plat,
.ops = &px30_clk_ops,
.bind = px30_clk_bind,
.probe = px30_clk_probe,
@@ -1609,7 +1610,7 @@ static int px30_pmuclk_probe(struct udevice *dev)
return 0;
}
-static int px30_pmuclk_ofdata_to_platdata(struct udevice *dev)
+static int px30_pmuclk_of_to_plat(struct udevice *dev)
{
struct px30_pmuclk_priv *priv = dev_get_priv(dev);
@@ -1627,8 +1628,8 @@ U_BOOT_DRIVER(rockchip_px30_pmucru) = {
.name = "rockchip_px30_pmucru",
.id = UCLASS_CLK,
.of_match = px30_pmuclk_ids,
- .priv_auto_alloc_size = sizeof(struct px30_pmuclk_priv),
- .ofdata_to_platdata = px30_pmuclk_ofdata_to_platdata,
+ .priv_auto = sizeof(struct px30_pmuclk_priv),
+ .of_to_plat = px30_pmuclk_of_to_plat,
.ops = &px30_pmuclk_ops,
.probe = px30_pmuclk_probe,
};
diff --git a/drivers/clk/rockchip/clk_rk3036.c b/drivers/clk/rockchip/clk_rk3036.c
index 274572f70c..026858459e 100644
--- a/drivers/clk/rockchip/clk_rk3036.c
+++ b/drivers/clk/rockchip/clk_rk3036.c
@@ -14,6 +14,7 @@
#include <asm/arch-rockchip/clock.h>
#include <asm/arch-rockchip/cru_rk3036.h>
#include <asm/arch-rockchip/hardware.h>
+#include <dm/device-internal.h>
#include <dm/lists.h>
#include <dt-bindings/clock/rk3036-cru.h>
#include <linux/delay.h>
@@ -318,7 +319,7 @@ static struct clk_ops rk3036_clk_ops = {
.set_rate = rk3036_clk_set_rate,
};
-static int rk3036_clk_ofdata_to_platdata(struct udevice *dev)
+static int rk3036_clk_of_to_plat(struct udevice *dev)
{
struct rk3036_clk_priv *priv = dev_get_priv(dev);
@@ -353,7 +354,7 @@ static int rk3036_clk_bind(struct udevice *dev)
cru_glb_srst_fst_value);
priv->glb_srst_snd_value = offsetof(struct rk3036_cru,
cru_glb_srst_snd_value);
- sys_child->priv = priv;
+ dev_set_priv(sys_child, priv);
}
#if CONFIG_IS_ENABLED(RESET_ROCKCHIP)
@@ -375,8 +376,8 @@ U_BOOT_DRIVER(rockchip_rk3036_cru) = {
.name = "clk_rk3036",
.id = UCLASS_CLK,
.of_match = rk3036_clk_ids,
- .priv_auto_alloc_size = sizeof(struct rk3036_clk_priv),
- .ofdata_to_platdata = rk3036_clk_ofdata_to_platdata,
+ .priv_auto = sizeof(struct rk3036_clk_priv),
+ .of_to_plat = rk3036_clk_of_to_plat,
.ops = &rk3036_clk_ops,
.bind = rk3036_clk_bind,
.probe = rk3036_clk_probe,
diff --git a/drivers/clk/rockchip/clk_rk3128.c b/drivers/clk/rockchip/clk_rk3128.c
index 61f823e254..d5b2b63dd7 100644
--- a/drivers/clk/rockchip/clk_rk3128.c
+++ b/drivers/clk/rockchip/clk_rk3128.c
@@ -15,6 +15,7 @@
#include <asm/arch-rockchip/cru_rk3128.h>
#include <asm/arch-rockchip/hardware.h>
#include <bitfield.h>
+#include <dm/device-internal.h>
#include <dm/lists.h>
#include <dt-bindings/clock/rk3128-cru.h>
#include <linux/delay.h>
@@ -546,7 +547,7 @@ static struct clk_ops rk3128_clk_ops = {
.set_rate = rk3128_clk_set_rate,
};
-static int rk3128_clk_ofdata_to_platdata(struct udevice *dev)
+static int rk3128_clk_of_to_plat(struct udevice *dev)
{
struct rk3128_clk_priv *priv = dev_get_priv(dev);
@@ -581,7 +582,7 @@ static int rk3128_clk_bind(struct udevice *dev)
cru_glb_srst_fst_value);
priv->glb_srst_snd_value = offsetof(struct rk3128_cru,
cru_glb_srst_snd_value);
- sys_child->priv = priv;
+ dev_set_priv(sys_child, priv);
}
return 0;
@@ -597,8 +598,8 @@ U_BOOT_DRIVER(rockchip_rk3128_cru) = {
.name = "clk_rk3128",
.id = UCLASS_CLK,
.of_match = rk3128_clk_ids,
- .priv_auto_alloc_size = sizeof(struct rk3128_clk_priv),
- .ofdata_to_platdata = rk3128_clk_ofdata_to_platdata,
+ .priv_auto = sizeof(struct rk3128_clk_priv),
+ .of_to_plat = rk3128_clk_of_to_plat,
.ops = &rk3128_clk_ops,
.bind = rk3128_clk_bind,
.probe = rk3128_clk_probe,
diff --git a/drivers/clk/rockchip/clk_rk3188.c b/drivers/clk/rockchip/clk_rk3188.c
index aacc8cf2d1..1b62d8d289 100644
--- a/drivers/clk/rockchip/clk_rk3188.c
+++ b/drivers/clk/rockchip/clk_rk3188.c
@@ -538,7 +538,7 @@ static struct clk_ops rk3188_clk_ops = {
.set_rate = rk3188_clk_set_rate,
};
-static int rk3188_clk_ofdata_to_platdata(struct udevice *dev)
+static int rk3188_clk_of_to_plat(struct udevice *dev)
{
#if !CONFIG_IS_ENABLED(OF_PLATDATA)
struct rk3188_clk_priv *priv = dev_get_priv(dev);
@@ -561,7 +561,7 @@ static int rk3188_clk_probe(struct udevice *dev)
#ifdef CONFIG_SPL_BUILD
#if CONFIG_IS_ENABLED(OF_PLATDATA)
- struct rk3188_clk_plat *plat = dev_get_platdata(dev);
+ struct rk3188_clk_plat *plat = dev_get_plat(dev);
priv->cru = map_sysmem(plat->dtd.reg[0], plat->dtd.reg[1]);
#endif
@@ -593,7 +593,7 @@ static int rk3188_clk_bind(struct udevice *dev)
cru_glb_srst_fst_value);
priv->glb_srst_snd_value = offsetof(struct rk3188_cru,
cru_glb_srst_snd_value);
- sys_child->priv = priv;
+ dev_set_priv(sys_child, priv);
}
#if CONFIG_IS_ENABLED(RESET_ROCKCHIP)
@@ -616,10 +616,10 @@ U_BOOT_DRIVER(rockchip_rk3188_cru) = {
.name = "rockchip_rk3188_cru",
.id = UCLASS_CLK,
.of_match = rk3188_clk_ids,
- .priv_auto_alloc_size = sizeof(struct rk3188_clk_priv),
- .platdata_auto_alloc_size = sizeof(struct rk3188_clk_plat),
+ .priv_auto = sizeof(struct rk3188_clk_priv),
+ .plat_auto = sizeof(struct rk3188_clk_plat),
.ops = &rk3188_clk_ops,
.bind = rk3188_clk_bind,
- .ofdata_to_platdata = rk3188_clk_ofdata_to_platdata,
+ .of_to_plat = rk3188_clk_of_to_plat,
.probe = rk3188_clk_probe,
};
diff --git a/drivers/clk/rockchip/clk_rk322x.c b/drivers/clk/rockchip/clk_rk322x.c
index 054b2fd349..dbef606d88 100644
--- a/drivers/clk/rockchip/clk_rk322x.c
+++ b/drivers/clk/rockchip/clk_rk322x.c
@@ -14,6 +14,7 @@
#include <asm/arch-rockchip/clock.h>
#include <asm/arch-rockchip/cru_rk322x.h>
#include <asm/arch-rockchip/hardware.h>
+#include <dm/device-internal.h>
#include <dm/lists.h>
#include <dt-bindings/clock/rk3228-cru.h>
#include <linux/bitops.h>
@@ -475,7 +476,7 @@ static struct clk_ops rk322x_clk_ops = {
.set_parent = rk322x_clk_set_parent,
};
-static int rk322x_clk_ofdata_to_platdata(struct udevice *dev)
+static int rk322x_clk_of_to_plat(struct udevice *dev)
{
struct rk322x_clk_priv *priv = dev_get_priv(dev);
@@ -510,7 +511,7 @@ static int rk322x_clk_bind(struct udevice *dev)
cru_glb_srst_fst_value);
priv->glb_srst_snd_value = offsetof(struct rk322x_cru,
cru_glb_srst_snd_value);
- sys_child->priv = priv;
+ dev_set_priv(sys_child, priv);
}
#if CONFIG_IS_ENABLED(RESET_ROCKCHIP)
@@ -532,8 +533,8 @@ U_BOOT_DRIVER(rockchip_rk322x_cru) = {
.name = "clk_rk322x",
.id = UCLASS_CLK,
.of_match = rk322x_clk_ids,
- .priv_auto_alloc_size = sizeof(struct rk322x_clk_priv),
- .ofdata_to_platdata = rk322x_clk_ofdata_to_platdata,
+ .priv_auto = sizeof(struct rk322x_clk_priv),
+ .of_to_plat = rk322x_clk_of_to_plat,
.ops = &rk322x_clk_ops,
.bind = rk322x_clk_bind,
.probe = rk322x_clk_probe,
diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c
index a1dd642eef..6226d55658 100644
--- a/drivers/clk/rockchip/clk_rk3288.c
+++ b/drivers/clk/rockchip/clk_rk3288.c
@@ -954,7 +954,7 @@ static struct clk_ops rk3288_clk_ops = {
#endif
};
-static int rk3288_clk_ofdata_to_platdata(struct udevice *dev)
+static int rk3288_clk_of_to_plat(struct udevice *dev)
{
#if !CONFIG_IS_ENABLED(OF_PLATDATA)
struct rk3288_clk_priv *priv = dev_get_priv(dev);
@@ -975,7 +975,7 @@ static int rk3288_clk_probe(struct udevice *dev)
return PTR_ERR(priv->grf);
#ifdef CONFIG_SPL_BUILD
#if CONFIG_IS_ENABLED(OF_PLATDATA)
- struct rk3288_clk_plat *plat = dev_get_platdata(dev);
+ struct rk3288_clk_plat *plat = dev_get_plat(dev);
priv->cru = map_sysmem(plat->dtd.reg[0], plat->dtd.reg[1]);
#endif
@@ -1018,7 +1018,7 @@ static int rk3288_clk_bind(struct udevice *dev)
cru_glb_srst_fst_value);
priv->glb_srst_snd_value = offsetof(struct rockchip_cru,
cru_glb_srst_snd_value);
- sys_child->priv = priv;
+ dev_set_priv(sys_child, priv);
}
#if CONFIG_IS_ENABLED(RESET_ROCKCHIP)
@@ -1040,10 +1040,10 @@ U_BOOT_DRIVER(rockchip_rk3288_cru) = {
.name = "rockchip_rk3288_cru",
.id = UCLASS_CLK,
.of_match = rk3288_clk_ids,
- .priv_auto_alloc_size = sizeof(struct rk3288_clk_priv),
- .platdata_auto_alloc_size = sizeof(struct rk3288_clk_plat),
+ .priv_auto = sizeof(struct rk3288_clk_priv),
+ .plat_auto = sizeof(struct rk3288_clk_plat),
.ops = &rk3288_clk_ops,
.bind = rk3288_clk_bind,
- .ofdata_to_platdata = rk3288_clk_ofdata_to_platdata,
+ .of_to_plat = rk3288_clk_of_to_plat,
.probe = rk3288_clk_probe,
};
diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c
index d3633b6979..a05efcfbab 100644
--- a/drivers/clk/rockchip/clk_rk3308.c
+++ b/drivers/clk/rockchip/clk_rk3308.c
@@ -15,6 +15,7 @@
#include <asm/arch/cru_rk3308.h>
#include <asm/arch-rockchip/clock.h>
#include <asm/arch-rockchip/hardware.h>
+#include <dm/device-internal.h>
#include <dm/lists.h>
#include <dt-bindings/clock/rk3308-cru.h>
#include <linux/bitops.h>
@@ -1019,7 +1020,7 @@ static int rk3308_clk_probe(struct udevice *dev)
return ret;
}
-static int rk3308_clk_ofdata_to_platdata(struct udevice *dev)
+static int rk3308_clk_of_to_plat(struct udevice *dev)
{
struct rk3308_clk_priv *priv = dev_get_priv(dev);
@@ -1045,7 +1046,7 @@ static int rk3308_clk_bind(struct udevice *dev)
glb_srst_fst);
priv->glb_srst_snd_value = offsetof(struct rk3308_cru,
glb_srst_snd);
- sys_child->priv = priv;
+ dev_set_priv(sys_child, priv);
}
#if CONFIG_IS_ENABLED(RESET_ROCKCHIP)
@@ -1067,8 +1068,8 @@ U_BOOT_DRIVER(rockchip_rk3308_cru) = {
.name = "rockchip_rk3308_cru",
.id = UCLASS_CLK,
.of_match = rk3308_clk_ids,
- .priv_auto_alloc_size = sizeof(struct rk3308_clk_priv),
- .ofdata_to_platdata = rk3308_clk_ofdata_to_platdata,
+ .priv_auto = sizeof(struct rk3308_clk_priv),
+ .of_to_plat = rk3308_clk_of_to_plat,
.ops = &rk3308_clk_ops,
.bind = rk3308_clk_bind,
.probe = rk3308_clk_probe,
diff --git a/drivers/clk/rockchip/clk_rk3328.c b/drivers/clk/rockchip/clk_rk3328.c
index bf4f1069ea..b825ff4cf8 100644
--- a/drivers/clk/rockchip/clk_rk3328.c
+++ b/drivers/clk/rockchip/clk_rk3328.c
@@ -16,6 +16,7 @@
#include <asm/arch-rockchip/hardware.h>
#include <asm/arch-rockchip/grf_rk3328.h>
#include <asm/io.h>
+#include <dm/device-internal.h>
#include <dm/lists.h>
#include <dt-bindings/clock/rk3328-cru.h>
#include <linux/bitops.h>
@@ -797,7 +798,7 @@ static int rk3328_clk_probe(struct udevice *dev)
return 0;
}
-static int rk3328_clk_ofdata_to_platdata(struct udevice *dev)
+static int rk3328_clk_of_to_plat(struct udevice *dev)
{
struct rk3328_clk_priv *priv = dev_get_priv(dev);
@@ -823,7 +824,7 @@ static int rk3328_clk_bind(struct udevice *dev)
glb_srst_fst_value);
priv->glb_srst_snd_value = offsetof(struct rk3328_cru,
glb_srst_snd_value);
- sys_child->priv = priv;
+ dev_set_priv(sys_child, priv);
}
#if CONFIG_IS_ENABLED(RESET_ROCKCHIP)
@@ -845,8 +846,8 @@ U_BOOT_DRIVER(rockchip_rk3328_cru) = {
.name = "rockchip_rk3328_cru",
.id = UCLASS_CLK,
.of_match = rk3328_clk_ids,
- .priv_auto_alloc_size = sizeof(struct rk3328_clk_priv),
- .ofdata_to_platdata = rk3328_clk_ofdata_to_platdata,
+ .priv_auto = sizeof(struct rk3328_clk_priv),
+ .of_to_plat = rk3328_clk_of_to_plat,
.ops = &rk3328_clk_ops,
.bind = rk3328_clk_bind,
.probe = rk3328_clk_probe,
diff --git a/drivers/clk/rockchip/clk_rk3368.c b/drivers/clk/rockchip/clk_rk3368.c
index d1804c6e16..780b49ccd8 100644
--- a/drivers/clk/rockchip/clk_rk3368.c
+++ b/drivers/clk/rockchip/clk_rk3368.c
@@ -19,6 +19,7 @@
#include <asm/arch-rockchip/cru_rk3368.h>
#include <asm/arch-rockchip/hardware.h>
#include <asm/io.h>
+#include <dm/device-internal.h>
#include <dm/lists.h>
#include <dt-bindings/clock/rk3368-cru.h>
#include <linux/delay.h>
@@ -582,7 +583,7 @@ static int rk3368_clk_probe(struct udevice *dev)
{
struct rk3368_clk_priv __maybe_unused *priv = dev_get_priv(dev);
#if CONFIG_IS_ENABLED(OF_PLATDATA)
- struct rk3368_clk_plat *plat = dev_get_platdata(dev);
+ struct rk3368_clk_plat *plat = dev_get_plat(dev);
priv->cru = map_sysmem(plat->dtd.reg[0], plat->dtd.reg[1]);
#endif
@@ -593,7 +594,7 @@ static int rk3368_clk_probe(struct udevice *dev)
return 0;
}
-static int rk3368_clk_ofdata_to_platdata(struct udevice *dev)
+static int rk3368_clk_of_to_plat(struct udevice *dev)
{
#if !CONFIG_IS_ENABLED(OF_PLATDATA)
struct rk3368_clk_priv *priv = dev_get_priv(dev);
@@ -621,7 +622,7 @@ static int rk3368_clk_bind(struct udevice *dev)
glb_srst_fst_val);
priv->glb_srst_snd_value = offsetof(struct rk3368_cru,
glb_srst_snd_val);
- sys_child->priv = priv;
+ dev_set_priv(sys_child, priv);
}
#if CONFIG_IS_ENABLED(RESET_ROCKCHIP)
@@ -643,11 +644,11 @@ U_BOOT_DRIVER(rockchip_rk3368_cru) = {
.name = "rockchip_rk3368_cru",
.id = UCLASS_CLK,
.of_match = rk3368_clk_ids,
- .priv_auto_alloc_size = sizeof(struct rk3368_clk_priv),
+ .priv_auto = sizeof(struct rk3368_clk_priv),
#if CONFIG_IS_ENABLED(OF_PLATDATA)
- .platdata_auto_alloc_size = sizeof(struct rk3368_clk_plat),
+ .plat_auto = sizeof(struct rk3368_clk_plat),
#endif
- .ofdata_to_platdata = rk3368_clk_ofdata_to_platdata,
+ .of_to_plat = rk3368_clk_of_to_plat,
.ops = &rk3368_clk_ops,
.bind = rk3368_clk_bind,
.probe = rk3368_clk_probe,
diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index 3fd863e7bd..55ebac7057 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -18,6 +18,7 @@
#include <asm/arch-rockchip/clock.h>
#include <asm/arch-rockchip/cru.h>
#include <asm/arch-rockchip/hardware.h>
+#include <dm/device-internal.h>
#include <dm/lists.h>
#include <dt-bindings/clock/rk3399-cru.h>
#include <linux/bitops.h>
@@ -1378,7 +1379,7 @@ static int rk3399_clk_probe(struct udevice *dev)
bool init_clocks = false;
#if CONFIG_IS_ENABLED(OF_PLATDATA)
- struct rk3399_clk_plat *plat = dev_get_platdata(dev);
+ struct rk3399_clk_plat *plat = dev_get_plat(dev);
priv->cru = map_sysmem(plat->dtd.reg[0], plat->dtd.reg[1]);
#endif
@@ -1398,7 +1399,7 @@ static int rk3399_clk_probe(struct udevice *dev)
return 0;
}
-static int rk3399_clk_ofdata_to_platdata(struct udevice *dev)
+static int rk3399_clk_of_to_plat(struct udevice *dev)
{
#if !CONFIG_IS_ENABLED(OF_PLATDATA)
struct rk3399_clk_priv *priv = dev_get_priv(dev);
@@ -1425,7 +1426,7 @@ static int rk3399_clk_bind(struct udevice *dev)
glb_srst_fst_value);
priv->glb_srst_snd_value = offsetof(struct rockchip_cru,
glb_srst_snd_value);
- sys_child->priv = priv;
+ dev_set_priv(sys_child, priv);
}
#if CONFIG_IS_ENABLED(RESET_ROCKCHIP)
@@ -1447,13 +1448,13 @@ U_BOOT_DRIVER(clk_rk3399) = {
.name = "rockchip_rk3399_cru",
.id = UCLASS_CLK,
.of_match = rk3399_clk_ids,
- .priv_auto_alloc_size = sizeof(struct rk3399_clk_priv),
- .ofdata_to_platdata = rk3399_clk_ofdata_to_platdata,
+ .priv_auto = sizeof(struct rk3399_clk_priv),
+ .of_to_plat = rk3399_clk_of_to_plat,
.ops = &rk3399_clk_ops,
.bind = rk3399_clk_bind,
.probe = rk3399_clk_probe,
#if CONFIG_IS_ENABLED(OF_PLATDATA)
- .platdata_auto_alloc_size = sizeof(struct rk3399_clk_plat),
+ .plat_auto = sizeof(struct rk3399_clk_plat),
#endif
};
@@ -1599,7 +1600,7 @@ static int rk3399_pmuclk_probe(struct udevice *dev)
#endif
#if CONFIG_IS_ENABLED(OF_PLATDATA)
- struct rk3399_pmuclk_plat *plat = dev_get_platdata(dev);
+ struct rk3399_pmuclk_plat *plat = dev_get_plat(dev);
priv->pmucru = map_sysmem(plat->dtd.reg[0], plat->dtd.reg[1]);
#endif
@@ -1610,7 +1611,7 @@ static int rk3399_pmuclk_probe(struct udevice *dev)
return 0;
}
-static int rk3399_pmuclk_ofdata_to_platdata(struct udevice *dev)
+static int rk3399_pmuclk_of_to_plat(struct udevice *dev)
{
#if !CONFIG_IS_ENABLED(OF_PLATDATA)
struct rk3399_pmuclk_priv *priv = dev_get_priv(dev);
@@ -1642,12 +1643,12 @@ U_BOOT_DRIVER(rockchip_rk3399_pmuclk) = {
.name = "rockchip_rk3399_pmucru",
.id = UCLASS_CLK,
.of_match = rk3399_pmuclk_ids,
- .priv_auto_alloc_size = sizeof(struct rk3399_pmuclk_priv),
- .ofdata_to_platdata = rk3399_pmuclk_ofdata_to_platdata,
+ .priv_auto = sizeof(struct rk3399_pmuclk_priv),
+ .of_to_plat = rk3399_pmuclk_of_to_plat,
.ops = &rk3399_pmuclk_ops,
.probe = rk3399_pmuclk_probe,
.bind = rk3399_pmuclk_bind,
#if CONFIG_IS_ENABLED(OF_PLATDATA)
- .platdata_auto_alloc_size = sizeof(struct rk3399_pmuclk_plat),
+ .plat_auto = sizeof(struct rk3399_pmuclk_plat),
#endif
};
diff --git a/drivers/clk/rockchip/clk_rv1108.c b/drivers/clk/rockchip/clk_rv1108.c
index aa1d98ca2a..1e22db0cb7 100644
--- a/drivers/clk/rockchip/clk_rv1108.c
+++ b/drivers/clk/rockchip/clk_rv1108.c
@@ -16,6 +16,7 @@
#include <asm/arch-rockchip/clock.h>
#include <asm/arch-rockchip/cru_rv1108.h>
#include <asm/arch-rockchip/hardware.h>
+#include <dm/device-internal.h>
#include <dm/lists.h>
#include <dt-bindings/clock/rv1108-cru.h>
#include <linux/delay.h>
@@ -662,7 +663,7 @@ static void rkclk_init(struct rv1108_cru *cru)
aclk_bus, aclk_peri, hclk_peri, pclk_peri);
}
-static int rv1108_clk_ofdata_to_platdata(struct udevice *dev)
+static int rv1108_clk_of_to_plat(struct udevice *dev)
{
struct rv1108_clk_priv *priv = dev_get_priv(dev);
@@ -697,7 +698,7 @@ static int rv1108_clk_bind(struct udevice *dev)
glb_srst_fst_val);
priv->glb_srst_snd_value = offsetof(struct rv1108_cru,
glb_srst_snd_val);
- sys_child->priv = priv;
+ dev_set_priv(sys_child, priv);
}
#if CONFIG_IS_ENABLED(RESET_ROCKCHIP)
@@ -719,9 +720,9 @@ U_BOOT_DRIVER(clk_rv1108) = {
.name = "clk_rv1108",
.id = UCLASS_CLK,
.of_match = rv1108_clk_ids,
- .priv_auto_alloc_size = sizeof(struct rv1108_clk_priv),
+ .priv_auto = sizeof(struct rv1108_clk_priv),
.ops = &rv1108_clk_ops,
.bind = rv1108_clk_bind,
- .ofdata_to_platdata = rv1108_clk_ofdata_to_platdata,
+ .of_to_plat = rv1108_clk_of_to_plat,
.probe = rv1108_clk_probe,
};
diff --git a/drivers/clk/sifive/fu540-prci.c b/drivers/clk/sifive/fu540-prci.c
index 1b4d81d4f0..b3882d0b77 100644
--- a/drivers/clk/sifive/fu540-prci.c
+++ b/drivers/clk/sifive/fu540-prci.c
@@ -537,7 +537,7 @@ static int __prci_consumer_reset(const char *rst_name, bool trigger)
int ret;
ret = uclass_get_device_by_driver(UCLASS_RESET,
- DM_GET_DRIVER(sifive_reset),
+ DM_DRIVER_GET(sifive_reset),
&dev);
if (ret) {
dev_err(dev, "Reset driver not found: %d\n", ret);
@@ -807,6 +807,6 @@ U_BOOT_DRIVER(sifive_fu540_prci) = {
.of_match = sifive_fu540_prci_ids,
.probe = sifive_fu540_prci_probe,
.ops = &sifive_fu540_prci_ops,
- .priv_auto_alloc_size = sizeof(struct __prci_data),
+ .priv_auto = sizeof(struct __prci_data),
.bind = sifive_fu540_clk_bind,
};
diff --git a/drivers/clk/sunxi/clk_a10.c b/drivers/clk/sunxi/clk_a10.c
index 67507c5ab1..1b5de86e20 100644
--- a/drivers/clk/sunxi/clk_a10.c
+++ b/drivers/clk/sunxi/clk_a10.c
@@ -79,7 +79,7 @@ U_BOOT_DRIVER(clk_sun4i_a10) = {
.name = "sun4i_a10_ccu",
.id = UCLASS_CLK,
.of_match = a10_ccu_ids,
- .priv_auto_alloc_size = sizeof(struct ccu_priv),
+ .priv_auto = sizeof(struct ccu_priv),
.ops = &sunxi_clk_ops,
.probe = sunxi_clk_probe,
.bind = a10_clk_bind,
diff --git a/drivers/clk/sunxi/clk_a10s.c b/drivers/clk/sunxi/clk_a10s.c
index d11a4b5f03..184f61ab23 100644
--- a/drivers/clk/sunxi/clk_a10s.c
+++ b/drivers/clk/sunxi/clk_a10s.c
@@ -66,7 +66,7 @@ U_BOOT_DRIVER(clk_sun5i_a10s) = {
.name = "sun5i_a10s_ccu",
.id = UCLASS_CLK,
.of_match = a10s_ccu_ids,
- .priv_auto_alloc_size = sizeof(struct ccu_priv),
+ .priv_auto = sizeof(struct ccu_priv),
.ops = &sunxi_clk_ops,
.probe = sunxi_clk_probe,
.bind = a10s_clk_bind,
diff --git a/drivers/clk/sunxi/clk_a23.c b/drivers/clk/sunxi/clk_a23.c
index 4d562bfe42..5750514a74 100644
--- a/drivers/clk/sunxi/clk_a23.c
+++ b/drivers/clk/sunxi/clk_a23.c
@@ -82,7 +82,7 @@ U_BOOT_DRIVER(clk_sun8i_a23) = {
.name = "sun8i_a23_ccu",
.id = UCLASS_CLK,
.of_match = a23_clk_ids,
- .priv_auto_alloc_size = sizeof(struct ccu_priv),
+ .priv_auto = sizeof(struct ccu_priv),
.ops = &sunxi_clk_ops,
.probe = sunxi_clk_probe,
.bind = a23_clk_bind,
diff --git a/drivers/clk/sunxi/clk_a31.c b/drivers/clk/sunxi/clk_a31.c
index 4a9454eebe..9226112f4a 100644
--- a/drivers/clk/sunxi/clk_a31.c
+++ b/drivers/clk/sunxi/clk_a31.c
@@ -99,7 +99,7 @@ U_BOOT_DRIVER(clk_sun6i_a31) = {
.name = "sun6i_a31_ccu",
.id = UCLASS_CLK,
.of_match = a31_clk_ids,
- .priv_auto_alloc_size = sizeof(struct ccu_priv),
+ .priv_auto = sizeof(struct ccu_priv),
.ops = &sunxi_clk_ops,
.probe = sunxi_clk_probe,
.bind = a31_clk_bind,
diff --git a/drivers/clk/sunxi/clk_a64.c b/drivers/clk/sunxi/clk_a64.c
index d96cb1aac1..0553ffa439 100644
--- a/drivers/clk/sunxi/clk_a64.c
+++ b/drivers/clk/sunxi/clk_a64.c
@@ -87,7 +87,7 @@ U_BOOT_DRIVER(clk_sun50i_a64) = {
.name = "sun50i_a64_ccu",
.id = UCLASS_CLK,
.of_match = a64_ccu_ids,
- .priv_auto_alloc_size = sizeof(struct ccu_priv),
+ .priv_auto = sizeof(struct ccu_priv),
.ops = &sunxi_clk_ops,
.probe = sunxi_clk_probe,
.bind = a64_clk_bind,
diff --git a/drivers/clk/sunxi/clk_a80.c b/drivers/clk/sunxi/clk_a80.c
index 80d7407037..68973d528e 100644
--- a/drivers/clk/sunxi/clk_a80.c
+++ b/drivers/clk/sunxi/clk_a80.c
@@ -94,7 +94,7 @@ U_BOOT_DRIVER(clk_sun9i_a80) = {
.name = "sun9i_a80_ccu",
.id = UCLASS_CLK,
.of_match = a80_ccu_ids,
- .priv_auto_alloc_size = sizeof(struct ccu_priv),
+ .priv_auto = sizeof(struct ccu_priv),
.ops = &sunxi_clk_ops,
.probe = sunxi_clk_probe,
.bind = a80_clk_bind,
diff --git a/drivers/clk/sunxi/clk_a83t.c b/drivers/clk/sunxi/clk_a83t.c
index d6f23ddc77..880c7d7599 100644
--- a/drivers/clk/sunxi/clk_a83t.c
+++ b/drivers/clk/sunxi/clk_a83t.c
@@ -84,7 +84,7 @@ U_BOOT_DRIVER(clk_sun8i_a83t) = {
.name = "sun8i_a83t_ccu",
.id = UCLASS_CLK,
.of_match = a83t_clk_ids,
- .priv_auto_alloc_size = sizeof(struct ccu_priv),
+ .priv_auto = sizeof(struct ccu_priv),
.ops = &sunxi_clk_ops,
.probe = sunxi_clk_probe,
.bind = a83t_clk_bind,
diff --git a/drivers/clk/sunxi/clk_h3.c b/drivers/clk/sunxi/clk_h3.c
index 7e844f4ff1..f81633b92d 100644
--- a/drivers/clk/sunxi/clk_h3.c
+++ b/drivers/clk/sunxi/clk_h3.c
@@ -102,7 +102,7 @@ U_BOOT_DRIVER(clk_sun8i_h3) = {
.name = "sun8i_h3_ccu",
.id = UCLASS_CLK,
.of_match = h3_ccu_ids,
- .priv_auto_alloc_size = sizeof(struct ccu_priv),
+ .priv_auto = sizeof(struct ccu_priv),
.ops = &sunxi_clk_ops,
.probe = sunxi_clk_probe,
.bind = h3_clk_bind,
diff --git a/drivers/clk/sunxi/clk_h6.c b/drivers/clk/sunxi/clk_h6.c
index a1cb8952d3..ac8656fe89 100644
--- a/drivers/clk/sunxi/clk_h6.c
+++ b/drivers/clk/sunxi/clk_h6.c
@@ -95,7 +95,7 @@ U_BOOT_DRIVER(clk_sun50i_h6) = {
.name = "sun50i_h6_ccu",
.id = UCLASS_CLK,
.of_match = h6_ccu_ids,
- .priv_auto_alloc_size = sizeof(struct ccu_priv),
+ .priv_auto = sizeof(struct ccu_priv),
.ops = &sunxi_clk_ops,
.probe = sunxi_clk_probe,
.bind = h6_clk_bind,
diff --git a/drivers/clk/sunxi/clk_r40.c b/drivers/clk/sunxi/clk_r40.c
index ac360b2beb..ee1e86d22e 100644
--- a/drivers/clk/sunxi/clk_r40.c
+++ b/drivers/clk/sunxi/clk_r40.c
@@ -107,7 +107,7 @@ U_BOOT_DRIVER(clk_sun8i_r40) = {
.name = "sun8i_r40_ccu",
.id = UCLASS_CLK,
.of_match = r40_clk_ids,
- .priv_auto_alloc_size = sizeof(struct ccu_priv),
+ .priv_auto = sizeof(struct ccu_priv),
.ops = &sunxi_clk_ops,
.probe = sunxi_clk_probe,
.bind = r40_clk_bind,
diff --git a/drivers/clk/sunxi/clk_v3s.c b/drivers/clk/sunxi/clk_v3s.c
index f3fc06ab31..29622199fd 100644
--- a/drivers/clk/sunxi/clk_v3s.c
+++ b/drivers/clk/sunxi/clk_v3s.c
@@ -65,7 +65,7 @@ U_BOOT_DRIVER(clk_sun8i_v3s) = {
.name = "sun8i_v3s_ccu",
.id = UCLASS_CLK,
.of_match = v3s_clk_ids,
- .priv_auto_alloc_size = sizeof(struct ccu_priv),
+ .priv_auto = sizeof(struct ccu_priv),
.ops = &sunxi_clk_ops,
.probe = sunxi_clk_probe,
.bind = v3s_clk_bind,
diff --git a/drivers/clk/uniphier/clk-uniphier-core.c b/drivers/clk/uniphier/clk-uniphier-core.c
index 4e25db354e..c31e59641d 100644
--- a/drivers/clk/uniphier/clk-uniphier-core.c
+++ b/drivers/clk/uniphier/clk-uniphier-core.c
@@ -342,6 +342,6 @@ U_BOOT_DRIVER(uniphier_clk) = {
.id = UCLASS_CLK,
.of_match = uniphier_clk_match,
.probe = uniphier_clk_probe,
- .priv_auto_alloc_size = sizeof(struct uniphier_clk_priv),
+ .priv_auto = sizeof(struct uniphier_clk_priv),
.ops = &uniphier_clk_ops,
};
generated by cgit v1.2.3 (git 2.39.1) at 2025-05-28 16:19:41 +0000