diff options
Diffstat (limited to 'drivers/clk/clk_fixed_rate.c')
| -rw-r--r-- | drivers/clk/clk_fixed_rate.c | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/drivers/clk/clk_fixed_rate.c b/drivers/clk/clk_fixed_rate.c index f86b4a0e92..3c5a83c523 100644 --- a/drivers/clk/clk_fixed_rate.c +++ b/drivers/clk/clk_fixed_rate.c @@ -6,6 +6,7 @@ #include <common.h> #include <clk-uclass.h> #include <dm.h> +#include <dm/device-internal.h> #include <linux/clk-provider.h> static ulong clk_fixed_rate_get_rate(struct clk *clk) @@ -24,7 +25,7 @@ const struct clk_ops clk_fixed_rate_ops = { .enable = dummy_enable, }; -static int clk_fixed_rate_ofdata_to_platdata(struct udevice *dev) +static int clk_fixed_rate_of_to_plat(struct udevice *dev) { struct clk *clk = &to_clk_fixed_rate(dev)->clk; #if !CONFIG_IS_ENABLED(OF_PLATDATA) @@ -32,7 +33,8 @@ static int clk_fixed_rate_ofdata_to_platdata(struct udevice *dev) dev_read_u32_default(dev, "clock-frequency", 0); #endif /* Make fixed rate clock accessible from higher level struct clk */ - dev->uclass_priv = clk; + /* FIXME: This is not allowed */ + dev_set_uclass_priv(dev, clk); clk->dev = dev; clk->enable_count = 0; @@ -50,8 +52,8 @@ U_BOOT_DRIVER(fixed_clock) = { .name = "fixed_clock", .id = UCLASS_CLK, .of_match = clk_fixed_rate_match, - .ofdata_to_platdata = clk_fixed_rate_ofdata_to_platdata, - .platdata_auto_alloc_size = sizeof(struct clk_fixed_rate), + .of_to_plat = clk_fixed_rate_of_to_plat, + .plat_auto = sizeof(struct clk_fixed_rate), .ops = &clk_fixed_rate_ops, .flags = DM_FLAG_PRE_RELOC, }; |