diff options
Diffstat (limited to 'doc/board')
| -rw-r--r-- | doc/board/index.rst | 1 | ||||
| -rw-r--r-- | doc/board/mediatek/index.rst | 9 | ||||
| -rw-r--r-- | doc/board/mediatek/mt7621.rst | 48 | ||||
| -rw-r--r-- | doc/board/st/stm32mp1.rst | 19 |
4 files changed, 77 insertions, 0 deletions
diff --git a/doc/board/index.rst b/doc/board/index.rst index f90a9cad45..01b99f9cf5 100644 --- a/doc/board/index.rst +++ b/doc/board/index.rst @@ -23,6 +23,7 @@ Board-specific doc highbank/index intel/index kontron/index + mediatek/index microchip/index nokia/index nxp/index diff --git a/doc/board/mediatek/index.rst b/doc/board/mediatek/index.rst new file mode 100644 index 0000000000..38cd8cb5b2 --- /dev/null +++ b/doc/board/mediatek/index.rst @@ -0,0 +1,9 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +Mediatek +========= + +.. toctree:: + :maxdepth: 2 + + mt7621 diff --git a/doc/board/mediatek/mt7621.rst b/doc/board/mediatek/mt7621.rst new file mode 100644 index 0000000000..1662255546 --- /dev/null +++ b/doc/board/mediatek/mt7621.rst @@ -0,0 +1,48 @@ +.. SPDX-License-Identifier: GPL-2.0 + +mt7621_rfb/mt7621_nand_rfb +========================== + +U-Boot for the MediaTek MT7621 boards + +Quick Start +----------- + +- Get the DDR initialization binary blob +- Configure CPU and DDR parameters +- Build U-Boot + +Get the DDR initialization binary blob +-------------------------------------- + +Download one from: + - https://raw.githubusercontent.com/mtk-openwrt/mt7621-lowlevel-preloader/master/mt7621_stage_sram.bin + - https://raw.githubusercontent.com/mtk-openwrt/mt7621-lowlevel-preloader/master/mt7621_stage_sram_noprint.bin + +mt7621_stage_sram_noprint.bin has removed all output logs. To use this one, +download and rename it to mt7621_stage_sram.bin + +Put the binary blob to the u-boot build directory. + +Configure CPU and DDR parameters +-------------------------------- + +menuconfig > MIPS architecture > MediaTek MIPS platforms > CPU & DDR configuration + +Select the correct DDR timing parameters for your board. The size shown here +must match the DDR size of you board. + +The frequency of CPU and DDR can also be adjusted. + +Build U-Boot +------------ + +.. code-block:: bash + + $ export CROSS_COMPILE=mipsel-linux- + $ make O=build mt7621_rfb_defconfig # or mt7621_nand_rfb_defconfig + $ cp mt7621_stage_sram.bin ./build/mt7621_stage_sram.bin + $ # or cp mt7621_stage_sram_noprint.bin ./build/mt7621_stage_sram.bin + $ make O=build + +Burn the u-boot-mt7621.bin to the SPI-NOR or NAND flash. diff --git a/doc/board/st/stm32mp1.rst b/doc/board/st/stm32mp1.rst index 00f9b45442..3759df353e 100644 --- a/doc/board/st/stm32mp1.rst +++ b/doc/board/st/stm32mp1.rst @@ -77,6 +77,16 @@ Currently the following boards are supported: + stm32mp157c-ev1.dts + stm32mp15xx-dhcor-avenger96.dts +The SCMI variant of each board is supported by a specific "scmi" device tree: + + stm32mp157a-dk1-scmi.dts + + stm32mp157c-dk2-scmi.dts + + stm32mp157c-ed1-scmi.dts + + stm32mp157c-ev1-scmi.dts + +SCMI variant is used only with stm32mp15_defconfig, when the resources are +secured with RCC_TZCR.TZEN=1 in OP-TEE. The access to these reset and clock +resources are provided by OP-TEE and the associated SCMI services. + STM32MP13x `````````` @@ -136,6 +146,9 @@ TF-A_ (BL2) initialize the DDR and loads the next stage binaries from a FIP file the secure monitor to access to secure resources. + HW_CONFIG: The hardware configuration file = the U-Boot device tree +The scmi variant of each device tree is only support with OP-TEE as secure +monitor, with stm32mp15_defconfig. + The **Basic** boot chain with SPL (for STM32MP15x) `````````````````````````````````````````````````` @@ -250,6 +263,12 @@ Build Procedure # export KBUILD_OUTPUT=stm32mp15 # make stm32mp15_defconfig + # make DEVICE_TREE=stm32mp157c-ev1-scmi all + + or without SCMI support + + # export KBUILD_OUTPUT=stm32mp15 + # make stm32mp15_defconfig # make DEVICE_TREE=stm32mp157c-ev1 all b) trusted boot on STM32MP13x discovery board:: |