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-rw-r--r--board/cssi/MCR3000/MCR3000.c16
-rw-r--r--board/cssi/MCR3000/u-boot.lds7
-rw-r--r--board/synopsys/axs10x/axs10x.c8
-rw-r--r--board/synopsys/emsdp/emsdp.c70
-rw-r--r--board/synopsys/hsdk/hsdk.c8
-rw-r--r--board/synopsys/iot_devkit/iot_devkit.c10
-rw-r--r--board/vscom/baltos/board.c7
-rw-r--r--board/vscom/baltos/mux.c7
8 files changed, 92 insertions, 41 deletions
diff --git a/board/cssi/MCR3000/MCR3000.c b/board/cssi/MCR3000/MCR3000.c
index ffbeb14ed0..d26ac35b44 100644
--- a/board/cssi/MCR3000/MCR3000.c
+++ b/board/cssi/MCR3000/MCR3000.c
@@ -12,6 +12,8 @@
#include <mpc8xx.h>
#include <fdt_support.h>
#include <asm/io.h>
+#include <dm/uclass.h>
+#include <wdt.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -143,3 +145,17 @@ int board_early_init_f(void)
return 0;
}
+
+int board_early_init_r(void)
+{
+ struct udevice *watchdog_dev = NULL;
+
+ if (uclass_get_device(UCLASS_WDT, 0, &watchdog_dev)) {
+ puts("Cannot find watchdog!\n");
+ } else {
+ puts("Enabling watchdog.\n");
+ wdt_start(watchdog_dev, 0xffff, 0);
+ }
+
+ return 0;
+}
diff --git a/board/cssi/MCR3000/u-boot.lds b/board/cssi/MCR3000/u-boot.lds
index a32c0e721e..70aef3241c 100644
--- a/board/cssi/MCR3000/u-boot.lds
+++ b/board/cssi/MCR3000/u-boot.lds
@@ -19,7 +19,6 @@ SECTIONS
arch/powerpc/cpu/mpc8xx/start.o (.text)
arch/powerpc/cpu/mpc8xx/traps.o (.text*)
arch/powerpc/lib/built-in.o (.text*)
- board/cssi/MCR3000/built-in.o (.text*)
drivers/net/built-in.o (.text*)
. = DEFINED(env_offset) ? env_offset : .;
@@ -69,6 +68,12 @@ SECTIONS
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
+ /*
+ * _end - This is end of u-boot.bin image.
+ * dtb will be appended here to make u-boot-dtb.bin
+ */
+ _end = .;
+
. = ALIGN(4096);
__init_begin = .;
.text.init : { *(.text.init) }
diff --git a/board/synopsys/axs10x/axs10x.c b/board/synopsys/axs10x/axs10x.c
index c95f7af7a7..ffa7c154b5 100644
--- a/board/synopsys/axs10x/axs10x.c
+++ b/board/synopsys/axs10x/axs10x.c
@@ -109,3 +109,11 @@ void smp_kick_all_cpus(void)
writel(cmd, (void __iomem *)AXC003_CREG_CPU_START);
}
#endif
+
+int checkboard(void)
+{
+ printf("Board: ARC Software Development Platform AXS%s\n",
+ is_isa_arcv2() ? "103" : "101");
+
+ return 0;
+};
diff --git a/board/synopsys/emsdp/emsdp.c b/board/synopsys/emsdp/emsdp.c
index b5ec7f17ec..c0770b58c1 100644
--- a/board/synopsys/emsdp/emsdp.c
+++ b/board/synopsys/emsdp/emsdp.c
@@ -7,10 +7,46 @@
#include <dwmmc.h>
#include <malloc.h>
+#include <asm/arcregs.h>
+
DECLARE_GLOBAL_DATA_PTR;
-#define ARC_PERIPHERAL_BASE 0xF0000000
-#define SDIO_BASE (ARC_PERIPHERAL_BASE + 0x10000)
+#define ARC_PERIPHERAL_BASE 0xF0000000
+
+#define CGU_ARC_FMEAS_ARC (void *)(ARC_PERIPHERAL_BASE + 0x84)
+#define CGU_ARC_FMEAS_ARC_START BIT(31)
+#define CGU_ARC_FMEAS_ARC_DONE BIT(30)
+#define CGU_ARC_FMEAS_ARC_CNT_MASK GENMASK(14, 0)
+#define CGU_ARC_FMEAS_ARC_RCNT_OFFSET 0
+#define CGU_ARC_FMEAS_ARC_FCNT_OFFSET 15
+
+#define SDIO_BASE (void *)(ARC_PERIPHERAL_BASE + 0x10000)
+
+int mach_cpu_init(void)
+{
+ int rcnt, fcnt;
+ u32 data;
+
+ /* Start frequency measurement */
+ writel(CGU_ARC_FMEAS_ARC_START, CGU_ARC_FMEAS_ARC);
+
+ /* Poll DONE bit */
+ do {
+ data = readl(CGU_ARC_FMEAS_ARC);
+ } while (!(data & CGU_ARC_FMEAS_ARC_DONE));
+
+ /* Amount of reference 100 MHz clocks */
+ rcnt = ((data >> CGU_ARC_FMEAS_ARC_RCNT_OFFSET) &
+ CGU_ARC_FMEAS_ARC_CNT_MASK);
+
+ /* Amount of CPU clocks */
+ fcnt = ((data >> CGU_ARC_FMEAS_ARC_FCNT_OFFSET) &
+ CGU_ARC_FMEAS_ARC_CNT_MASK);
+
+ gd->cpu_clk = ((100 * fcnt) / rcnt) * 1000000;
+
+ return 0;
+}
int board_mmc_init(bd_t *bis)
{
@@ -24,7 +60,7 @@ int board_mmc_init(bd_t *bis)
memset(host, 0, sizeof(struct dwmci_host));
host->name = "Synopsys Mobile storage";
- host->ioaddr = (void *)SDIO_BASE;
+ host->ioaddr = SDIO_BASE;
host->buswidth = 4;
host->dev_index = 0;
host->bus_hz = 50000000;
@@ -42,31 +78,32 @@ int board_mmc_getcd(struct mmc *mmc)
}
#define CREG_BASE 0xF0001000
-#define CREG_BOOT_OFFSET 0
-#define CREG_BOOT_WP_OFFSET 8
+#define CREG_BOOT (void *)(CREG_BASE + 0x0FF0)
+#define CREG_IP_SW_RESET (void *)(CREG_BASE + 0x0FF0)
+#define CREG_IP_VERSION (void *)(CREG_BASE + 0x0FF8)
-#define CGU_BASE 0xF0000000
-#define CGU_IP_SW_RESET 0x0FF0
+/* Bits in CREG_BOOT register */
+#define CREG_BOOT_WP_BIT BIT(8)
void reset_cpu(ulong addr)
{
- writel(1, (u32 *)(CGU_BASE + CGU_IP_SW_RESET));
+ writel(1, CREG_IP_SW_RESET);
while (1)
; /* loop forever till reset */
}
static int do_emsdp_rom(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
{
- u32 creg_boot = readl((u32 *)(CREG_BASE + CREG_BOOT_OFFSET));
+ u32 creg_boot = readl(CREG_BOOT);
if (!strcmp(argv[1], "unlock"))
- creg_boot &= ~BIT(CREG_BOOT_WP_OFFSET);
+ creg_boot &= ~CREG_BOOT_WP_BIT;
else if (!strcmp(argv[1], "lock"))
- creg_boot |= BIT(CREG_BOOT_WP_OFFSET);
+ creg_boot |= CREG_BOOT_WP_BIT;
else
return CMD_RET_USAGE;
- writel(creg_boot, (u32 *)(CREG_BASE + CREG_BOOT_OFFSET));
+ writel(creg_boot, CREG_BOOT);
return CMD_RET_SUCCESS;
}
@@ -97,3 +134,12 @@ U_BOOT_CMD(
"rom unlock - Unlock non-volatile memory for writing\n"
"emsdp rom lock - Lock non-volatile memory to prevent writing\n"
);
+
+int checkboard(void)
+{
+ int version = readl(CREG_IP_VERSION);
+
+ printf("Board: ARC EM Software Development Platform v%d.%d\n",
+ (version >> 16) & 0xff, version & 0xff);
+ return 0;
+};
diff --git a/board/synopsys/hsdk/hsdk.c b/board/synopsys/hsdk/hsdk.c
index b6aefdbe6d..8a2c201477 100644
--- a/board/synopsys/hsdk/hsdk.c
+++ b/board/synopsys/hsdk/hsdk.c
@@ -1054,10 +1054,8 @@ int board_mmc_init(bd_t *bis)
return 0;
}
-#ifdef CONFIG_DISPLAY_CPUINFO
-int print_cpuinfo(void)
+int checkboard(void)
{
- printf("CPU: ARC HS38 v2.1c\n");
+ puts("Board: Synopsys ARC HS Development Kit\n");
return 0;
-}
-#endif /* CONFIG_DISPLAY_CPUINFO */
+};
diff --git a/board/synopsys/iot_devkit/iot_devkit.c b/board/synopsys/iot_devkit/iot_devkit.c
index f8838fb3ce..8424e09bd3 100644
--- a/board/synopsys/iot_devkit/iot_devkit.c
+++ b/board/synopsys/iot_devkit/iot_devkit.c
@@ -189,13 +189,3 @@ int checkboard(void)
puts("Board: Synopsys IoT Development Kit\n");
return 0;
};
-
-#ifdef CONFIG_DISPLAY_CPUINFO
-int print_cpuinfo(void)
-{
- char mhz[8];
-
- printf("CPU: ARC EM9D at %s MHz\n", strmhz(mhz, gd->cpu_clk));
- return 0;
-}
-#endif /* CONFIG_DISPLAY_CPUINFO */
diff --git a/board/vscom/baltos/board.c b/board/vscom/baltos/board.c
index df0a2d2b7a..c5949ad267 100644
--- a/board/vscom/baltos/board.c
+++ b/board/vscom/baltos/board.c
@@ -27,7 +27,6 @@
#include <i2c.h>
#include <miiphy.h>
#include <cpsw.h>
-#include <power/tps65217.h>
#include <power/tps65910.h>
#include <environment.h>
#include <watchdog.h>
@@ -35,8 +34,7 @@
DECLARE_GLOBAL_DATA_PTR;
-/* GPIO that controls power to DDR on EVM-SK */
-#define GPIO_DDR_VTT_EN 7
+/* GPIO that controls DIP switch and mPCIe slot */
#define DIP_S1 44
#define MPCIE_SW 100
@@ -248,9 +246,6 @@ const struct ctrl_ioregs ioregs_baltos = {
void sdram_init(void)
{
- gpio_request(GPIO_DDR_VTT_EN, "ddr_vtt_en");
- gpio_direction_output(GPIO_DDR_VTT_EN, 1);
-
config_ddr(400, &ioregs_baltos,
&ddr3_baltos_data,
&ddr3_baltos_cmd_ctrl_data,
diff --git a/board/vscom/baltos/mux.c b/board/vscom/baltos/mux.c
index 94410ae35e..9c5542ea02 100644
--- a/board/vscom/baltos/mux.c
+++ b/board/vscom/baltos/mux.c
@@ -34,7 +34,6 @@ static struct module_pin_mux mmc0_pin_mux[] = {
{OFFSET(mmc0_dat0), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT0 */
{OFFSET(mmc0_clk), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CLK */
{OFFSET(mmc0_cmd), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CMD */
- //{OFFSET(spi0_cs1), (MODE(5) | RXACTIVE | PULLUP_EN)}, /* MMC0_CD */
{-1},
};
@@ -46,11 +45,6 @@ static struct module_pin_mux i2c1_pin_mux[] = {
{-1},
};
-static struct module_pin_mux gpio0_7_pin_mux[] = {
- {OFFSET(ecap0_in_pwm0_out), (MODE(7) | PULLUDEN)}, /* GPIO0_7 */
- {-1},
-};
-
static struct module_pin_mux rmii1_pin_mux[] = {
{OFFSET(mii1_crs), MODE(1) | RXACTIVE}, /* RGMII1_TCTL */
{OFFSET(mii1_txen), MODE(1)}, /* RGMII1_TCTL */
@@ -114,7 +108,6 @@ void enable_i2c1_pin_mux(void)
void enable_board_pin_mux()
{
configure_module_pin_mux(i2c1_pin_mux);
- configure_module_pin_mux(gpio0_7_pin_mux);
configure_module_pin_mux(rgmii2_pin_mux);
configure_module_pin_mux(rmii1_pin_mux);
configure_module_pin_mux(mmc0_pin_mux);
generated by cgit v1.2.3 (git 2.39.1) at 2025-05-31 01:39:50 +0000