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Diffstat (limited to 'board/ti/ks2_evm/board.c')
-rw-r--r--board/ti/ks2_evm/board.c12
1 files changed, 11 insertions, 1 deletions
diff --git a/board/ti/ks2_evm/board.c b/board/ti/ks2_evm/board.c
index 859a26011c..73d94a6729 100644
--- a/board/ti/ks2_evm/board.c
+++ b/board/ti/ks2_evm/board.c
@@ -14,6 +14,7 @@
#include <fdt_support.h>
#include <asm/arch/ddr3.h>
#include <asm/arch/psc_defs.h>
+#include <asm/arch/clock.h>
#include <asm/ti-common/ti-aemif.h>
#include <asm/ti-common/keystone_net.h>
@@ -42,7 +43,8 @@ int dram_init(void)
gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
CONFIG_MAX_RAM_BANK_SIZE);
aemif_init(ARRAY_SIZE(aemif_configs), aemif_configs);
- ddr3_init_ecc(KS2_DDR3A_EMIF_CTRL_BASE, ddr3_size);
+ if (ddr3_size)
+ ddr3_init_ecc(KS2_DDR3A_EMIF_CTRL_BASE, ddr3_size);
return 0;
}
@@ -73,14 +75,22 @@ int board_eth_init(bd_t *bis)
int port_num;
char link_type_name[32];
+ if (cpu_is_k2g())
+ writel(KS2_ETHERNET_RGMII, KS2_ETHERNET_CFG);
+
/* By default, select PA PLL clock as PA clock source */
+#ifndef CONFIG_SOC_K2G
if (psc_enable_module(KS2_LPSC_PA))
return -1;
+#endif
if (psc_enable_module(KS2_LPSC_CPGMAC))
return -1;
if (psc_enable_module(KS2_LPSC_CRYPTO))
return -1;
+ if (cpu_is_k2e() || cpu_is_k2l())
+ pll_pa_clk_sel();
+
port_num = get_num_eth_ports();
for (j = 0; j < port_num; j++) {