diff options
Diffstat (limited to 'board/intel')
-rw-r--r-- | board/intel/Kconfig | 14 | ||||
-rw-r--r-- | board/intel/slimbootloader/Kconfig | 28 | ||||
-rw-r--r-- | board/intel/slimbootloader/MAINTAINERS | 6 | ||||
-rw-r--r-- | board/intel/slimbootloader/Makefile | 5 | ||||
-rw-r--r-- | board/intel/slimbootloader/slimbootloader.c | 21 | ||||
-rw-r--r-- | board/intel/slimbootloader/start.S | 9 |
6 files changed, 83 insertions, 0 deletions
diff --git a/board/intel/Kconfig b/board/intel/Kconfig index 5131836cb0..7b16ec4dc1 100644 --- a/board/intel/Kconfig +++ b/board/intel/Kconfig @@ -73,6 +73,19 @@ config TARGET_MINNOWMAX Note that PCIE_ECAM_BASE is set up by the FSP so the value used by U-Boot matches that value. +config TARGET_SLIMBOOTLOADER + bool "slimbootloader" + help + This target is used for running U-Boot on top of Slim Bootloader + boot firmware as a payload. Slim Bootloader does memory initialization + and silicon initialization, and it passes necessary information in + HOB (Hand Off Block) to a payload. The payload consumes HOB data + which is generated by Slim Bootloader for its driver initialization. + Slim Bootloader consumes FSP and its HOB, but FSP HOB is cleared + Before launching a payload. Instead, Slim Bootloader generates its + HOB data such as memory info, serial port info and so on. + Refer to doc/board/intel/slimbootloader.rst for the details. + endchoice source "board/intel/bayleybay/Kconfig" @@ -82,5 +95,6 @@ source "board/intel/crownbay/Kconfig" source "board/intel/edison/Kconfig" source "board/intel/galileo/Kconfig" source "board/intel/minnowmax/Kconfig" +source "board/intel/slimbootloader/Kconfig" endif diff --git a/board/intel/slimbootloader/Kconfig b/board/intel/slimbootloader/Kconfig new file mode 100644 index 0000000000..8c7e22cc33 --- /dev/null +++ b/board/intel/slimbootloader/Kconfig @@ -0,0 +1,28 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (C) 2019 Intel Corporation <www.intel.com> + +if TARGET_SLIMBOOTLOADER + +config SYS_BOARD + default "slimbootloader" + +config SYS_VENDOR + default "intel" + +config SYS_SOC + default "slimbootloader" + +config SYS_CONFIG_NAME + default "slimbootloader" + +config SYS_TEXT_BASE + default 0x00100000 + +config BOARD_SPECIFIC_OPTIONS + def_bool y + select SYS_SLIMBOOTLOADER + select USB_STORAGE + select USB_KEYBOARD + +endif diff --git a/board/intel/slimbootloader/MAINTAINERS b/board/intel/slimbootloader/MAINTAINERS new file mode 100644 index 0000000000..e6935517e0 --- /dev/null +++ b/board/intel/slimbootloader/MAINTAINERS @@ -0,0 +1,6 @@ +Intel Slim Bootloader Payload +M: Aiden Park <aiden.park@intel.com> +S: Maintained +F: board/intel/slimbootloader +F: include/configs/slimbootloader.h +F: configs/slimbootloader_defconfig diff --git a/board/intel/slimbootloader/Makefile b/board/intel/slimbootloader/Makefile new file mode 100644 index 0000000000..fd8fa98a8d --- /dev/null +++ b/board/intel/slimbootloader/Makefile @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (C) 2019 Intel Corporation <www.intel.com> + +obj-y += start.o slimbootloader.o diff --git a/board/intel/slimbootloader/slimbootloader.c b/board/intel/slimbootloader/slimbootloader.c new file mode 100644 index 0000000000..f50eeb823f --- /dev/null +++ b/board/intel/slimbootloader/slimbootloader.c @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2019 Intel Corporation <www.intel.com> + */ + +#include <common.h> + +int board_early_init_r(void) +{ + /* + * Make sure PCI bus is enumerated so that peripherals on the PCI bus + * can be discovered by their drivers. + * + * Slim Bootloader has already done PCI bus enumeration before loading + * U-Boot, so U-Boot needs to preserve PCI configuration. + * Therefore, '# CONFIG_PCI_PNP is not set' is included in defconfig. + */ + pci_init(); + + return 0; +} diff --git a/board/intel/slimbootloader/start.S b/board/intel/slimbootloader/start.S new file mode 100644 index 0000000000..5c3f3df09e --- /dev/null +++ b/board/intel/slimbootloader/start.S @@ -0,0 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2019 Intel Corporation <www.intel.com> + */ + +/* board early initialization */ +.globl early_board_init +early_board_init: + jmp early_board_init_ret |