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Diffstat (limited to 'board/gateworks/venice/venice.c')
-rw-r--r--board/gateworks/venice/venice.c31
1 files changed, 0 insertions, 31 deletions
diff --git a/board/gateworks/venice/venice.c b/board/gateworks/venice/venice.c
index e6fa7eb3d7..ca62f0be6d 100644
--- a/board/gateworks/venice/venice.c
+++ b/board/gateworks/venice/venice.c
@@ -57,24 +57,10 @@ static int __maybe_unused setup_fec(void)
return 0;
}
-static int __maybe_unused setup_eqos(void)
-{
- struct iomuxc_gpr_base_regs *gpr =
- (struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR;
-
- /* set INTF as RGMII, enable RGMII TXC clock */
- clrsetbits_le32(&gpr->gpr[1],
- IOMUXC_GPR_GPR1_GPR_ENET_QOS_INTF_SEL_MASK, BIT(16));
- setbits_le32(&gpr->gpr[1], BIT(19) | BIT(21));
-
- return set_clk_eqos(ENET_125MHZ);
-}
-
#if (IS_ENABLED(CONFIG_NET))
int board_phy_config(struct phy_device *phydev)
{
unsigned short val;
- ofnode node;
switch (phydev->phy_id) {
case 0x2000a231: /* TI DP83867 GbE PHY */
@@ -85,21 +71,6 @@ int board_phy_config(struct phy_device *phydev)
val |= 0xb << 8; /* LED2(Green;Link/Act): blink for TX/RX act */
phy_write(phydev, MDIO_DEVAD_NONE, 24, val);
break;
- case 0xd565a401: /* MaxLinear GPY111 */
- puts("GPY111 ");
- node = phy_get_ofnode(phydev);
- if (ofnode_valid(node)) {
- u32 rx_delay, tx_delay;
-
- rx_delay = ofnode_read_u32_default(node, "rx-internal-delay-ps", 2000);
- tx_delay = ofnode_read_u32_default(node, "tx-internal-delay-ps", 2000);
- val = phy_read(phydev, MDIO_DEVAD_NONE, 0x17);
- val &= ~((0x7 << 12) | (0x7 << 8));
- val |= (rx_delay / 500) << 12;
- val |= (tx_delay / 500) << 8;
- phy_write(phydev, MDIO_DEVAD_NONE, 0x17, val);
- }
- break;
}
if (phydev->drv->config)
@@ -115,8 +86,6 @@ int board_init(void)
if (IS_ENABLED(CONFIG_FEC_MXC))
setup_fec();
- if (IS_ENABLED(CONFIG_DWC_ETH_QOS))
- setup_eqos();
return 0;
}