diff options
Diffstat (limited to 'arch')
63 files changed, 257 insertions, 170 deletions
diff --git a/arch/Kconfig b/arch/Kconfig index 356193f9ec..e8f9a9e1b7 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -112,6 +112,7 @@ config SANDBOX imply BITREVERSE select BLOBLIST imply CMD_DM + imply CMD_EXCEPTION imply CMD_GETTIME imply CMD_HASH imply CMD_IO diff --git a/arch/arm/include/asm/arch-hi6220/gpio.h b/arch/arm/include/asm/arch-hi6220/gpio.h index c5ee359a3a..12717a96aa 100644 --- a/arch/arm/include/asm/arch-hi6220/gpio.h +++ b/arch/arm/include/asm/arch-hi6220/gpio.h @@ -18,7 +18,7 @@ struct gpio_bank { }; /* Information about a GPIO bank */ -struct hikey_gpio_platdata { +struct hikey_gpio_plat { int bank_index; ulong base; /* address of registers in physical memory */ }; diff --git a/arch/arm/include/asm/arch-imx8/power-domain.h b/arch/arm/include/asm/arch-imx8/power-domain.h index 1396008877..1db86a1209 100644 --- a/arch/arm/include/asm/arch-imx8/power-domain.h +++ b/arch/arm/include/asm/arch-imx8/power-domain.h @@ -8,7 +8,7 @@ #include <asm/arch/sci/types.h> -struct imx8_power_domain_platdata { +struct imx8_power_domain_plat { sc_rsrc_t resource_id; }; diff --git a/arch/arm/include/asm/arch-imx8m/power-domain.h b/arch/arm/include/asm/arch-imx8m/power-domain.h index 0f94945894..7a833e564b 100644 --- a/arch/arm/include/asm/arch-imx8m/power-domain.h +++ b/arch/arm/include/asm/arch-imx8m/power-domain.h @@ -6,7 +6,7 @@ #ifndef _ASM_ARCH_IMX8M_POWER_DOMAIN_H #define _ASM_ARCH_IMX8M_POWER_DOMAIN_H -struct imx8m_power_domain_platdata { +struct imx8m_power_domain_plat { int resource_id; int has_pd; struct power_domain pd; diff --git a/arch/arm/include/asm/arch-vf610/gpio.h b/arch/arm/include/asm/arch-vf610/gpio.h index 9bfdf16873..0b9e10f51e 100644 --- a/arch/arm/include/asm/arch-vf610/gpio.h +++ b/arch/arm/include/asm/arch-vf610/gpio.h @@ -20,7 +20,7 @@ struct vybrid_gpio_regs { u32 gpio_pdir; }; -struct vybrid_gpio_platdata { +struct vybrid_gpio_plat { unsigned int chip; u32 base; const char *port_name; diff --git a/arch/arm/include/asm/omap_gpio.h b/arch/arm/include/asm/omap_gpio.h index 151afa8f44..4084210021 100644 --- a/arch/arm/include/asm/omap_gpio.h +++ b/arch/arm/include/asm/omap_gpio.h @@ -25,7 +25,7 @@ #if CONFIG_IS_ENABLED(DM_GPIO) /* Information about a GPIO bank */ -struct omap_gpio_platdata { +struct omap_gpio_plat { int bank_index; ulong base; /* address of registers in physical memory */ const char *port_name; diff --git a/arch/arm/include/asm/omap_i2c.h b/arch/arm/include/asm/omap_i2c.h index a6975401da..ec7a145f17 100644 --- a/arch/arm/include/asm/omap_i2c.h +++ b/arch/arm/include/asm/omap_i2c.h @@ -6,7 +6,7 @@ #ifdef CONFIG_DM_I2C /* Information about a GPIO bank */ -struct omap_i2c_platdata { +struct omap_i2c_plat { ulong base; /* address of registers in physical memory */ int speed; int ip_rev; diff --git a/arch/arm/include/asm/omap_musb.h b/arch/arm/include/asm/omap_musb.h index b40ea005be..614c93def8 100644 --- a/arch/arm/include/asm/omap_musb.h +++ b/arch/arm/include/asm/omap_musb.h @@ -23,7 +23,7 @@ struct omap_musb_board_data { enum musb_interface {MUSB_INTERFACE_ULPI, MUSB_INTERFACE_UTMI}; -struct ti_musb_platdata { +struct ti_musb_plat { void *base; void *ctrl_mod_base; struct musb_hdrc_platform_data plat; diff --git a/arch/arm/mach-at91/arm926ejs/at91sam9260_devices.c b/arch/arm/mach-at91/arm926ejs/at91sam9260_devices.c index 8122d2f98e..9d787197f3 100644 --- a/arch/arm/mach-at91/arm926ejs/at91sam9260_devices.c +++ b/arch/arm/mach-at91/arm926ejs/at91sam9260_devices.c @@ -213,7 +213,7 @@ void at91_sdram_hw_init(void) } /* Platform data for the GPIOs */ -static const struct at91_port_platdata at91sam9260_plat[] = { +static const struct at91_port_plat at91sam9260_plat[] = { { ATMEL_BASE_PIOA, "PA" }, { ATMEL_BASE_PIOB, "PB" }, { ATMEL_BASE_PIOC, "PC" }, diff --git a/arch/arm/mach-at91/arm926ejs/at91sam9m10g45_devices.c b/arch/arm/mach-at91/arm926ejs/at91sam9m10g45_devices.c index 08ca3edd78..f503553b92 100644 --- a/arch/arm/mach-at91/arm926ejs/at91sam9m10g45_devices.c +++ b/arch/arm/mach-at91/arm926ejs/at91sam9m10g45_devices.c @@ -167,7 +167,7 @@ void at91_mci_hw_init(void) #endif /* Platform data for the GPIOs */ -static const struct at91_port_platdata at91sam9260_plat[] = { +static const struct at91_port_plat at91sam9260_plat[] = { { ATMEL_BASE_PIOA, "PA" }, { ATMEL_BASE_PIOB, "PB" }, { ATMEL_BASE_PIOC, "PC" }, diff --git a/arch/arm/mach-at91/include/mach/atmel_serial.h b/arch/arm/mach-at91/include/mach/atmel_serial.h index c53a509ff8..5d14269364 100644 --- a/arch/arm/mach-at91/include/mach/atmel_serial.h +++ b/arch/arm/mach-at91/include/mach/atmel_serial.h @@ -7,7 +7,7 @@ #define _ATMEL_SERIAL_H /* Information about a serial port */ -struct atmel_serial_platdata { +struct atmel_serial_plat { uint32_t base_addr; }; diff --git a/arch/arm/mach-at91/include/mach/gpio.h b/arch/arm/mach-at91/include/mach/gpio.h index 575c6436ad..c1aef798b1 100644 --- a/arch/arm/mach-at91/include/mach/gpio.h +++ b/arch/arm/mach-at91/include/mach/gpio.h @@ -253,7 +253,7 @@ static inline unsigned at91_gpio_to_pin(unsigned gpio) } /* Platform data for each GPIO port */ -struct at91_port_platdata { +struct at91_port_plat { uint32_t base_addr; const char *bank_name; }; diff --git a/arch/arm/mach-bcm283x/include/mach/gpio.h b/arch/arm/mach-bcm283x/include/mach/gpio.h index 3263de9a35..4aeb48eeb2 100644 --- a/arch/arm/mach-bcm283x/include/mach/gpio.h +++ b/arch/arm/mach-bcm283x/include/mach/gpio.h @@ -52,11 +52,11 @@ struct bcm2835_gpio_regs { }; /** - * struct bcm2835_gpio_platdata - GPIO platform description + * struct bcm2835_gpio_plat - GPIO platform description * * @base: Base address of GPIO controller */ -struct bcm2835_gpio_platdata { +struct bcm2835_gpio_plat { unsigned long base; }; diff --git a/arch/arm/mach-imx/mx6/soc.c b/arch/arm/mach-imx/mx6/soc.c index f43a2460f9..1649f6d948 100644 --- a/arch/arm/mach-imx/mx6/soc.c +++ b/arch/arm/mach-imx/mx6/soc.c @@ -46,7 +46,7 @@ static const struct imx_thermal_plat imx6_thermal_plat = { U_BOOT_DEVICE(imx6_thermal) = { .name = "imx_thermal", - .platdata = &imx6_thermal_plat, + .plat = &imx6_thermal_plat, }; #endif diff --git a/arch/arm/mach-imx/mx7/soc.c b/arch/arm/mach-imx/mx7/soc.c index d0385b36e4..13593994f1 100644 --- a/arch/arm/mach-imx/mx7/soc.c +++ b/arch/arm/mach-imx/mx7/soc.c @@ -62,7 +62,7 @@ static const struct imx_thermal_plat imx7_thermal_plat = { U_BOOT_DEVICE(imx7_thermal) = { .name = "imx_thermal", - .platdata = &imx7_thermal_plat, + .plat = &imx7_thermal_plat, }; #endif diff --git a/arch/arm/mach-ipq40xx/clock-ipq4019.c b/arch/arm/mach-ipq40xx/clock-ipq4019.c index a3f872947d..c1d5c4ecdd 100644 --- a/arch/arm/mach-ipq40xx/clock-ipq4019.c +++ b/arch/arm/mach-ipq40xx/clock-ipq4019.c @@ -83,6 +83,6 @@ U_BOOT_DRIVER(clk_msm) = { .id = UCLASS_CLK, .of_match = msm_clk_ids, .ops = &msm_clk_ops, - .priv_auto_alloc_size = sizeof(struct msm_clk_priv), + .priv_auto = sizeof(struct msm_clk_priv), .probe = msm_clk_probe, }; diff --git a/arch/arm/mach-ipq40xx/pinctrl-snapdragon.c b/arch/arm/mach-ipq40xx/pinctrl-snapdragon.c index 64b8b049fa..c51a75ee94 100644 --- a/arch/arm/mach-ipq40xx/pinctrl-snapdragon.c +++ b/arch/arm/mach-ipq40xx/pinctrl-snapdragon.c @@ -131,7 +131,7 @@ U_BOOT_DRIVER(pinctrl_snapdraon) = { .name = "pinctrl_msm", .id = UCLASS_PINCTRL, .of_match = msm_pinctrl_ids, - .priv_auto_alloc_size = sizeof(struct msm_pinctrl_priv), + .priv_auto = sizeof(struct msm_pinctrl_priv), .ops = &msm_pinctrl_ops, .probe = msm_pinctrl_probe, }; diff --git a/arch/arm/mach-lpc32xx/devices.c b/arch/arm/mach-lpc32xx/devices.c index 7e7646a2e1..04e026a8b7 100644 --- a/arch/arm/mach-lpc32xx/devices.c +++ b/arch/arm/mach-lpc32xx/devices.c @@ -43,7 +43,7 @@ void lpc32xx_uart_init(unsigned int uart_id) } #if !CONFIG_IS_ENABLED(OF_CONTROL) -static const struct ns16550_platdata lpc32xx_uart[] = { +static const struct ns16550_plat lpc32xx_uart[] = { { .base = UART3_BASE, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, }, { .base = UART4_BASE, .reg_shift = 2, @@ -55,7 +55,7 @@ static const struct ns16550_platdata lpc32xx_uart[] = { }; #if defined(CONFIG_LPC32XX_HSUART) -static const struct lpc32xx_hsuart_platdata lpc32xx_hsuart[] = { +static const struct lpc32xx_hsuart_plat lpc32xx_hsuart[] = { { HS_UART1_BASE, }, { HS_UART2_BASE, }, { HS_UART7_BASE, }, diff --git a/arch/arm/mach-nexell/include/mach/display.h b/arch/arm/mach-nexell/include/mach/display.h index b167e63a5a..b0ee912605 100644 --- a/arch/arm/mach-nexell/include/mach/display.h +++ b/arch/arm/mach-nexell/include/mach/display.h @@ -212,7 +212,7 @@ struct dp_hdmi_dev { }; /* platform data for the driver model */ -struct nx_display_platdata { +struct nx_display_plat { int module; struct dp_sync_info sync; struct dp_ctrl_info ctrl; @@ -267,7 +267,7 @@ int dp_plane_wait_vsync(int module, int layer, int fps); #if defined CONFIG_SPL_BUILD || \ (!defined(CONFIG_DM) && !defined(CONFIG_OF_CONTROL)) -int nx_display_probe(struct nx_display_platdata *plat); +int nx_display_probe(struct nx_display_plat *plat); #endif #endif diff --git a/arch/arm/mach-omap2/am33xx/board.c b/arch/arm/mach-omap2/am33xx/board.c index 2888390d24..b5f2b75e24 100644 --- a/arch/arm/mach-omap2/am33xx/board.c +++ b/arch/arm/mach-omap2/am33xx/board.c @@ -80,7 +80,7 @@ int dram_init_banksize(void) } #if !CONFIG_IS_ENABLED(OF_CONTROL) -static const struct ns16550_platdata am33xx_serial[] = { +static const struct ns16550_plat am33xx_serial[] = { { .base = CONFIG_SYS_NS16550_COM1, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, }, # ifdef CONFIG_SYS_NS16550_COM2 @@ -113,7 +113,7 @@ U_BOOT_DEVICES(am33xx_uarts) = { }; #ifdef CONFIG_DM_I2C -static const struct omap_i2c_platdata am33xx_i2c[] = { +static const struct omap_i2c_plat am33xx_i2c[] = { { I2C_BASE1, 100000, OMAP_I2C_REV_V2}, { I2C_BASE2, 100000, OMAP_I2C_REV_V2}, { I2C_BASE3, 100000, OMAP_I2C_REV_V2}, @@ -127,7 +127,7 @@ U_BOOT_DEVICES(am33xx_i2c) = { #endif #if CONFIG_IS_ENABLED(DM_GPIO) -static const struct omap_gpio_platdata am33xx_gpio[] = { +static const struct omap_gpio_plat am33xx_gpio[] = { { 0, AM33XX_GPIO0_BASE }, { 1, AM33XX_GPIO1_BASE }, { 2, AM33XX_GPIO2_BASE }, @@ -157,7 +157,7 @@ static const struct omap3_spi_plat omap3_spi_pdata = { U_BOOT_DEVICE(am33xx_spi) = { .name = "omap3_spi", - .platdata = &omap3_spi_pdata, + .plat = &omap3_spi_pdata, }; #endif #endif @@ -214,7 +214,7 @@ static struct musb_hdrc_config musb_config = { }; #if CONFIG_IS_ENABLED(DM_USB) && !CONFIG_IS_ENABLED(OF_CONTROL) -static struct ti_musb_platdata usb0 = { +static struct ti_musb_plat usb0 = { .base = (void *)USB0_OTG_BASE, .ctrl_mod_base = &((struct ctrl_dev *)CTRL_DEVICE_BASE)->usb_ctrl0, .plat = { @@ -224,7 +224,7 @@ static struct ti_musb_platdata usb0 = { }, }; -static struct ti_musb_platdata usb1 = { +static struct ti_musb_plat usb1 = { .base = (void *)USB1_OTG_BASE, .ctrl_mod_base = &((struct ctrl_dev *)CTRL_DEVICE_BASE)->usb_ctrl1, .plat = { diff --git a/arch/arm/mach-omap2/omap3/board.c b/arch/arm/mach-omap2/omap3/board.c index f08c8ab43a..6ffedd1769 100644 --- a/arch/arm/mach-omap2/omap3/board.c +++ b/arch/arm/mach-omap2/omap3/board.c @@ -38,7 +38,7 @@ static void omap3_invalidate_l2_cache_secure(void); #if CONFIG_IS_ENABLED(DM_GPIO) #if !CONFIG_IS_ENABLED(OF_CONTROL) /* Manually initialize GPIO banks when OF_CONTROL doesn't */ -static const struct omap_gpio_platdata omap34xx_gpio[] = { +static const struct omap_gpio_plat omap34xx_gpio[] = { { 0, OMAP34XX_GPIO1_BASE }, { 1, OMAP34XX_GPIO2_BASE }, { 2, OMAP34XX_GPIO3_BASE }, diff --git a/arch/arm/mach-rockchip/px30/syscon_px30.c b/arch/arm/mach-rockchip/px30/syscon_px30.c index 4672bdbf00..37e88f5ccb 100644 --- a/arch/arm/mach-rockchip/px30/syscon_px30.c +++ b/arch/arm/mach-rockchip/px30/syscon_px30.c @@ -23,7 +23,7 @@ U_BOOT_DRIVER(syscon_px30) = { }; #if CONFIG_IS_ENABLED(OF_PLATDATA) -static int px30_syscon_bind_of_platdata(struct udevice *dev) +static int px30_syscon_bind_of_plat(struct udevice *dev) { dev->driver_data = dev->driver->of_match->data; debug("syscon: %s %d\n", dev->name, (uint)dev->driver_data); @@ -35,20 +35,20 @@ U_BOOT_DRIVER(rockchip_px30_pmu) = { .name = "rockchip_px30_pmu", .id = UCLASS_SYSCON, .of_match = px30_syscon_ids, - .bind = px30_syscon_bind_of_platdata, + .bind = px30_syscon_bind_of_plat, }; U_BOOT_DRIVER(rockchip_px30_pmugrf) = { .name = "rockchip_px30_pmugrf", .id = UCLASS_SYSCON, .of_match = px30_syscon_ids + 1, - .bind = px30_syscon_bind_of_platdata, + .bind = px30_syscon_bind_of_plat, }; U_BOOT_DRIVER(rockchip_px30_grf) = { .name = "rockchip_px30_grf", .id = UCLASS_SYSCON, .of_match = px30_syscon_ids + 2, - .bind = px30_syscon_bind_of_platdata, + .bind = px30_syscon_bind_of_plat, }; #endif diff --git a/arch/arm/mach-rockchip/rk3188/syscon_rk3188.c b/arch/arm/mach-rockchip/rk3188/syscon_rk3188.c index ea7d7b5b1a..917ff37c0f 100644 --- a/arch/arm/mach-rockchip/rk3188/syscon_rk3188.c +++ b/arch/arm/mach-rockchip/rk3188/syscon_rk3188.c @@ -24,7 +24,7 @@ U_BOOT_DRIVER(syscon_rk3188) = { }; #if CONFIG_IS_ENABLED(OF_PLATDATA) -static int rk3188_syscon_bind_of_platdata(struct udevice *dev) +static int rk3188_syscon_bind_of_plat(struct udevice *dev) { dev->driver_data = dev->driver->of_match->data; debug("syscon: %s %d\n", dev->name, (uint)dev->driver_data); @@ -36,20 +36,20 @@ U_BOOT_DRIVER(rockchip_rk3188_noc) = { .name = "rockchip_rk3188_noc", .id = UCLASS_SYSCON, .of_match = rk3188_syscon_ids, - .bind = rk3188_syscon_bind_of_platdata, + .bind = rk3188_syscon_bind_of_plat, }; U_BOOT_DRIVER(rockchip_rk3188_grf) = { .name = "rockchip_rk3188_grf", .id = UCLASS_SYSCON, .of_match = rk3188_syscon_ids + 1, - .bind = rk3188_syscon_bind_of_platdata, + .bind = rk3188_syscon_bind_of_plat, }; U_BOOT_DRIVER(rockchip_rk3188_pmu) = { .name = "rockchip_rk3188_pmu", .id = UCLASS_SYSCON, .of_match = rk3188_syscon_ids + 2, - .bind = rk3188_syscon_bind_of_platdata, + .bind = rk3188_syscon_bind_of_plat, }; #endif diff --git a/arch/arm/mach-rockchip/rk3288/syscon_rk3288.c b/arch/arm/mach-rockchip/rk3288/syscon_rk3288.c index e3da0a0194..9c1ae880c7 100644 --- a/arch/arm/mach-rockchip/rk3288/syscon_rk3288.c +++ b/arch/arm/mach-rockchip/rk3288/syscon_rk3288.c @@ -25,7 +25,7 @@ U_BOOT_DRIVER(syscon_rk3288) = { }; #if CONFIG_IS_ENABLED(OF_PLATDATA) -static int rk3288_syscon_bind_of_platdata(struct udevice *dev) +static int rk3288_syscon_bind_of_plat(struct udevice *dev) { dev->driver_data = dev->driver->of_match->data; debug("syscon: %s %d\n", dev->name, (uint)dev->driver_data); @@ -37,27 +37,27 @@ U_BOOT_DRIVER(rockchip_rk3288_noc) = { .name = "rockchip_rk3288_noc", .id = UCLASS_SYSCON, .of_match = rk3288_syscon_ids, - .bind = rk3288_syscon_bind_of_platdata, + .bind = rk3288_syscon_bind_of_plat, }; U_BOOT_DRIVER(rockchip_rk3288_grf) = { .name = "rockchip_rk3288_grf", .id = UCLASS_SYSCON, .of_match = rk3288_syscon_ids + 1, - .bind = rk3288_syscon_bind_of_platdata, + .bind = rk3288_syscon_bind_of_plat, }; U_BOOT_DRIVER(rockchip_rk3288_sgrf) = { .name = "rockchip_rk3288_sgrf", .id = UCLASS_SYSCON, .of_match = rk3288_syscon_ids + 2, - .bind = rk3288_syscon_bind_of_platdata, + .bind = rk3288_syscon_bind_of_plat, }; U_BOOT_DRIVER(rockchip_rk3288_pmu) = { .name = "rockchip_rk3288_pmu", .id = UCLASS_SYSCON, .of_match = rk3288_syscon_ids + 3, - .bind = rk3288_syscon_bind_of_platdata, + .bind = rk3288_syscon_bind_of_plat, }; #endif diff --git a/arch/arm/mach-rockchip/rk3368/syscon_rk3368.c b/arch/arm/mach-rockchip/rk3368/syscon_rk3368.c index cba0dda3e8..dc2d831dd8 100644 --- a/arch/arm/mach-rockchip/rk3368/syscon_rk3368.c +++ b/arch/arm/mach-rockchip/rk3368/syscon_rk3368.c @@ -30,7 +30,7 @@ U_BOOT_DRIVER(syscon_rk3368) = { }; #if CONFIG_IS_ENABLED(OF_PLATDATA) -static int rk3368_syscon_bind_of_platdata(struct udevice *dev) +static int rk3368_syscon_bind_of_plat(struct udevice *dev) { dev->driver_data = dev->driver->of_match->data; debug("syscon: %s %d\n", dev->name, (uint)dev->driver_data); @@ -42,27 +42,27 @@ U_BOOT_DRIVER(rockchip_rk3368_grf) = { .name = "rockchip_rk3368_grf", .id = UCLASS_SYSCON, .of_match = rk3368_syscon_ids, - .bind = rk3368_syscon_bind_of_platdata, + .bind = rk3368_syscon_bind_of_plat, }; U_BOOT_DRIVER(rockchip_rk3368_pmugrf) = { .name = "rockchip_rk3368_pmugrf", .id = UCLASS_SYSCON, .of_match = rk3368_syscon_ids + 1, - .bind = rk3368_syscon_bind_of_platdata, + .bind = rk3368_syscon_bind_of_plat, }; U_BOOT_DRIVER(rockchip_rk3368_msch) = { .name = "rockchip_rk3368_msch", .id = UCLASS_SYSCON, .of_match = rk3368_syscon_ids + 2, - .bind = rk3368_syscon_bind_of_platdata, + .bind = rk3368_syscon_bind_of_plat, }; U_BOOT_DRIVER(rockchip_rk3368_sgrf) = { .name = "rockchip_rk3368_sgrf", .id = UCLASS_SYSCON, .of_match = rk3368_syscon_ids + 3, - .bind = rk3368_syscon_bind_of_platdata, + .bind = rk3368_syscon_bind_of_plat, }; #endif diff --git a/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c b/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c index 690cbe7f27..b360ca7dde 100644 --- a/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c +++ b/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c @@ -28,7 +28,7 @@ U_BOOT_DRIVER(syscon_rk3399) = { }; #if CONFIG_IS_ENABLED(OF_PLATDATA) -static int rk3399_syscon_bind_of_platdata(struct udevice *dev) +static int rk3399_syscon_bind_of_plat(struct udevice *dev) { dev->driver_data = dev->driver->of_match->data; debug("syscon: %s %d\n", dev->name, (uint)dev->driver_data); @@ -40,34 +40,34 @@ U_BOOT_DRIVER(rockchip_rk3399_grf) = { .name = "rockchip_rk3399_grf", .id = UCLASS_SYSCON, .of_match = rk3399_syscon_ids, - .bind = rk3399_syscon_bind_of_platdata, + .bind = rk3399_syscon_bind_of_plat, }; U_BOOT_DRIVER(rockchip_rk3399_pmugrf) = { .name = "rockchip_rk3399_pmugrf", .id = UCLASS_SYSCON, .of_match = rk3399_syscon_ids + 1, - .bind = rk3399_syscon_bind_of_platdata, + .bind = rk3399_syscon_bind_of_plat, }; U_BOOT_DRIVER(rockchip_rk3399_pmusgrf) = { .name = "rockchip_rk3399_pmusgrf", .id = UCLASS_SYSCON, .of_match = rk3399_syscon_ids + 2, - .bind = rk3399_syscon_bind_of_platdata, + .bind = rk3399_syscon_bind_of_plat, }; U_BOOT_DRIVER(rockchip_rk3399_cic) = { .name = "rockchip_rk3399_cic", .id = UCLASS_SYSCON, .of_match = rk3399_syscon_ids + 3, - .bind = rk3399_syscon_bind_of_platdata, + .bind = rk3399_syscon_bind_of_plat, }; U_BOOT_DRIVER(rockchip_rk3399_pmu) = { .name = "rockchip_rk3399_pmu", .id = UCLASS_SYSCON, .of_match = rk3399_syscon_ids + 4, - .bind = rk3399_syscon_bind_of_platdata, + .bind = rk3399_syscon_bind_of_plat, }; #endif diff --git a/arch/arm/mach-rockchip/spl-boot-order.c b/arch/arm/mach-rockchip/spl-boot-order.c index 94673f34c9..8ccd5afb56 100644 --- a/arch/arm/mach-rockchip/spl-boot-order.c +++ b/arch/arm/mach-rockchip/spl-boot-order.c @@ -46,7 +46,7 @@ static int spl_node_to_boot_device(int node) dev; device_find_next_child(&dev)) { if (device_get_uclass_id(dev) == UCLASS_BLK) { - desc = dev_get_uclass_platdata(dev); + desc = dev_get_uclass_plat(dev); break; } } @@ -99,7 +99,7 @@ __weak const char *board_spl_was_booted_from(void) void board_boot_order(u32 *spl_boot_list) { - /* In case of no fdt (or only platdata), use spl_boot_device() */ + /* In case of no fdt (or only plat), use spl_boot_device() */ if (!CONFIG_IS_ENABLED(OF_CONTROL) || CONFIG_IS_ENABLED(OF_PLATDATA)) { spl_boot_list[0] = spl_boot_device(); return; diff --git a/arch/arm/mach-snapdragon/clock-snapdragon.c b/arch/arm/mach-snapdragon/clock-snapdragon.c index 69d65c82e3..fbe0b5212f 100644 --- a/arch/arm/mach-snapdragon/clock-snapdragon.c +++ b/arch/arm/mach-snapdragon/clock-snapdragon.c @@ -143,6 +143,6 @@ U_BOOT_DRIVER(clk_msm) = { .id = UCLASS_CLK, .of_match = msm_clk_ids, .ops = &msm_clk_ops, - .priv_auto_alloc_size = sizeof(struct msm_clk_priv), + .priv_auto = sizeof(struct msm_clk_priv), .probe = msm_clk_probe, }; diff --git a/arch/arm/mach-snapdragon/pinctrl-snapdragon.c b/arch/arm/mach-snapdragon/pinctrl-snapdragon.c index 4c2af21308..e6b87c3573 100644 --- a/arch/arm/mach-snapdragon/pinctrl-snapdragon.c +++ b/arch/arm/mach-snapdragon/pinctrl-snapdragon.c @@ -123,7 +123,7 @@ U_BOOT_DRIVER(pinctrl_snapdraon) = { .name = "pinctrl_msm", .id = UCLASS_PINCTRL, .of_match = msm_pinctrl_ids, - .priv_auto_alloc_size = sizeof(struct msm_pinctrl_priv), + .priv_auto = sizeof(struct msm_pinctrl_priv), .ops = &msm_pinctrl_ops, .probe = msm_pinctrl_probe, }; diff --git a/arch/arm/mach-stm32mp/bsec.c b/arch/arm/mach-stm32mp/bsec.c index a9b9bd0902..85a9e6f84e 100644 --- a/arch/arm/mach-stm32mp/bsec.c +++ b/arch/arm/mach-stm32mp/bsec.c @@ -280,13 +280,13 @@ static int bsec_program_otp(long base, u32 val, u32 otp) } /* BSEC MISC driver *******************************************************/ -struct stm32mp_bsec_platdata { +struct stm32mp_bsec_plat { u32 base; }; static int stm32mp_bsec_read_otp(struct udevice *dev, u32 *val, u32 otp) { - struct stm32mp_bsec_platdata *plat; + struct stm32mp_bsec_plat *plat; u32 tmp_data = 0; int ret; @@ -295,7 +295,7 @@ static int stm32mp_bsec_read_otp(struct udevice *dev, u32 *val, u32 otp) STM32_SMC_READ_OTP, otp, 0, val); - plat = dev_get_platdata(dev); + plat = dev_get_plat(dev); /* read current shadow value */ ret = bsec_read_shadow(plat->base, &tmp_data, otp); @@ -319,21 +319,21 @@ static int stm32mp_bsec_read_otp(struct udevice *dev, u32 *val, u32 otp) static int stm32mp_bsec_read_shadow(struct udevice *dev, u32 *val, u32 otp) { - struct stm32mp_bsec_platdata *plat; + struct stm32mp_bsec_plat *plat; if (IS_ENABLED(CONFIG_TFABOOT)) return stm32_smc(STM32_SMC_BSEC, STM32_SMC_READ_SHADOW, otp, 0, val); - plat = dev_get_platdata(dev); + plat = dev_get_plat(dev); return bsec_read_shadow(plat->base, val, otp); } static int stm32mp_bsec_read_lock(struct udevice *dev, u32 *val, u32 otp) { - struct stm32mp_bsec_platdata *plat = dev_get_platdata(dev); + struct stm32mp_bsec_plat *plat = dev_get_plat(dev); /* return OTP permanent write lock status */ *val = bsec_read_lock(plat->base + BSEC_WRLOCK_OFF, otp); @@ -343,14 +343,14 @@ static int stm32mp_bsec_read_lock(struct udevice *dev, u32 *val, u32 otp) static int stm32mp_bsec_write_otp(struct udevice *dev, u32 val, u32 otp) { - struct stm32mp_bsec_platdata *plat; + struct stm32mp_bsec_plat *plat; if (IS_ENABLED(CONFIG_TFABOOT)) return stm32_smc_exec(STM32_SMC_BSEC, STM32_SMC_PROG_OTP, otp, val); - plat = dev_get_platdata(dev); + plat = dev_get_plat(dev); return bsec_program_otp(plat->base, val, otp); @@ -358,14 +358,14 @@ static int stm32mp_bsec_write_otp(struct udevice *dev, u32 val, u32 otp) static int stm32mp_bsec_write_shadow(struct udevice *dev, u32 val, u32 otp) { - struct stm32mp_bsec_platdata *plat; + struct stm32mp_bsec_plat *plat; if (IS_ENABLED(CONFIG_TFABOOT)) return stm32_smc_exec(STM32_SMC_BSEC, STM32_SMC_WRITE_SHADOW, otp, val); - plat = dev_get_platdata(dev); + plat = dev_get_plat(dev); return bsec_write_shadow(plat->base, val, otp); } @@ -473,9 +473,9 @@ static const struct misc_ops stm32mp_bsec_ops = { .write = stm32mp_bsec_write, }; -static int stm32mp_bsec_ofdata_to_platdata(struct udevice *dev) +static int stm32mp_bsec_of_to_plat(struct udevice *dev) { - struct stm32mp_bsec_platdata *plat = dev_get_platdata(dev); + struct stm32mp_bsec_plat *plat = dev_get_plat(dev); plat->base = (u32)dev_read_addr_ptr(dev); @@ -485,7 +485,7 @@ static int stm32mp_bsec_ofdata_to_platdata(struct udevice *dev) static int stm32mp_bsec_probe(struct udevice *dev) { int otp; - struct stm32mp_bsec_platdata *plat; + struct stm32mp_bsec_plat *plat; /* * update unlocked shadow for OTP cleared by the rom code @@ -493,7 +493,7 @@ static int stm32mp_bsec_probe(struct udevice *dev) */ if (!IS_ENABLED(CONFIG_TFABOOT) && !IS_ENABLED(CONFIG_SPL_BUILD)) { - plat = dev_get_platdata(dev); + plat = dev_get_plat(dev); for (otp = 57; otp <= BSEC_OTP_MAX_VALUE; otp++) if (!bsec_read_SR_lock(plat->base, otp)) @@ -512,8 +512,8 @@ U_BOOT_DRIVER(stm32mp_bsec) = { .name = "stm32mp_bsec", .id = UCLASS_MISC, .of_match = stm32mp_bsec_ids, - .ofdata_to_platdata = stm32mp_bsec_ofdata_to_platdata, - .platdata_auto_alloc_size = sizeof(struct stm32mp_bsec_platdata), + .of_to_plat = stm32mp_bsec_of_to_plat, + .plat_auto = sizeof(struct stm32mp_bsec_plat), .ops = &stm32mp_bsec_ops, .probe = stm32mp_bsec_probe, }; @@ -521,7 +521,7 @@ U_BOOT_DRIVER(stm32mp_bsec) = { bool bsec_dbgswenable(void) { struct udevice *dev; - struct stm32mp_bsec_platdata *plat; + struct stm32mp_bsec_plat *plat; int ret; ret = uclass_get_device_by_driver(UCLASS_MISC, @@ -531,7 +531,7 @@ bool bsec_dbgswenable(void) return false; } - plat = dev_get_platdata(dev); + plat = dev_get_plat(dev); if (readl(plat->base + BSEC_DENABLE_OFF) & BSEC_DENABLE_DBGSWENABLE) return true; diff --git a/arch/arm/mach-stm32mp/pwr_regulator.c b/arch/arm/mach-stm32mp/pwr_regulator.c index 900dee4c38..74a5df5948 100644 --- a/arch/arm/mach-stm32mp/pwr_regulator.c +++ b/arch/arm/mach-stm32mp/pwr_regulator.c @@ -59,7 +59,7 @@ static int stm32mp_pwr_read(struct udevice *dev, uint reg, uint8_t *buff, return 0; } -static int stm32mp_pwr_ofdata_to_platdata(struct udevice *dev) +static int stm32mp_pwr_of_to_plat(struct udevice *dev) { struct stm32mp_pwr_priv *priv = dev_get_priv(dev); @@ -103,8 +103,8 @@ U_BOOT_DRIVER(stm32mp_pwr_pmic) = { .of_match = stm32mp_pwr_ids, .bind = stm32mp_pwr_bind, .ops = &stm32mp_pwr_ops, - .ofdata_to_platdata = stm32mp_pwr_ofdata_to_platdata, - .priv_auto_alloc_size = sizeof(struct stm32mp_pwr_priv), + .of_to_plat = stm32mp_pwr_of_to_plat, + .priv_auto = sizeof(struct stm32mp_pwr_priv), }; static const struct stm32mp_pwr_reg_info stm32mp_pwr_reg11 = { @@ -135,9 +135,9 @@ static const struct stm32mp_pwr_reg_info *stm32mp_pwr_reg_infos[] = { static int stm32mp_pwr_regulator_probe(struct udevice *dev) { const struct stm32mp_pwr_reg_info **p = stm32mp_pwr_reg_infos; - struct dm_regulator_uclass_platdata *uc_pdata; + struct dm_regulator_uclass_plat *uc_pdata; - uc_pdata = dev_get_uclass_platdata(dev); + uc_pdata = dev_get_uclass_plat(dev); while (*p) { int rc; @@ -172,9 +172,9 @@ static int stm32mp_pwr_regulator_probe(struct udevice *dev) static int stm32mp_pwr_regulator_set_value(struct udevice *dev, int uV) { - struct dm_regulator_uclass_platdata *uc_pdata; + struct dm_regulator_uclass_plat *uc_pdata; - uc_pdata = dev_get_uclass_platdata(dev); + uc_pdata = dev_get_uclass_plat(dev); if (!uc_pdata) return -ENXIO; @@ -188,9 +188,9 @@ static int stm32mp_pwr_regulator_set_value(struct udevice *dev, int uV) static int stm32mp_pwr_regulator_get_value(struct udevice *dev) { - struct dm_regulator_uclass_platdata *uc_pdata; + struct dm_regulator_uclass_plat *uc_pdata; - uc_pdata = dev_get_uclass_platdata(dev); + uc_pdata = dev_get_uclass_plat(dev); if (!uc_pdata) return -ENXIO; diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c index 03faacbd57..bf01aa5ee8 100644 --- a/arch/arm/mach-tegra/board.c +++ b/arch/arm/mach-tegra/board.c @@ -257,7 +257,7 @@ void board_init_uart_f(void) } #if !CONFIG_IS_ENABLED(OF_CONTROL) -static struct ns16550_platdata ns16550_com1_pdata = { +static struct ns16550_plat ns16550_com1_pdata = { .base = CONFIG_SYS_NS16550_COM1, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK, diff --git a/arch/riscv/include/asm/arch-fu540/gpio.h b/arch/riscv/include/asm/arch-fu540/gpio.h index 0d16c59ca6..b87282b974 100644 --- a/arch/riscv/include/asm/arch-fu540/gpio.h +++ b/arch/riscv/include/asm/arch-fu540/gpio.h @@ -28,7 +28,7 @@ enum gpio_state { }; /* Details about a GPIO bank */ -struct sifive_gpio_platdata { +struct sifive_gpio_plat { void *base; /* address of registers in physical memory */ }; diff --git a/arch/riscv/include/asm/arch-generic/gpio.h b/arch/riscv/include/asm/arch-generic/gpio.h index dfcb753051..b1f403027d 100644 --- a/arch/riscv/include/asm/arch-generic/gpio.h +++ b/arch/riscv/include/asm/arch-generic/gpio.h @@ -28,7 +28,7 @@ enum gpio_state { }; /* Details about a GPIO bank */ -struct sifive_gpio_platdata { +struct sifive_gpio_plat { void *base; /* address of registers in physical memory */ }; diff --git a/arch/sandbox/Kconfig b/arch/sandbox/Kconfig index 65f988e736..f83282d9d5 100644 --- a/arch/sandbox/Kconfig +++ b/arch/sandbox/Kconfig @@ -51,6 +51,15 @@ config HOST_64BIT endchoice +config SANDBOX_CRASH_RESET + bool "Reset on crash" + help + If an illegal instruction or an illegal memory access occurs, the + sandbox by default writes a crash dump and exits. If you set this + flag, the sandbox is reset instead. This may be useful when running + test suites like the UEFI self certification test which continue + with the next test after a crash. + config SANDBOX_BITS_PER_LONG int default 32 if HOST_32BIT diff --git a/arch/sandbox/cpu/os.c b/arch/sandbox/cpu/os.c index 0d8efd83f6..b56fa04a34 100644 --- a/arch/sandbox/cpu/os.c +++ b/arch/sandbox/cpu/os.c @@ -3,6 +3,8 @@ * Copyright (c) 2011 The Chromium OS Authors. */ +#define _GNU_SOURCE + #include <dirent.h> #include <errno.h> #include <fcntl.h> @@ -15,11 +17,13 @@ #include <string.h> #include <termios.h> #include <time.h> +#include <ucontext.h> #include <unistd.h> #include <sys/mman.h> #include <sys/stat.h> #include <sys/time.h> #include <sys/types.h> +#include <linux/compiler_attributes.h> #include <linux/types.h> #include <asm/getopt.h> @@ -191,6 +195,42 @@ static void os_sigint_handler(int sig) raise(SIGINT); } +static void os_signal_handler(int sig, siginfo_t *info, void *con) +{ + ucontext_t __maybe_unused *context = con; + unsigned long pc; + +#if defined(__x86_64__) + pc = context->uc_mcontext.gregs[REG_RIP]; +#elif defined(__aarch64__) + pc = context->uc_mcontext.pc; +#elif defined(__riscv) + pc = context->uc_mcontext.__gregs[REG_PC]; +#else + const char msg[] = + "\nUnsupported architecture, cannot read program counter\n"; + + os_write(1, msg, sizeof(msg)); + pc = 0; +#endif + + os_signal_action(sig, pc); +} + +int os_setup_signal_handlers(void) +{ + struct sigaction act; + + act.sa_sigaction = os_signal_handler; + sigemptyset(&act.sa_mask); + act.sa_flags = SA_SIGINFO | SA_NODEFER; + if (sigaction(SIGILL, &act, NULL) || + sigaction(SIGBUS, &act, NULL) || + sigaction(SIGSEGV, &act, NULL)) + return -1; + return 0; +} + /* Put tty into raw mode so <tab> and <ctrl+c> work */ void os_tty_raw(int fd, bool allow_sigs) { diff --git a/arch/sandbox/cpu/start.c b/arch/sandbox/cpu/start.c index a03e5aa0b3..f6c98545e0 100644 --- a/arch/sandbox/cpu/start.c +++ b/arch/sandbox/cpu/start.c @@ -451,6 +451,10 @@ int main(int argc, char *argv[]) if (ret) goto err; + ret = os_setup_signal_handlers(); + if (ret) + goto err; + #if CONFIG_VAL(SYS_MALLOC_F_LEN) gd->malloc_base = CONFIG_MALLOC_F_ADDR; #endif diff --git a/arch/sandbox/lib/interrupts.c b/arch/sandbox/lib/interrupts.c index 21f761ac3b..9c2c60b8c6 100644 --- a/arch/sandbox/lib/interrupts.c +++ b/arch/sandbox/lib/interrupts.c @@ -6,7 +6,13 @@ */ #include <common.h> +#include <efi_loader.h> #include <irq_func.h> +#include <os.h> +#include <asm-generic/signal.h> +#include <asm/u-boot-sandbox.h> + +DECLARE_GLOBAL_DATA_PTR; int interrupt_init(void) { @@ -21,3 +27,32 @@ int disable_interrupts(void) { return 0; } + +void os_signal_action(int sig, unsigned long pc) +{ + efi_restore_gd(); + + switch (sig) { + case SIGILL: + printf("\nIllegal instruction\n"); + break; + case SIGBUS: + printf("\nBus error\n"); + break; + case SIGSEGV: + printf("\nSegmentation violation\n"); + break; + default: + break; + } + printf("pc = 0x%lx, ", pc); + printf("pc_reloc = 0x%lx\n\n", pc - gd->reloc_off); + efi_print_image_infos((void *)pc); + + if (IS_ENABLED(CONFIG_SANDBOX_CRASH_RESET)) { + printf("resetting ...\n\n"); + sandbox_reset(); + } else { + sandbox_exit(); + } +} diff --git a/arch/x86/cpu/acpi_gpe.c b/arch/x86/cpu/acpi_gpe.c index 70badb15a3..83128c33c2 100644 --- a/arch/x86/cpu/acpi_gpe.c +++ b/arch/x86/cpu/acpi_gpe.c @@ -51,7 +51,7 @@ static int acpi_gpe_read_and_clear(struct irq *irq) return ret; } -static int acpi_gpe_ofdata_to_platdata(struct udevice *dev) +static int acpi_gpe_of_to_plat(struct udevice *dev) { struct acpi_gpe_priv *priv = dev_get_priv(dev); @@ -107,6 +107,6 @@ U_BOOT_DRIVER(acpi_gpe_drv) = { .id = UCLASS_IRQ, .of_match = acpi_gpe_ids, .ops = &acpi_gpe_ops, - .ofdata_to_platdata = acpi_gpe_ofdata_to_platdata, - .priv_auto_alloc_size = sizeof(struct acpi_gpe_priv), + .of_to_plat = acpi_gpe_of_to_plat, + .priv_auto = sizeof(struct acpi_gpe_priv), }; diff --git a/arch/x86/cpu/apollolake/hostbridge.c b/arch/x86/cpu/apollolake/hostbridge.c index cafd9d65b2..e4674f3788 100644 --- a/arch/x86/cpu/apollolake/hostbridge.c +++ b/arch/x86/cpu/apollolake/hostbridge.c @@ -42,7 +42,7 @@ enum { }; /** - * struct apl_hostbridge_platdata - platform data for hostbridge + * struct apl_hostbridge_plat - platform data for hostbridge * * @dtplat: Platform data for of-platdata * @early_pads: Early pad data to set up, each (pad, cfg0, cfg1) @@ -50,7 +50,7 @@ enum { * @pciex_region_size: BAR length in bytes * @bdf: Bus/device/function of hostbridge */ -struct apl_hostbridge_platdata { +struct apl_hostbridge_plat { #if CONFIG_IS_ENABLED(OF_PLATDATA) struct dtd_intel_apl_hostbridge dtplat; #endif @@ -158,7 +158,7 @@ static const struct nhlt_endp_descriptor dmic_4ch_descriptors[] = { static int apl_hostbridge_early_init_pinctrl(struct udevice *dev) { - struct apl_hostbridge_platdata *plat = dev_get_platdata(dev); + struct apl_hostbridge_plat *plat = dev_get_plat(dev); struct udevice *pinctrl; int ret; @@ -172,7 +172,7 @@ static int apl_hostbridge_early_init_pinctrl(struct udevice *dev) static int apl_hostbridge_early_init(struct udevice *dev) { - struct apl_hostbridge_platdata *plat = dev_get_platdata(dev); + struct apl_hostbridge_plat *plat = dev_get_plat(dev); u32 region_size; ulong base; u32 reg; @@ -221,9 +221,9 @@ static int apl_hostbridge_early_init(struct udevice *dev) return 0; } -static int apl_hostbridge_ofdata_to_platdata(struct udevice *dev) +static int apl_hostbridge_of_to_plat(struct udevice *dev) { - struct apl_hostbridge_platdata *plat = dev_get_platdata(dev); + struct apl_hostbridge_plat *plat = dev_get_plat(dev); struct udevice *pinctrl; int ret; @@ -400,10 +400,10 @@ U_BOOT_DRIVER(intel_apl_hostbridge) = { .name = "intel_apl_hostbridge", .id = UCLASS_NORTHBRIDGE, .of_match = apl_hostbridge_ids, - .ofdata_to_platdata = apl_hostbridge_ofdata_to_platdata, + .of_to_plat = apl_hostbridge_of_to_plat, .probe = apl_hostbridge_probe, .remove = apl_hostbridge_remove, - .platdata_auto_alloc_size = sizeof(struct apl_hostbridge_platdata), + .plat_auto = sizeof(struct apl_hostbridge_plat), ACPI_OPS_PTR(&apl_hostbridge_acpi_ops) .flags = DM_FLAG_OS_PREPARE, }; diff --git a/arch/x86/cpu/apollolake/pmc.c b/arch/x86/cpu/apollolake/pmc.c index cacaa007e0..290b2cb3e7 100644 --- a/arch/x86/cpu/apollolake/pmc.c +++ b/arch/x86/cpu/apollolake/pmc.c @@ -53,7 +53,7 @@ enum { CF9_GLB_RST = 1 << 20, }; -struct apl_pmc_platdata { +struct apl_pmc_plat { #if CONFIG_IS_ENABLED(OF_PLATDATA) struct dtd_intel_apl_pmc dtplat; #endif @@ -108,10 +108,10 @@ static int apl_global_reset_set_enable(struct udevice *dev, bool enable) return 0; } -int apl_pmc_ofdata_to_uc_platdata(struct udevice *dev) +int apl_pmc_ofdata_to_uc_plat(struct udevice *dev) { struct acpi_pmc_upriv *upriv = dev_get_uclass_priv(dev); - struct apl_pmc_platdata *plat = dev_get_platdata(dev); + struct apl_pmc_plat *plat = dev_get_plat(dev); #if !CONFIG_IS_ENABLED(OF_PLATDATA) u32 base[6]; @@ -144,7 +144,7 @@ int apl_pmc_ofdata_to_uc_platdata(struct udevice *dev) if (ret) return log_msg_ret("Bad gpe0-dw", ret); - return pmc_ofdata_to_uc_platdata(dev); + return pmc_ofdata_to_uc_plat(dev); #else struct dtd_intel_apl_pmc *dtplat = &plat->dtplat; @@ -169,7 +169,7 @@ int apl_pmc_ofdata_to_uc_platdata(struct udevice *dev) static int enable_pmcbar(struct udevice *dev) { struct acpi_pmc_upriv *upriv = dev_get_uclass_priv(dev); - struct apl_pmc_platdata *priv = dev_get_platdata(dev); + struct apl_pmc_plat *priv = dev_get_plat(dev); pci_dev_t pmc = priv->bdf; /* @@ -221,8 +221,8 @@ U_BOOT_DRIVER(intel_apl_pmc) = { .name = "intel_apl_pmc", .id = UCLASS_ACPI_PMC, .of_match = apl_pmc_ids, - .ofdata_to_platdata = apl_pmc_ofdata_to_uc_platdata, + .of_to_plat = apl_pmc_ofdata_to_uc_plat, .probe = apl_pmc_probe, .ops = &apl_pmc_ops, - .platdata_auto_alloc_size = sizeof(struct apl_pmc_platdata), + .plat_auto = sizeof(struct apl_pmc_plat), }; diff --git a/arch/x86/cpu/apollolake/spl.c b/arch/x86/cpu/apollolake/spl.c index 089b37c59f..3a1588bbd8 100644 --- a/arch/x86/cpu/apollolake/spl.c +++ b/arch/x86/cpu/apollolake/spl.c @@ -85,14 +85,14 @@ static int apl_flash_probe(struct udevice *dev) /* * Manually set the parent of the SPI flash to SPI, since dtoc doesn't. We also - * need to allocate the parent_platdata since by the time this function is + * need to allocate the parent_plat since by the time this function is * called device_bind() has already gone past that step. */ static int apl_flash_bind(struct udevice *dev) { if (CONFIG_IS_ENABLED(OF_PLATDATA) && !CONFIG_IS_ENABLED(OF_PLATDATA_PARENT)) { - struct dm_spi_slave_platdata *plat; + struct dm_spi_slave_plat *plat; struct udevice *spi; int ret; @@ -104,7 +104,7 @@ static int apl_flash_bind(struct udevice *dev) plat = calloc(sizeof(*plat), 1); if (!plat) return -ENOMEM; - dev->parent_platdata = plat; + dev->parent_plat = plat; } return 0; @@ -125,7 +125,7 @@ U_BOOT_DRIVER(winbond_w25q128fw) = { .of_match = apl_flash_ids, .bind = apl_flash_bind, .probe = apl_flash_probe, - .priv_auto_alloc_size = sizeof(struct spi_flash), + .priv_auto = sizeof(struct spi_flash), .ops = &apl_flash_ops, }; diff --git a/arch/x86/cpu/apollolake/uart.c b/arch/x86/cpu/apollolake/uart.c index c522aa9780..26aef655be 100644 --- a/arch/x86/cpu/apollolake/uart.c +++ b/arch/x86/cpu/apollolake/uart.c @@ -68,16 +68,16 @@ void apl_uart_init(pci_dev_t bdf, ulong base) * This driver uses its own compatible string but almost everything else from * the standard ns16550 driver. This allows us to provide an of-platdata * implementation, since the platdata produced by of-platdata does not match - * struct ns16550_platdata. + * struct ns16550_plat. * * When running with of-platdata (generally TPL), the platdata is converted to * something that ns16550 expects. When running withoutof-platdata (SPL, U-Boot - * proper), we use ns16550's ofdata_to_platdata routine. + * proper), we use ns16550's of_to_plat routine. */ static int apl_ns16550_probe(struct udevice *dev) { - struct ns16550_platdata *plat = dev_get_platdata(dev); + struct ns16550_plat *plat = dev_get_plat(dev); if (!CONFIG_IS_ENABLED(PCI)) apl_uart_init(plat->bdf, plat->base); @@ -85,14 +85,14 @@ static int apl_ns16550_probe(struct udevice *dev) return ns16550_serial_probe(dev); } -static int apl_ns16550_ofdata_to_platdata(struct udevice *dev) +static int apl_ns16550_of_to_plat(struct udevice *dev) { #if CONFIG_IS_ENABLED(OF_PLATDATA) - struct dtd_intel_apl_ns16550 *dtplat = dev_get_platdata(dev); - struct ns16550_platdata *plat; + struct dtd_intel_apl_ns16550 *dtplat = dev_get_plat(dev); + struct ns16550_plat *plat; /* - * Convert our platdata to the ns16550's platdata, so we can just use + * Convert our plat to the ns16550's plat, so we can just use * that driver */ plat = malloc(sizeof(*plat)); @@ -105,11 +105,11 @@ static int apl_ns16550_ofdata_to_platdata(struct udevice *dev) plat->clock = dtplat->clock_frequency; plat->fcr = UART_FCR_DEFVAL; plat->bdf = pci_ofplat_get_devfn(dtplat->reg[0]); - dev->platdata = plat; + dev->plat = plat; #else int ret; - ret = ns16550_serial_ofdata_to_platdata(dev); + ret = ns16550_serial_of_to_plat(dev); if (ret) return ret; #endif /* OF_PLATDATA */ @@ -126,9 +126,9 @@ U_BOOT_DRIVER(intel_apl_ns16550) = { .name = "intel_apl_ns16550", .id = UCLASS_SERIAL, .of_match = apl_ns16550_serial_ids, - .platdata_auto_alloc_size = sizeof(struct ns16550_platdata), - .priv_auto_alloc_size = sizeof(struct NS16550), + .plat_auto = sizeof(struct ns16550_plat), + .priv_auto = sizeof(struct NS16550), .ops = &ns16550_serial_ops, - .ofdata_to_platdata = apl_ns16550_ofdata_to_platdata, + .of_to_plat = apl_ns16550_of_to_plat, .probe = apl_ns16550_probe, }; diff --git a/arch/x86/cpu/broadwell/adsp.c b/arch/x86/cpu/broadwell/adsp.c index 41f7d5d4d1..1fa1823780 100644 --- a/arch/x86/cpu/broadwell/adsp.c +++ b/arch/x86/cpu/broadwell/adsp.c @@ -122,7 +122,7 @@ static int broadwell_adsp_probe(struct udevice *dev) return 0; } -static int broadwell_adsp_ofdata_to_platdata(struct udevice *dev) +static int broadwell_adsp_of_to_plat(struct udevice *dev) { struct broadwell_adsp_priv *priv = dev_get_priv(dev); @@ -142,7 +142,7 @@ static const struct udevice_id broadwell_adsp_ids[] = { U_BOOT_DRIVER(broadwell_adsp_drv) = { .name = "adsp", .id = UCLASS_SYSCON, - .ofdata_to_platdata = broadwell_adsp_ofdata_to_platdata, + .of_to_plat = broadwell_adsp_of_to_plat, .of_match = broadwell_adsp_ids, .bind = dm_scan_fdt_dev, .probe = broadwell_adsp_probe, diff --git a/arch/x86/cpu/broadwell/cpu_full.c b/arch/x86/cpu/broadwell/cpu_full.c index 706f68f63d..1ff4dce0b5 100644 --- a/arch/x86/cpu/broadwell/cpu_full.c +++ b/arch/x86/cpu/broadwell/cpu_full.c @@ -665,6 +665,6 @@ U_BOOT_DRIVER(cpu_x86_broadwell_drv) = { .bind = cpu_x86_bind, .probe = cpu_x86_broadwell_probe, .ops = &cpu_x86_broadwell_ops, - .priv_auto_alloc_size = sizeof(struct cpu_broadwell_priv), + .priv_auto = sizeof(struct cpu_broadwell_priv), .flags = DM_FLAG_PRE_RELOC, }; diff --git a/arch/x86/cpu/broadwell/sata.c b/arch/x86/cpu/broadwell/sata.c index 641da515c8..ceb395ddcf 100644 --- a/arch/x86/cpu/broadwell/sata.c +++ b/arch/x86/cpu/broadwell/sata.c @@ -17,7 +17,7 @@ #include <asm/arch/pch.h> #include <linux/delay.h> -struct sata_platdata { +struct sata_plat { int port_map; uint port0_gen3_tx; uint port1_gen3_tx; @@ -41,7 +41,7 @@ struct sata_platdata { static void broadwell_sata_init(struct udevice *dev) { - struct sata_platdata *plat = dev_get_platdata(dev); + struct sata_plat *plat = dev_get_plat(dev); u32 reg32; u8 *abar; u16 reg16; @@ -211,7 +211,7 @@ static void broadwell_sata_init(struct udevice *dev) static int broadwell_sata_enable(struct udevice *dev) { - struct sata_platdata *plat = dev_get_platdata(dev); + struct sata_plat *plat = dev_get_plat(dev); struct gpio_desc desc; u16 map; int ret; @@ -232,9 +232,9 @@ static int broadwell_sata_enable(struct udevice *dev) return 0; } -static int broadwell_sata_ofdata_to_platdata(struct udevice *dev) +static int broadwell_sata_of_to_plat(struct udevice *dev) { - struct sata_platdata *plat = dev_get_platdata(dev); + struct sata_plat *plat = dev_get_plat(dev); const void *blob = gd->fdt_blob; int node = dev_of_offset(dev); @@ -264,7 +264,7 @@ U_BOOT_DRIVER(ahci_broadwell_drv) = { .name = "ahci_broadwell", .id = UCLASS_AHCI, .of_match = broadwell_ahci_ids, - .ofdata_to_platdata = broadwell_sata_ofdata_to_platdata, + .of_to_plat = broadwell_sata_of_to_plat, .probe = broadwell_sata_probe, - .platdata_auto_alloc_size = sizeof(struct sata_platdata), + .plat_auto = sizeof(struct sata_plat), }; diff --git a/arch/x86/cpu/cpu_x86.c b/arch/x86/cpu/cpu_x86.c index 7e83051646..bfb511a510 100644 --- a/arch/x86/cpu/cpu_x86.c +++ b/arch/x86/cpu/cpu_x86.c @@ -13,7 +13,7 @@ DECLARE_GLOBAL_DATA_PTR; int cpu_x86_bind(struct udevice *dev) { - struct cpu_platdata *plat = dev_get_parent_platdata(dev); + struct cpu_plat *plat = dev_get_parent_plat(dev); struct cpuid_result res; plat->cpu_id = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), diff --git a/arch/x86/cpu/intel_common/itss.c b/arch/x86/cpu/intel_common/itss.c index de17b93ed4..e71ea029e5 100644 --- a/arch/x86/cpu/intel_common/itss.c +++ b/arch/x86/cpu/intel_common/itss.c @@ -19,7 +19,7 @@ #include <spl.h> #include <asm/itss.h> -struct itss_platdata { +struct itss_plat { #if CONFIG_IS_ENABLED(OF_PLATDATA) /* Put this first since driver model will copy the data here */ struct dtd_intel_itss dtplat; @@ -178,13 +178,13 @@ static int itss_bind(struct udevice *dev) return 0; } -static int itss_ofdata_to_platdata(struct udevice *dev) +static int itss_of_to_plat(struct udevice *dev) { struct itss_priv *priv = dev_get_priv(dev); int ret; #if CONFIG_IS_ENABLED(OF_PLATDATA) - struct itss_platdata *plat = dev_get_platdata(dev); + struct itss_plat *plat = dev_get_plat(dev); struct dtd_intel_itss *dtplat = &plat->dtplat; /* @@ -241,7 +241,7 @@ U_BOOT_DRIVER(intel_itss) = { .of_match = itss_ids, .ops = &itss_ops, .bind = itss_bind, - .ofdata_to_platdata = itss_ofdata_to_platdata, - .platdata_auto_alloc_size = sizeof(struct itss_platdata), - .priv_auto_alloc_size = sizeof(struct itss_priv), + .of_to_plat = itss_of_to_plat, + .plat_auto = sizeof(struct itss_plat), + .priv_auto = sizeof(struct itss_priv), }; diff --git a/arch/x86/cpu/intel_common/p2sb.c b/arch/x86/cpu/intel_common/p2sb.c index a0a4001e03..e6edab0b05 100644 --- a/arch/x86/cpu/intel_common/p2sb.c +++ b/arch/x86/cpu/intel_common/p2sb.c @@ -19,7 +19,7 @@ #define PCH_P2SB_E0 0xe0 #define HIDE_BIT BIT(0) -struct p2sb_platdata { +struct p2sb_plat { #if CONFIG_IS_ENABLED(OF_PLATDATA) struct dtd_intel_p2sb dtplat; #endif @@ -57,7 +57,7 @@ struct p2sb_platdata { */ static int p2sb_early_init(struct udevice *dev) { - struct p2sb_platdata *plat = dev_get_platdata(dev); + struct p2sb_plat *plat = dev_get_plat(dev); pci_dev_t pdev = plat->bdf; /* @@ -90,10 +90,10 @@ static int p2sb_spl_init(struct udevice *dev) return 0; } -int p2sb_ofdata_to_platdata(struct udevice *dev) +int p2sb_of_to_plat(struct udevice *dev) { struct p2sb_uc_priv *upriv = dev_get_uclass_priv(dev); - struct p2sb_platdata *plat = dev_get_platdata(dev); + struct p2sb_plat *plat = dev_get_plat(dev); #if !CONFIG_IS_ENABLED(OF_PLATDATA) int ret; @@ -167,7 +167,7 @@ static int p2sb_remove(struct udevice *dev) static int p2sb_child_post_bind(struct udevice *dev) { #if !CONFIG_IS_ENABLED(OF_PLATDATA) - struct p2sb_child_platdata *pplat = dev_get_parent_platdata(dev); + struct p2sb_child_plat *pplat = dev_get_parent_plat(dev); int ret; u32 pid; @@ -196,10 +196,9 @@ U_BOOT_DRIVER(intel_p2sb) = { .probe = p2sb_probe, .remove = p2sb_remove, .ops = &p2sb_ops, - .ofdata_to_platdata = p2sb_ofdata_to_platdata, - .platdata_auto_alloc_size = sizeof(struct p2sb_platdata), - .per_child_platdata_auto_alloc_size = - sizeof(struct p2sb_child_platdata), + .of_to_plat = p2sb_of_to_plat, + .plat_auto = sizeof(struct p2sb_plat), + .per_child_plat_auto = sizeof(struct p2sb_child_plat), .child_post_bind = p2sb_child_post_bind, .flags = DM_FLAG_OS_PREPARE, }; diff --git a/arch/x86/cpu/irq.c b/arch/x86/cpu/irq.c index 836a0e8b86..8b53b96822 100644 --- a/arch/x86/cpu/irq.c +++ b/arch/x86/cpu/irq.c @@ -362,5 +362,5 @@ U_BOOT_DRIVER(irq_router_drv) = { .id = UCLASS_IRQ, .of_match = irq_router_ids, .probe = irq_router_probe, - .priv_auto_alloc_size = sizeof(struct irq_router), + .priv_auto = sizeof(struct irq_router), }; diff --git a/arch/x86/cpu/mp_init.c b/arch/x86/cpu/mp_init.c index d2f1ee38cf..a0e112178d 100644 --- a/arch/x86/cpu/mp_init.c +++ b/arch/x86/cpu/mp_init.c @@ -221,7 +221,7 @@ static int find_cpu_by_apic_id(int apic_id, struct udevice **devp) for (uclass_find_first_device(UCLASS_CPU, &dev); dev; uclass_find_next_device(&dev)) { - struct cpu_platdata *plat = dev_get_parent_platdata(dev); + struct cpu_plat *plat = dev_get_parent_plat(dev); if (plat->cpu_id == apic_id) { *devp = dev; @@ -706,7 +706,7 @@ static int ap_wait_for_instruction(struct udevice *cpu, void *unused) static int mp_init_cpu(struct udevice *cpu, void *unused) { - struct cpu_platdata *plat = dev_get_parent_platdata(cpu); + struct cpu_plat *plat = dev_get_parent_plat(cpu); plat->ucode_version = microcode_read_rev(); plat->device_id = gd->arch.x86_device; diff --git a/arch/x86/cpu/qfw_cpu.c b/arch/x86/cpu/qfw_cpu.c index 349bab1583..a35de878b5 100644 --- a/arch/x86/cpu/qfw_cpu.c +++ b/arch/x86/cpu/qfw_cpu.c @@ -18,7 +18,7 @@ int qemu_cpu_fixup(void) int cpu_num; int cpu_online; struct udevice *dev, *pdev; - struct cpu_platdata *plat; + struct cpu_plat *plat; char *cpu; /* first we need to find '/cpus' */ @@ -67,7 +67,7 @@ int qemu_cpu_fixup(void) printf("binding cpu@%d failed: %d\n", cpu_num, ret); return ret; } - plat = dev_get_parent_platdata(dev); + plat = dev_get_parent_plat(dev); plat->cpu_id = cpu_num; } return 0; diff --git a/arch/x86/cpu/slimbootloader/serial.c b/arch/x86/cpu/slimbootloader/serial.c index 9813f7977b..5d8963220d 100644 --- a/arch/x86/cpu/slimbootloader/serial.c +++ b/arch/x86/cpu/slimbootloader/serial.c @@ -14,11 +14,11 @@ * The serial port info hob is generated by Slim Bootloader, so eligible for * Slim Bootloader based boards only. */ -static int slimbootloader_serial_ofdata_to_platdata(struct udevice *dev) +static int slimbootloader_serial_of_to_plat(struct udevice *dev) { const efi_guid_t guid = SBL_SERIAL_PORT_INFO_GUID; struct sbl_serial_port_info *data; - struct ns16550_platdata *plat = dev->platdata; + struct ns16550_plat *plat = dev->plat; if (!gd->arch.hob_list) panic("hob list not found!"); @@ -57,9 +57,9 @@ U_BOOT_DRIVER(serial_slimbootloader) = { .name = "serial_slimbootloader", .id = UCLASS_SERIAL, .of_match = slimbootloader_serial_ids, - .ofdata_to_platdata = slimbootloader_serial_ofdata_to_platdata, - .platdata_auto_alloc_size = sizeof(struct ns16550_platdata), - .priv_auto_alloc_size = sizeof(struct NS16550), + .of_to_plat = slimbootloader_serial_of_to_plat, + .plat_auto = sizeof(struct ns16550_plat), + .priv_auto = sizeof(struct NS16550), .probe = ns16550_serial_probe, .ops = &ns16550_serial_ops, }; diff --git a/arch/x86/cpu/tangier/pinmux.c b/arch/x86/cpu/tangier/pinmux.c index 5b0e106011..acf97e3af5 100644 --- a/arch/x86/cpu/tangier/pinmux.c +++ b/arch/x86/cpu/tangier/pinmux.c @@ -191,5 +191,5 @@ U_BOOT_DRIVER(tangier_pinctrl) = { .id = UCLASS_SYSCON, .of_match = tangier_pinctrl_match, .probe = tangier_pinctrl_probe, - .priv_auto_alloc_size = sizeof(struct mrfld_pinctrl), + .priv_auto = sizeof(struct mrfld_pinctrl), }; diff --git a/arch/x86/include/asm/arch-broadwell/gpio.h b/arch/x86/include/asm/arch-broadwell/gpio.h index a32e2db47e..393230e52b 100644 --- a/arch/x86/include/asm/arch-broadwell/gpio.h +++ b/arch/x86/include/asm/arch-broadwell/gpio.h @@ -11,7 +11,7 @@ #define GPIO_PER_BANK 32 #define GPIO_BANKS 3 -struct broadwell_bank_platdata { +struct broadwell_bank_plat { uint16_t base_addr; const char *bank_name; int bank; diff --git a/arch/x86/include/asm/gpio.h b/arch/x86/include/asm/gpio.h index 58e4d7b831..a45ae3463c 100644 --- a/arch/x86/include/asm/gpio.h +++ b/arch/x86/include/asm/gpio.h @@ -8,7 +8,7 @@ #include <asm-generic/gpio.h> -struct ich6_bank_platdata { +struct ich6_bank_plat { uint16_t base_addr; const char *bank_name; int offset; diff --git a/arch/x86/include/asm/intel_pinctrl.h b/arch/x86/include/asm/intel_pinctrl.h index 00868d1725..44eedc205c 100644 --- a/arch/x86/include/asm/intel_pinctrl.h +++ b/arch/x86/include/asm/intel_pinctrl.h @@ -162,16 +162,15 @@ extern const struct pinctrl_ops intel_pinctrl_ops; int intel_pinctrl_probe(struct udevice *dev); /** - * intel_pinctrl_ofdata_to_platdata() - Handle common platdata setup + * intel_pinctrl_of_to_plat() - Handle common plat setup * * @dev: Pinctrl device * @comm: Pad community for this device * @num_cfgs: Number of configuration words for each pad * @return 0 if OK, -EDOM if @comm is NULL, other -ve value on other error */ -int intel_pinctrl_ofdata_to_platdata(struct udevice *dev, - const struct pad_community *comm, - int num_cfgs); +int intel_pinctrl_of_to_plat(struct udevice *dev, + const struct pad_community *comm, int num_cfgs); /** * pinctrl_route_gpe() - set GPIO groups for the general-purpose-event blocks diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c index 4fd8dc8ad9..9a41ecb587 100644 --- a/arch/x86/lib/acpi_table.c +++ b/arch/x86/lib/acpi_table.c @@ -74,7 +74,7 @@ int acpi_create_madt_lapics(u32 current) for (uclass_find_first_device(UCLASS_CPU, &dev); dev; uclass_find_next_device(&dev)) { - struct cpu_platdata *plat = dev_get_parent_platdata(dev); + struct cpu_plat *plat = dev_get_parent_plat(dev); int length; length = acpi_create_madt_lapic( diff --git a/arch/x86/lib/fsp/fsp_graphics.c b/arch/x86/lib/fsp/fsp_graphics.c index 6534b6690b..a029237d08 100644 --- a/arch/x86/lib/fsp/fsp_graphics.c +++ b/arch/x86/lib/fsp/fsp_graphics.c @@ -80,7 +80,7 @@ static int save_vesa_mode(struct vesa_mode_info *vesa) static int fsp_video_probe(struct udevice *dev) { - struct video_uc_platdata *plat = dev_get_uclass_platdata(dev); + struct video_uc_plat *plat = dev_get_uclass_plat(dev); struct video_priv *uc_priv = dev_get_uclass_priv(dev); struct vesa_mode_info *vesa = &mode_info.vesa; int ret; @@ -124,7 +124,7 @@ err: static int fsp_video_bind(struct udevice *dev) { - struct video_uc_platdata *plat = dev_get_uclass_platdata(dev); + struct video_uc_plat *plat = dev_get_uclass_plat(dev); /* Set the maximum supported resolution */ plat->size = 2560 * 1600 * 4; diff --git a/arch/x86/lib/mpspec.c b/arch/x86/lib/mpspec.c index 1c49c41b31..562a27c557 100644 --- a/arch/x86/lib/mpspec.c +++ b/arch/x86/lib/mpspec.c @@ -81,7 +81,7 @@ void mp_write_processor(struct mp_config_table *mc) for (uclass_find_first_device(UCLASS_CPU, &dev); dev; uclass_find_next_device(&dev)) { - struct cpu_platdata *plat = dev_get_parent_platdata(dev); + struct cpu_plat *plat = dev_get_parent_plat(dev); u8 cpuflag = MPC_CPU_EN; if (!device_active(dev)) diff --git a/arch/x86/lib/pmu.c b/arch/x86/lib/pmu.c index 3cd7b1f536..083aec8d8d 100644 --- a/arch/x86/lib/pmu.c +++ b/arch/x86/lib/pmu.c @@ -113,5 +113,5 @@ U_BOOT_DRIVER(intel_mid_pmu) = { .id = UCLASS_SYSCON, .of_match = pmu_mid_match, .probe = pmu_mid_probe, - .priv_auto_alloc_size = sizeof(struct pmu_mid), + .priv_auto = sizeof(struct pmu_mid), }; diff --git a/arch/x86/lib/scu.c b/arch/x86/lib/scu.c index d29d701631..90ef239bcd 100644 --- a/arch/x86/lib/scu.c +++ b/arch/x86/lib/scu.c @@ -227,5 +227,5 @@ U_BOOT_DRIVER(scu_ipc) = { .id = UCLASS_SYSCON, .of_match = scu_ipc_match, .probe = scu_ipc_probe, - .priv_auto_alloc_size = sizeof(struct scu), + .priv_auto = sizeof(struct scu), }; diff --git a/arch/x86/lib/sfi.c b/arch/x86/lib/sfi.c index b48bd5d8f3..85e963b634 100644 --- a/arch/x86/lib/sfi.c +++ b/arch/x86/lib/sfi.c @@ -84,7 +84,7 @@ static int sfi_write_cpus(struct table_info *tab) for (uclass_find_first_device(UCLASS_CPU, &dev); dev; uclass_find_next_device(&dev)) { - struct cpu_platdata *plat = dev_get_parent_platdata(dev); + struct cpu_plat *plat = dev_get_parent_plat(dev); if (!device_active(dev)) continue; |