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-rw-r--r--arch/arm/dts/k3-am625-verdin-wifi-dev-binman.dtsi66
-rw-r--r--arch/arm/dts/k3-binman.dtsi28
-rw-r--r--arch/arm/mach-k3/arm64-mmu.c271
-rw-r--r--arch/arm/mach-k3/schema.yaml436
4 files changed, 453 insertions, 348 deletions
diff --git a/arch/arm/dts/k3-am625-verdin-wifi-dev-binman.dtsi b/arch/arm/dts/k3-am625-verdin-wifi-dev-binman.dtsi
index 78c371529a..4e3704809a 100644
--- a/arch/arm/dts/k3-am625-verdin-wifi-dev-binman.dtsi
+++ b/arch/arm/dts/k3-am625-verdin-wifi-dev-binman.dtsi
@@ -5,72 +5,6 @@
#include "k3-binman.dtsi"
-#ifndef CONFIG_ARM64
-
-&bcfg_yaml {
- schema = "../../ti/common/schema.yaml";
-};
-
-&pcfg_yaml {
- schema = "../../ti/common/schema.yaml";
-};
-
-&rcfg_yaml {
- schema = "../../ti/common/schema.yaml";
-};
-
-&scfg_yaml {
- schema = "../../ti/common/schema.yaml";
-};
-
-/* combined-tifs-cfg */
-
-&bcfg_yaml_tifs {
- schema = "../../ti/common/schema.yaml";
-};
-
-&pcfg_yaml_tifs {
- schema = "../../ti/common/schema.yaml";
-};
-
-&rcfg_yaml_tifs {
- schema = "../../ti/common/schema.yaml";
-};
-
-&scfg_yaml_tifs {
- schema = "../../ti/common/schema.yaml";
-};
-
-/* combined-dm-cfg */
-
-&pcfg_yaml_dm {
- schema = "../../ti/common/schema.yaml";
-};
-
-&rcfg_yaml_dm {
- schema = "../../ti/common/schema.yaml";
-};
-
-/* combined-sysfw-cfg */
-
-&bcfg_yaml_sysfw {
- schema = "../../ti/common/schema.yaml";
-};
-
-&pcfg_yaml_sysfw {
- schema = "../../ti/common/schema.yaml";
-};
-
-&rcfg_yaml_sysfw {
- schema = "../../ti/common/schema.yaml";
-};
-
-&scfg_yaml_sysfw {
- schema = "../../ti/common/schema.yaml";
-};
-
-#endif /* CONFIG_ARM64 */
-
#ifdef CONFIG_TARGET_VERDIN_AM62_R5
&binman {
diff --git a/arch/arm/dts/k3-binman.dtsi b/arch/arm/dts/k3-binman.dtsi
index c7513e1a5d..cd9926a016 100644
--- a/arch/arm/dts/k3-binman.dtsi
+++ b/arch/arm/dts/k3-binman.dtsi
@@ -32,28 +32,28 @@
filename = "board-cfg.bin";
bcfg_yaml: ti-board-config {
config = "board-cfg.yaml";
- schema = "board/ti/common/schema.yaml";
+ schema = "arch/arm/mach-k3/schema.yaml";
};
};
pm-cfg {
filename = "pm-cfg.bin";
pcfg_yaml: ti-board-config {
config = "pm-cfg.yaml";
- schema = "board/ti/common/schema.yaml";
+ schema = "arch/arm/mach-k3/schema.yaml";
};
};
rm-cfg {
filename = "rm-cfg.bin";
rcfg_yaml: ti-board-config {
config = "rm-cfg.yaml";
- schema = "board/ti/common/schema.yaml";
+ schema = "arch/arm/mach-k3/schema.yaml";
};
};
sec-cfg {
filename = "sec-cfg.bin";
scfg_yaml: ti-board-config {
config = "sec-cfg.yaml";
- schema = "board/ti/common/schema.yaml";
+ schema = "arch/arm/mach-k3/schema.yaml";
};
};
combined-tifs-cfg {
@@ -61,19 +61,19 @@
ti-board-config {
bcfg_yaml_tifs: board-cfg {
config = "board-cfg.yaml";
- schema = "board/ti/common/schema.yaml";
+ schema = "arch/arm/mach-k3/schema.yaml";
};
scfg_yaml_tifs: sec-cfg {
config = "sec-cfg.yaml";
- schema = "board/ti/common/schema.yaml";
+ schema = "arch/arm/mach-k3/schema.yaml";
};
pcfg_yaml_tifs: pm-cfg {
config = "pm-cfg.yaml";
- schema = "board/ti/common/schema.yaml";
+ schema = "arch/arm/mach-k3/schema.yaml";
};
rcfg_yaml_tifs: rm-cfg {
config = "rm-cfg.yaml";
- schema = "board/ti/common/schema.yaml";
+ schema = "arch/arm/mach-k3/schema.yaml";
};
};
};
@@ -82,11 +82,11 @@
ti-board-config {
pcfg_yaml_dm: pm-cfg {
config = "pm-cfg.yaml";
- schema = "board/ti/common/schema.yaml";
+ schema = "arch/arm/mach-k3/schema.yaml";
};
rcfg_yaml_dm: rm-cfg {
config = "rm-cfg.yaml";
- schema = "board/ti/common/schema.yaml";
+ schema = "arch/arm/mach-k3/schema.yaml";
};
};
};
@@ -95,19 +95,19 @@
ti-board-config {
bcfg_yaml_sysfw: board-cfg {
config = "board-cfg.yaml";
- schema = "board/ti/common/schema.yaml";
+ schema = "arch/arm/mach-k3/schema.yaml";
};
scfg_yaml_sysfw: sec-cfg {
config = "sec-cfg.yaml";
- schema = "board/ti/common/schema.yaml";
+ schema = "arch/arm/mach-k3/schema.yaml";
};
pcfg_yaml_sysfw: pm-cfg {
config = "pm-cfg.yaml";
- schema = "board/ti/common/schema.yaml";
+ schema = "arch/arm/mach-k3/schema.yaml";
};
rcfg_yaml_sysfw: rm-cfg {
config = "rm-cfg.yaml";
- schema = "board/ti/common/schema.yaml";
+ schema = "arch/arm/mach-k3/schema.yaml";
};
};
};
diff --git a/arch/arm/mach-k3/arm64-mmu.c b/arch/arm/mach-k3/arm64-mmu.c
index e8db5332ae..b4308205b2 100644
--- a/arch/arm/mach-k3/arm64-mmu.c
+++ b/arch/arm/mach-k3/arm64-mmu.c
@@ -12,119 +12,7 @@
#include <asm/system.h>
#include <asm/armv8/mmu.h>
-#ifdef CONFIG_SOC_K3_AM654
-/* NR_DRAM_BANKS + 32bit IO + 64bit IO + terminator */
-#define NR_MMU_REGIONS (CONFIG_NR_DRAM_BANKS + 5)
-
-/* ToDo: Add 64bit IO */
-struct mm_region am654_mem_map[NR_MMU_REGIONS] = {
- {
- .virt = 0x0UL,
- .phys = 0x0UL,
- .size = 0x80000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
- PTE_BLOCK_NON_SHARE |
- PTE_BLOCK_PXN | PTE_BLOCK_UXN
- }, {
- .virt = 0x80000000UL,
- .phys = 0x80000000UL,
- .size = 0x20000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
- PTE_BLOCK_INNER_SHARE
- }, {
- .virt = 0xa0000000UL,
- .phys = 0xa0000000UL,
- .size = 0x02100000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL_NC) |
- PTE_BLOCK_INNER_SHARE
- }, {
- .virt = 0xa2100000UL,
- .phys = 0xa2100000UL,
- .size = 0x5df00000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
- PTE_BLOCK_INNER_SHARE
- }, {
- .virt = 0x880000000UL,
- .phys = 0x880000000UL,
- .size = 0x80000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
- PTE_BLOCK_INNER_SHARE
- }, {
- .virt = 0x500000000UL,
- .phys = 0x500000000UL,
- .size = 0x400000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
- PTE_BLOCK_NON_SHARE |
- PTE_BLOCK_PXN | PTE_BLOCK_UXN
- }, {
- /* List terminator */
- 0,
- }
-};
-
-struct mm_region *mem_map = am654_mem_map;
-#endif /* CONFIG_SOC_K3_AM654 */
-
-#ifdef CONFIG_SOC_K3_J721E
-
-#ifdef CONFIG_SOC_K3_J721E_J7200
-#define NR_MMU_REGIONS (CONFIG_NR_DRAM_BANKS + 5)
-
-/* ToDo: Add 64bit IO */
-struct mm_region j7200_mem_map[NR_MMU_REGIONS] = {
- {
- .virt = 0x0UL,
- .phys = 0x0UL,
- .size = 0x80000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
- PTE_BLOCK_NON_SHARE |
- PTE_BLOCK_PXN | PTE_BLOCK_UXN
- }, {
- .virt = 0x80000000UL,
- .phys = 0x80000000UL,
- .size = 0x20000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
- PTE_BLOCK_INNER_SHARE
- }, {
- .virt = 0xa0000000UL,
- .phys = 0xa0000000UL,
- .size = 0x04800000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL_NC) |
- PTE_BLOCK_NON_SHARE
- }, {
- .virt = 0xa4800000UL,
- .phys = 0xa4800000UL,
- .size = 0x5b800000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
- PTE_BLOCK_INNER_SHARE
- }, {
- .virt = 0x880000000UL,
- .phys = 0x880000000UL,
- .size = 0x80000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
- PTE_BLOCK_INNER_SHARE
- }, {
- .virt = 0x500000000UL,
- .phys = 0x500000000UL,
- .size = 0x400000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
- PTE_BLOCK_NON_SHARE |
- PTE_BLOCK_PXN | PTE_BLOCK_UXN
- }, {
- /* List terminator */
- 0,
- }
-};
-
-struct mm_region *mem_map = j7200_mem_map;
-
-#else /* CONFIG_SOC_K3_J721E_J7200 */
-
-/* NR_DRAM_BANKS + 32bit IO + 64bit IO + terminator */
-#define NR_MMU_REGIONS (CONFIG_NR_DRAM_BANKS + 6)
-
-/* ToDo: Add 64bit IO */
-struct mm_region j721e_mem_map[NR_MMU_REGIONS] = {
+struct mm_region k3_mem_map[] = {
{
.virt = 0x0UL,
.phys = 0x0UL,
@@ -135,164 +23,12 @@ struct mm_region j721e_mem_map[NR_MMU_REGIONS] = {
}, {
.virt = 0x80000000UL,
.phys = 0x80000000UL,
- .size = 0x20000000UL,
+ .size = 0x1e780000UL,
.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
PTE_BLOCK_INNER_SHARE
}, {
.virt = 0xa0000000UL,
.phys = 0xa0000000UL,
- .size = 0x1bc00000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL_NC) |
- PTE_BLOCK_NON_SHARE
- }, {
- .virt = 0xbbc00000UL,
- .phys = 0xbbc00000UL,
- .size = 0x44400000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
- PTE_BLOCK_INNER_SHARE
- }, {
- .virt = 0x880000000UL,
- .phys = 0x880000000UL,
- .size = 0x80000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
- PTE_BLOCK_INNER_SHARE
- }, {
- .virt = 0x500000000UL,
- .phys = 0x500000000UL,
- .size = 0x400000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
- PTE_BLOCK_NON_SHARE |
- PTE_BLOCK_PXN | PTE_BLOCK_UXN
- }, {
- .virt = 0x4d80000000UL,
- .phys = 0x4d80000000UL,
- .size = 0x0002000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL_NC) |
- PTE_BLOCK_INNER_SHARE
- }, {
- /* List terminator */
- 0,
- }
-};
-
-struct mm_region *mem_map = j721e_mem_map;
-#endif /* CONFIG_SOC_K3_J721E_J7200 */
-
-#endif /* CONFIG_SOC_K3_J721E */
-
-#ifdef CONFIG_SOC_K3_J721S2
-#define NR_MMU_REGIONS (CONFIG_NR_DRAM_BANKS + 3)
-
-/* ToDo: Add 64bit IO */
-struct mm_region j721s2_mem_map[NR_MMU_REGIONS] = {
- {
- .virt = 0x0UL,
- .phys = 0x0UL,
- .size = 0x80000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
- PTE_BLOCK_NON_SHARE |
- PTE_BLOCK_PXN | PTE_BLOCK_UXN
- }, {
- .virt = 0x80000000UL,
- .phys = 0x80000000UL,
- .size = 0x80000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
- PTE_BLOCK_INNER_SHARE
- }, {
- .virt = 0x880000000UL,
- .phys = 0x880000000UL,
- .size = 0x80000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
- PTE_BLOCK_INNER_SHARE
- }, {
- .virt = 0x500000000UL,
- .phys = 0x500000000UL,
- .size = 0x400000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
- PTE_BLOCK_NON_SHARE |
- PTE_BLOCK_PXN | PTE_BLOCK_UXN
- }, {
- /* List terminator */
- 0,
- }
-};
-
-struct mm_region *mem_map = j721s2_mem_map;
-
-#endif /* CONFIG_SOC_K3_J721S2 */
-
-#if defined(CONFIG_SOC_K3_AM625) || defined(CONFIG_SOC_K3_AM62A7)
-
-/* NR_DRAM_BANKS + 32bit IO + 64bit IO + terminator */
-#define NR_MMU_REGIONS (CONFIG_NR_DRAM_BANKS + 4)
-
-/* ToDo: Add 64bit IO */
-struct mm_region am62_mem_map[NR_MMU_REGIONS] = {
- {
- .virt = 0x0UL,
- .phys = 0x0UL,
- .size = 0x80000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
- PTE_BLOCK_NON_SHARE |
- PTE_BLOCK_PXN | PTE_BLOCK_UXN
- }, {
- .virt = 0x80000000UL,
- .phys = 0x80000000UL,
- .size = 0x1E780000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
- PTE_BLOCK_INNER_SHARE
- }, {
- .virt = 0xA0000000UL,
- .phys = 0xA0000000UL,
- .size = 0x60000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
- PTE_BLOCK_INNER_SHARE
-
- }, {
- .virt = 0x880000000UL,
- .phys = 0x880000000UL,
- .size = 0x80000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
- PTE_BLOCK_INNER_SHARE
- }, {
- .virt = 0x500000000UL,
- .phys = 0x500000000UL,
- .size = 0x400000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
- PTE_BLOCK_NON_SHARE |
- PTE_BLOCK_PXN | PTE_BLOCK_UXN
- }, {
- /* List terminator */
- 0,
- }
-};
-
-struct mm_region *mem_map = am62_mem_map;
-#endif /* CONFIG_SOC_K3_AM625 || CONFIG_SOC_K3_AM62A7 */
-
-#ifdef CONFIG_SOC_K3_AM642
-
-/* NR_DRAM_BANKS + 32bit IO + 64bit IO + terminator */
-#define NR_MMU_REGIONS (CONFIG_NR_DRAM_BANKS + 4)
-
-/* ToDo: Add 64bit IO */
-struct mm_region am64_mem_map[NR_MMU_REGIONS] = {
- {
- .virt = 0x0UL,
- .phys = 0x0UL,
- .size = 0x80000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
- PTE_BLOCK_NON_SHARE |
- PTE_BLOCK_PXN | PTE_BLOCK_UXN
- }, {
- .virt = 0x80000000UL,
- .phys = 0x80000000UL,
- .size = 0x1E800000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
- PTE_BLOCK_INNER_SHARE
- }, {
- .virt = 0xA0000000UL,
- .phys = 0xA0000000UL,
.size = 0x60000000UL,
.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
PTE_BLOCK_INNER_SHARE
@@ -315,5 +51,4 @@ struct mm_region am64_mem_map[NR_MMU_REGIONS] = {
}
};
-struct mm_region *mem_map = am64_mem_map;
-#endif /* CONFIG_SOC_K3_AM642 */
+struct mm_region *mem_map = k3_mem_map;
diff --git a/arch/arm/mach-k3/schema.yaml b/arch/arm/mach-k3/schema.yaml
new file mode 100644
index 0000000000..c8dd2e79e7
--- /dev/null
+++ b/arch/arm/mach-k3/schema.yaml
@@ -0,0 +1,436 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Config schema for TI K3 devices
+#
+
+---
+
+definitions:
+ u8:
+ type: integer
+ minimum: 0
+ maximum: 0xff
+ u16:
+ type: integer
+ minimum: 0
+ maximum: 0xffff
+ u32:
+ type: integer
+ minimum: 0
+ maximum: 0xffffffff
+
+
+
+type: object
+properties:
+ pm-cfg:
+ type: object
+ properties:
+ rev:
+ type: object
+ properties:
+ boardcfg_abi_maj:
+ $ref: "#/definitions/u8"
+ boardcfg_abi_min:
+ $ref: "#/definitions/u8"
+ board-cfg:
+ type: object
+ properties:
+ rev:
+ type: object
+ properties:
+ boardcfg_abi_maj:
+ $ref: "#/definitions/u8"
+ boardcfg_abi_min:
+ $ref: "#/definitions/u8"
+ control:
+ type: object
+ properties:
+ subhdr:
+ type: object
+ properties:
+ magic:
+ $ref: "#/definitions/u16"
+ size:
+ $ref: "#/definitions/u16"
+ main_isolation_enable:
+ $ref: "#/definitions/u8"
+ main_isolation_hostid:
+ $ref: "#/definitions/u16"
+
+
+ secproxy:
+ type: object
+ properties:
+ subhdr:
+ type: object
+ properties:
+ magic:
+ $ref: "#/definitions/u16"
+ size:
+ $ref: "#/definitions/u16"
+ scaling_factor:
+ $ref: "#/definitions/u8"
+ scaling_profile:
+ $ref: "#/definitions/u8"
+ disable_main_nav_secure_proxy:
+ $ref: "#/definitions/u8"
+
+ msmc:
+ type: object
+ properties:
+ subhdr:
+ type: object
+ properties:
+ magic:
+ $ref: "#/definitions/u16"
+ size:
+ $ref: "#/definitions/u16"
+ msmc_cache_size:
+ $ref: "#/definitions/u8"
+ debug_cfg:
+ type: object
+ properties:
+ subhdr:
+ type: object
+ properties:
+ magic:
+ $ref: "#/definitions/u16"
+ size:
+ $ref: "#/definitions/u16"
+ trace_dst_enables:
+ $ref: "#/definitions/u16"
+ trace_src_enables:
+ $ref: "#/definitions/u16"
+
+ sec-cfg:
+ type: object
+ properties:
+ rev:
+ type: object
+ properties:
+ boardcfg_abi_maj:
+ $ref: "#/definitions/u8"
+ boardcfg_abi_min:
+ $ref: "#/definitions/u8"
+
+ processor_acl_list:
+ type: object
+ properties:
+ subhdr:
+ type: object
+ properties:
+ magic:
+ $ref: "#/definitions/u16"
+ size:
+ $ref: "#/definitions/u16"
+ proc_acl_entries:
+ type: array
+ minItems: 32
+ maxItems: 32
+ items:
+ type: object
+ properties:
+ processor_id:
+ $ref: "#/definitions/u8"
+ proc_access_master:
+ $ref: "#/definitions/u8"
+ proc_access_secondary:
+ type: array
+ minItems: 3
+ maxItems: 3
+ items:
+ $ref: "#/definitions/u8"
+ host_hierarchy:
+ type: object
+ properties:
+ subhdr:
+ type: object
+ properties:
+ magic:
+ $ref: "#/definitions/u16"
+ size:
+ $ref: "#/definitions/u16"
+ host_hierarchy_entries:
+ type: array
+ minItems: 32
+ maxItems: 32
+ items:
+ type: object
+ properties:
+ host_id:
+ $ref: "#/definitions/u8"
+ supervisor_host_id:
+ $ref: "#/definitions/u8"
+
+ otp_config:
+ type: object
+ properties:
+ subhdr:
+ type: object
+ properties:
+ magic:
+ $ref: "#/definitions/u16"
+ size:
+ $ref: "#/definitions/u16"
+ otp_entry:
+ type: array
+ minItems: 32
+ maxItems: 32
+ items:
+ type: object
+ properties:
+ host_id:
+ $ref: "#/definitions/u8"
+ host_perms:
+ $ref: "#/definitions/u8"
+ write_host_id:
+ $ref: "#/definitions/u8"
+
+ dkek_config:
+ type: object
+ properties:
+ subhdr:
+ type: object
+ properties:
+ magic:
+ $ref: "#/definitions/u16"
+ size:
+ $ref: "#/definitions/u16"
+ allowed_hosts:
+ type: array
+ minItems: 4
+ maxItems: 4
+ items:
+ $ref: "#/definitions/u8"
+ allow_dkek_export_tisci:
+ $ref: "#/definitions/u8"
+ rsvd:
+ type: array
+ minItems: 3
+ maxItems: 3
+ items:
+ $ref: "#/definitions/u8"
+
+ sa2ul_cfg:
+ type: object
+ properties:
+ subhdr:
+ type: object
+ properties:
+ magic:
+ $ref: "#/definitions/u16"
+ size:
+ $ref: "#/definitions/u16"
+ rsvd:
+ type: array
+ minItems: 2
+ maxItems: 4
+ items:
+ $ref: "#/definitions/u8"
+ enable_saul_psil_global_config_writes:
+ $ref: "#/definitions/u8"
+ auth_resource_owner:
+ $ref: "#/definitions/u8"
+
+ sec_dbg_config:
+ type: object
+ properties:
+ subhdr:
+ type: object
+ properties:
+ magic:
+ $ref: "#/definitions/u16"
+ size:
+ $ref: "#/definitions/u16"
+ allow_jtag_unlock:
+ $ref: "#/definitions/u8"
+ allow_wildcard_unlock:
+ $ref: "#/definitions/u8"
+ allowed_debug_level_rsvd:
+ $ref: "#/definitions/u8"
+ rsvd:
+ $ref: "#/definitions/u8"
+ min_cert_rev:
+ $ref: "#/definitions/u32"
+ jtag_unlock_hosts:
+ type: array
+ minItems: 4
+ maxItems: 4
+ items:
+ $ref: "#/definitions/u8"
+
+
+ sec_handover_cfg:
+ type: object
+ properties:
+ subhdr:
+ type: object
+ properties:
+ magic:
+ $ref: "#/definitions/u16"
+ size:
+ $ref: "#/definitions/u16"
+ handover_msg_sender:
+ $ref: "#/definitions/u8"
+ handover_to_host_id:
+ $ref: "#/definitions/u8"
+ rsvd:
+ type: array
+ minItems: 4
+ maxItems: 4
+ items:
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generated by cgit v1.2.3 (git 2.39.1) at 2025-05-28 09:43:02 +0000