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-rw-r--r--arch/arm/dts/k3-am65-mcu.dtsi128
-rw-r--r--arch/arm/dts/k3-am654-base-board-u-boot.dtsi155
-rw-r--r--arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi174
-rw-r--r--arch/arm/dts/k3-j721e-mcu-wakeup.dtsi117
-rw-r--r--arch/arm/mach-k3/common.c2
-rw-r--r--arch/arm/mach-k3/config.mk17
6 files changed, 263 insertions, 330 deletions
diff --git a/arch/arm/dts/k3-am65-mcu.dtsi b/arch/arm/dts/k3-am65-mcu.dtsi
index bc9a87210d..1355685839 100644
--- a/arch/arm/dts/k3-am65-mcu.dtsi
+++ b/arch/arm/dts/k3-am65-mcu.dtsi
@@ -6,6 +6,20 @@
*/
&cbass_mcu {
+ mcu_conf: scm_conf@40f00000 {
+ compatible = "syscon", "simple-mfd";
+ reg = <0x0 0x40f00000 0x0 0x20000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0x40f00000 0x20000>;
+
+ phy_gmii_sel: phy@4040 {
+ compatible = "ti,am654-phy-gmii-sel";
+ reg = <0x4040 0x4>;
+ #phy-cells = <1>;
+ };
+ };
+
mcu_uart0: serial@40a00000 {
compatible = "ti,am654-uart";
reg = <0x00 0x40a00000 0x00 0x100>;
@@ -102,4 +116,118 @@
#size-cells = <0>;
};
};
+
+ mcu_navss {
+ compatible = "simple-mfd";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ dma-coherent;
+ dma-ranges;
+
+ ti,sci-dev-id = <119>;
+
+ mcu_ringacc: ringacc@2b800000 {
+ compatible = "ti,am654-navss-ringacc";
+ reg = <0x0 0x2b800000 0x0 0x400000>,
+ <0x0 0x2b000000 0x0 0x400000>,
+ <0x0 0x28590000 0x0 0x100>,
+ <0x0 0x2a500000 0x0 0x40000>;
+ reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target";
+ ti,num-rings = <286>;
+ ti,sci-rm-range-gp-rings = <0x2>; /* GP ring range */
+ ti,dma-ring-reset-quirk;
+ ti,sci = <&dmsc>;
+ ti,sci-dev-id = <195>;
+ };
+
+ mcu_udmap: dma-controller@285c0000 {
+ compatible = "ti,am654-navss-mcu-udmap";
+ reg = <0x0 0x285c0000 0x0 0x100>,
+ <0x0 0x2a800000 0x0 0x40000>,
+ <0x0 0x2aa00000 0x0 0x40000>;
+ reg-names = "gcfg", "rchanrt", "tchanrt";
+ #dma-cells = <1>;
+
+ ti,sci = <&dmsc>;
+ ti,sci-dev-id = <194>;
+ ti,ringacc = <&mcu_ringacc>;
+
+ ti,sci-rm-range-tchan = <0x1>, /* TX_HCHAN */
+ <0x2>; /* TX_CHAN */
+ ti,sci-rm-range-rchan = <0x3>, /* RX_HCHAN */
+ <0x4>; /* RX_CHAN */
+ ti,sci-rm-range-rflow = <0x5>; /* GP RFLOW */
+ };
+ };
+
+ mcu_cpsw: ethernet@46000000 {
+ compatible = "ti,am654-cpsw-nuss";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ reg = <0x0 0x46000000 0x0 0x200000>;
+ reg-names = "cpsw_nuss";
+ ranges = <0x0 0x0 0x0 0x46000000 0x0 0x200000>;
+ dma-coherent;
+ clocks = <&k3_clks 5 10>;
+ clock-names = "fck";
+ power-domains = <&k3_pds 5 TI_SCI_PD_EXCLUSIVE>;
+
+ dmas = <&mcu_udmap 0xf000>,
+ <&mcu_udmap 0xf001>,
+ <&mcu_udmap 0xf002>,
+ <&mcu_udmap 0xf003>,
+ <&mcu_udmap 0xf004>,
+ <&mcu_udmap 0xf005>,
+ <&mcu_udmap 0xf006>,
+ <&mcu_udmap 0xf007>,
+ <&mcu_udmap 0x7000>;
+ dma-names = "tx0", "tx1", "tx2", "tx3",
+ "tx4", "tx5", "tx6", "tx7",
+ "rx";
+
+ ethernet-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpsw_port1: port@1 {
+ reg = <1>;
+ ti,mac-only;
+ label = "port1";
+ ti,syscon-efuse = <&mcu_conf 0x200>;
+ phys = <&phy_gmii_sel 1>;
+ };
+ };
+
+ davinci_mdio: mdio@f00 {
+ compatible = "ti,cpsw-mdio","ti,davinci_mdio";
+ reg = <0x0 0xf00 0x0 0x100>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&k3_clks 5 10>;
+ clock-names = "fck";
+ bus_freq = <1000000>;
+ };
+
+ cpts@3d000 {
+ compatible = "ti,am65-cpts";
+ reg = <0x0 0x3d000 0x0 0x400>;
+ clocks = <&mcu_cpsw_cpts_mux>;
+ clock-names = "cpts";
+ interrupts-extended = <&gic500 GIC_SPI 570 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "cpts";
+ ti,cpts-ext-ts-inputs = <4>;
+ ti,cpts-periodic-outputs = <2>;
+
+ mcu_cpsw_cpts_mux: refclk-mux {
+ #clock-cells = <0>;
+ clocks = <&k3_clks 118 5>, <&k3_clks 118 11>,
+ <&k3_clks 118 6>, <&k3_clks 118 3>,
+ <&k3_clks 118 8>, <&k3_clks 118 14>,
+ <&k3_clks 120 3>, <&k3_clks 121 3>;
+ assigned-clocks = <&mcu_cpsw_cpts_mux>;
+ assigned-clock-parents = <&k3_clks 118 5>;
+ };
+ };
+ };
};
diff --git a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
index a7e5eb0553..d9ff3ed47b 100644
--- a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
@@ -4,7 +4,6 @@
*/
#include <dt-bindings/pinctrl/k3.h>
-#include <dt-bindings/dma/k3-udma.h>
#include <dt-bindings/net/ti-dp83867.h>
/ {
@@ -47,164 +46,17 @@
&cbass_mcu {
u-boot,dm-spl;
- navss_mcu: navss-mcu {
- compatible = "simple-bus";
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
+ mcu_navss {
u-boot,dm-spl;
- ti,sci-dev-id = <119>;
-
- mcu_ringacc: ringacc@2b800000 {
- compatible = "ti,am654-navss-ringacc";
- reg = <0x0 0x2b800000 0x0 0x400000>,
- <0x0 0x2b000000 0x0 0x400000>,
- <0x0 0x28590000 0x0 0x100>,
- <0x0 0x2a500000 0x0 0x40000>;
- reg-names = "rt", "fifos",
- "proxy_gcfg", "proxy_target";
- ti,num-rings = <286>;
- ti,sci-rm-range-gp-rings = <0x2>; /* GP ring range */
- ti,dma-ring-reset-quirk;
- ti,sci = <&dmsc>;
- ti,sci-dev-id = <195>;
+ ringacc@2b800000 {
u-boot,dm-spl;
};
- mcu_udmap: udmap@285c0000 {
- compatible = "ti,k3-navss-udmap";
- reg = <0x0 0x285c0000 0x0 0x100>,
- <0x0 0x2a800000 0x0 0x40000>,
- <0x0 0x2aa00000 0x0 0x40000>;
- reg-names = "gcfg", "rchanrt", "tchanrt";
- #dma-cells = <3>;
-
- ti,ringacc = <&mcu_ringacc>;
- ti,psil-base = <0x6000>;
-
- ti,sci = <&dmsc>;
- ti,sci-dev-id = <194>;
-
- ti,sci-rm-range-tchan = <0x1>, /* TX_HCHAN */
- <0x2>; /* TX_CHAN */
- ti,sci-rm-range-rchan = <0x3>, /* RX_HCHAN */
- <0x4>; /* RX_CHAN */
- ti,sci-rm-range-rflow = <0x5>; /* GP RFLOW */
- dma-coherent;
+ dma-controller@285c0000 {
u-boot,dm-spl;
};
};
-
- mcu_conf: scm_conf@40f00000 {
- compatible = "syscon";
- reg = <0x0 0x40f00000 0x0 0x20000>;
- };
-
- mcu_cpsw: cpsw_nuss@046000000 {
- compatible = "ti,am654-cpsw-nuss";
- #address-cells = <2>;
- #size-cells = <2>;
- reg = <0x0 0x46000000 0x0 0x200000>;
- reg-names = "cpsw_nuss";
- ranges;
- dma-coherent;
- clocks = <&k3_clks 5 10>;
- clock-names = "fck";
- power-domains = <&k3_pds 5 TI_SCI_PD_EXCLUSIVE>;
- ti,psil-base = <0x7000>;
-
- dmas = <&mcu_udmap &mcu_cpsw 0 UDMA_DIR_TX>,
- <&mcu_udmap &mcu_cpsw 1 UDMA_DIR_TX>,
- <&mcu_udmap &mcu_cpsw 2 UDMA_DIR_TX>,
- <&mcu_udmap &mcu_cpsw 3 UDMA_DIR_TX>,
- <&mcu_udmap &mcu_cpsw 4 UDMA_DIR_TX>,
- <&mcu_udmap &mcu_cpsw 5 UDMA_DIR_TX>,
- <&mcu_udmap &mcu_cpsw 6 UDMA_DIR_TX>,
- <&mcu_udmap &mcu_cpsw 7 UDMA_DIR_TX>,
- <&mcu_udmap &mcu_cpsw 0 UDMA_DIR_RX>;
- dma-names = "tx0", "tx1", "tx2", "tx3",
- "tx4", "tx5", "tx6", "tx7",
- "rx";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
- host: host@0 {
- reg = <0>;
- ti,label = "host";
- };
-
- cpsw_port1: port@1 {
- reg = <1>;
- ti,mac-only;
- ti,label = "port1";
- ti,syscon-efuse = <&mcu_conf 0x200>;
- };
- };
-
- davinci_mdio: mdio {
- #address-cells = <1>;
- #size-cells = <0>;
- bus_freq = <1000000>;
- };
-
- ti,psil-config0 {
- linux,udma-mode = <UDMA_PKT_MODE>;
- statictr-type = <PSIL_STATIC_TR_NONE>;
- ti,needs-epib;
- ti,psd-size = <16>;
- };
-
- ti,psil-config1 {
- linux,udma-mode = <UDMA_PKT_MODE>;
- statictr-type = <PSIL_STATIC_TR_NONE>;
- ti,needs-epib;
- ti,psd-size = <16>;
- };
-
- ti,psil-config2 {
- linux,udma-mode = <UDMA_PKT_MODE>;
- statictr-type = <PSIL_STATIC_TR_NONE>;
- ti,needs-epib;
- ti,psd-size = <16>;
- };
-
- ti,psil-config3 {
- linux,udma-mode = <UDMA_PKT_MODE>;
- statictr-type = <PSIL_STATIC_TR_NONE>;
- ti,needs-epib;
- ti,psd-size = <16>;
- };
-
- ti,psil-config4 {
- linux,udma-mode = <UDMA_PKT_MODE>;
- statictr-type = <PSIL_STATIC_TR_NONE>;
- ti,needs-epib;
- ti,psd-size = <16>;
- };
-
- ti,psil-config5 {
- linux,udma-mode = <UDMA_PKT_MODE>;
- statictr-type = <PSIL_STATIC_TR_NONE>;
- ti,needs-epib;
- ti,psd-size = <16>;
- };
-
- ti,psil-config6 {
- linux,udma-mode = <UDMA_PKT_MODE>;
- statictr-type = <PSIL_STATIC_TR_NONE>;
- ti,needs-epib;
- ti,psd-size = <16>;
- };
-
- ti,psil-config7 {
- linux,udma-mode = <UDMA_PKT_MODE>;
- statictr-type = <PSIL_STATIC_TR_NONE>;
- ti,needs-epib;
- ti,psd-size = <16>;
- };
- };
};
&cbass_wakeup {
@@ -366,6 +218,7 @@
reg = <0x0 0x46000000 0x0 0x200000>,
<0x0 0x40f00200 0x0 0x2>;
reg-names = "cpsw_nuss", "mac_efuse";
+ /delete-property/ ranges;
cpsw-phy-sel@40f04040 {
compatible = "ti,am654-cpsw-phy-sel";
diff --git a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
index 7b01e4204f..6e748bfebb 100644
--- a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
@@ -3,7 +3,6 @@
* Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
*/
-#include <dt-bindings/dma/k3-udma.h>
#include <dt-bindings/net/ti-dp83867.h>
/ {
@@ -32,183 +31,17 @@
u-boot,dm-spl;
};
- mcu_conf: scm_conf@40f00000 {
- compatible = "syscon", "simple-mfd";
- reg = <0x0 0x40f00000 0x0 0x20000>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x0 0x0 0x40f00000 0x20000>;
-
- phy_sel: cpsw-phy-sel@4040 {
- compatible = "ti,am654-cpsw-phy-sel";
- reg = <0x4040 0x4>;
- reg-names = "gmii-sel";
- };
- };
-
- cbass_mcu_navss: mcu_navss {
- compatible = "simple-bus";
- #address-cells = <2>;
- #size-cells = <2>;
- dma-coherent;
- dma-ranges;
- ranges;
-
- ti,sci-dev-id = <232>;
+ mcu_navss {
u-boot,dm-spl;
- mcu_ringacc: ringacc@2b800000 {
- compatible = "ti,am654-navss-ringacc";
- reg = <0x0 0x2b800000 0x0 0x400000>,
- <0x0 0x2b000000 0x0 0x400000>,
- <0x0 0x28590000 0x0 0x100>,
- <0x0 0x2a500000 0x0 0x40000>;
- reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target";
- ti,num-rings = <286>;
- ti,sci-rm-range-gp-rings = <0x1>; /* GP ring range */
- ti,sci = <&dmsc>;
- ti,sci-dev-id = <235>;
+ ringacc@2b800000 {
u-boot,dm-spl;
};
- mcu_udmap: udmap@31150000 {
- compatible = "ti,j721e-navss-mcu-udmap";
- reg = <0x0 0x285c0000 0x0 0x100>,
- <0x0 0x2a800000 0x0 0x40000>,
- <0x0 0x2aa00000 0x0 0x40000>;
- reg-names = "gcfg", "rchanrt", "tchanrt";
- #dma-cells = <3>;
-
- ti,ringacc = <&mcu_ringacc>;
- ti,psil-base = <0x6000>;
-
- ti,sci = <&dmsc>;
- ti,sci-dev-id = <236>;
-
- ti,sci-rm-range-tchan = <0x0d>, /* TX_CHAN */
- <0x0f>; /* TX_HCHAN */
- ti,sci-rm-range-rchan = <0x0a>, /* RX_CHAN */
- <0x0b>; /* RX_HCHAN */
- ti,sci-rm-range-rflow = <0x00>; /* GP RFLOW */
+ dma-controller@285c0000 {
u-boot,dm-spl;
};
};
-
- mcu_cpsw: ethernet@046000000 {
- compatible = "ti,j721e-cpsw-nuss";
- #address-cells = <2>;
- #size-cells = <2>;
- reg = <0x0 0x46000000 0x0 0x200000>;
- reg-names = "cpsw_nuss";
- ranges;
- dma-coherent;
- clocks = <&k3_clks 18 22>;
- clock-names = "fck";
- power-domains = <&k3_pds 18 TI_SCI_PD_EXCLUSIVE>;
- ti,psil-base = <0x7000>;
- cpsw-phy-sel = <&phy_sel>;
-
- dmas = <&mcu_udmap &mcu_cpsw 0 UDMA_DIR_TX>,
- <&mcu_udmap &mcu_cpsw 1 UDMA_DIR_TX>,
- <&mcu_udmap &mcu_cpsw 2 UDMA_DIR_TX>,
- <&mcu_udmap &mcu_cpsw 3 UDMA_DIR_TX>,
- <&mcu_udmap &mcu_cpsw 4 UDMA_DIR_TX>,
- <&mcu_udmap &mcu_cpsw 5 UDMA_DIR_TX>,
- <&mcu_udmap &mcu_cpsw 6 UDMA_DIR_TX>,
- <&mcu_udmap &mcu_cpsw 7 UDMA_DIR_TX>,
- <&mcu_udmap &mcu_cpsw 0 UDMA_DIR_RX>;
- dma-names = "tx0", "tx1", "tx2", "tx3",
- "tx4", "tx5", "tx6", "tx7",
- "rx";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- host: host@0 {
- reg = <0>;
- ti,label = "host";
- };
-
- cpsw_port1: port@1 {
- reg = <1>;
- ti,mac-only;
- ti,label = "port1";
- ti,syscon-efuse = <&mcu_conf 0x200>;
- };
- };
-
- davinci_mdio: mdio {
- #address-cells = <1>;
- #size-cells = <0>;
- bus_freq = <1000000>;
- };
-
- cpts {
- clocks = <&k3_clks 18 2>;
- clock-names = "cpts";
- interrupts-extended = <&gic500 GIC_SPI 858 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "cpts";
- ti,cpts-ext-ts-inputs = <4>;
- ti,cpts-periodic-outputs = <2>;
- };
-
- ti,psil-config0 {
- linux,udma-mode = <UDMA_PKT_MODE>;
- statictr-type = <PSIL_STATIC_TR_NONE>;
- ti,needs-epib;
- ti,psd-size = <16>;
- };
-
- ti,psil-config1 {
- linux,udma-mode = <UDMA_PKT_MODE>;
- statictr-type = <PSIL_STATIC_TR_NONE>;
- ti,needs-epib;
- ti,psd-size = <16>;
- };
-
- ti,psil-config2 {
- linux,udma-mode = <UDMA_PKT_MODE>;
- statictr-type = <PSIL_STATIC_TR_NONE>;
- ti,needs-epib;
- ti,psd-size = <16>;
- };
-
- ti,psil-config3 {
- linux,udma-mode = <UDMA_PKT_MODE>;
- statictr-type = <PSIL_STATIC_TR_NONE>;
- ti,needs-epib;
- ti,psd-size = <16>;
- };
-
- ti,psil-config4 {
- linux,udma-mode = <UDMA_PKT_MODE>;
- statictr-type = <PSIL_STATIC_TR_NONE>;
- ti,needs-epib;
- ti,psd-size = <16>;
- };
-
- ti,psil-config5 {
- linux,udma-mode = <UDMA_PKT_MODE>;
- statictr-type = <PSIL_STATIC_TR_NONE>;
- ti,needs-epib;
- ti,psd-size = <16>;
- };
-
- ti,psil-config6 {
- linux,udma-mode = <UDMA_PKT_MODE>;
- statictr-type = <PSIL_STATIC_TR_NONE>;
- ti,needs-epib;
- ti,psd-size = <16>;
- };
-
- ti,psil-config7 {
- linux,udma-mode = <UDMA_PKT_MODE>;
- statictr-type = <PSIL_STATIC_TR_NONE>;
- ti,needs-epib;
- ti,psd-size = <16>;
- };
- };
};
&secure_proxy_main {
@@ -318,6 +151,7 @@
reg = <0x0 0x46000000 0x0 0x200000>,
<0x0 0x40f00200 0x0 0x2>;
reg-names = "cpsw_nuss", "mac_efuse";
+ /delete-property/ ranges;
cpsw-phy-sel@40f04040 {
compatible = "ti,am654-cpsw-phy-sel";
diff --git a/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi b/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi
index 2eed50aa5a..e6c99ab698 100644
--- a/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi
+++ b/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi
@@ -35,6 +35,20 @@
};
};
+ mcu_conf: syscon@40f00000 {
+ compatible = "syscon", "simple-mfd";
+ reg = <0x0 0x40f00000 0x0 0x20000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0x40f00000 0x20000>;
+
+ phy_gmii_sel: phy@4040 {
+ compatible = "ti,am654-phy-gmii-sel";
+ reg = <0x4040 0x4>;
+ #phy-cells = <1>;
+ };
+ };
+
wkup_pmx0: pinmux@4301c000 {
compatible = "pinctrl-single";
/* Proxy 0 addressing */
@@ -199,4 +213,107 @@
clocks = <&k3_clks 195 0>;
power-domains = <&k3_pds 195 TI_SCI_PD_EXCLUSIVE>;
};
+
+ mcu_navss {
+ compatible = "simple-mfd";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ dma-coherent;
+ dma-ranges;
+
+ ti,sci-dev-id = <232>;
+
+ mcu_ringacc: ringacc@2b800000 {
+ compatible = "ti,am654-navss-ringacc";
+ reg = <0x0 0x2b800000 0x0 0x400000>,
+ <0x0 0x2b000000 0x0 0x400000>,
+ <0x0 0x28590000 0x0 0x100>,
+ <0x0 0x2a500000 0x0 0x40000>;
+ reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target";
+ ti,num-rings = <286>;
+ ti,sci-rm-range-gp-rings = <0x1>; /* GP ring range */
+ ti,sci = <&dmsc>;
+ ti,sci-dev-id = <235>;
+ };
+
+ mcu_udmap: dma-controller@285c0000 {
+ compatible = "ti,j721e-navss-mcu-udmap";
+ reg = <0x0 0x285c0000 0x0 0x100>,
+ <0x0 0x2a800000 0x0 0x40000>,
+ <0x0 0x2aa00000 0x0 0x40000>;
+ reg-names = "gcfg", "rchanrt", "tchanrt";
+ #dma-cells = <1>;
+
+ ti,sci = <&dmsc>;
+ ti,sci-dev-id = <236>;
+ ti,ringacc = <&mcu_ringacc>;
+
+ ti,sci-rm-range-tchan = <0x0d>, /* TX_CHAN */
+ <0x0f>; /* TX_HCHAN */
+ ti,sci-rm-range-rchan = <0x0a>, /* RX_CHAN */
+ <0x0b>; /* RX_HCHAN */
+ ti,sci-rm-range-rflow = <0x00>; /* GP RFLOW */
+ };
+ };
+
+ mcu_cpsw: ethernet@46000000 {
+ compatible = "ti,j721e-cpsw-nuss";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ reg = <0x0 0x46000000 0x0 0x200000>;
+ reg-names = "cpsw_nuss";
+ ranges = <0x0 0x0 0x0 0x46000000 0x0 0x200000>;
+ dma-coherent;
+ clocks = <&k3_clks 18 22>;
+ clock-names = "fck";
+ power-domains = <&k3_pds 18 TI_SCI_PD_EXCLUSIVE>;
+
+ dmas = <&mcu_udmap 0xf000>,
+ <&mcu_udmap 0xf001>,
+ <&mcu_udmap 0xf002>,
+ <&mcu_udmap 0xf003>,
+ <&mcu_udmap 0xf004>,
+ <&mcu_udmap 0xf005>,
+ <&mcu_udmap 0xf006>,
+ <&mcu_udmap 0xf007>,
+ <&mcu_udmap 0x7000>;
+ dma-names = "tx0", "tx1", "tx2", "tx3",
+ "tx4", "tx5", "tx6", "tx7",
+ "rx";
+
+ ethernet-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpsw_port1: port@1 {
+ reg = <1>;
+ ti,mac-only;
+ label = "port1";
+ ti,syscon-efuse = <&mcu_conf 0x200>;
+ phys = <&phy_gmii_sel 1>;
+ };
+ };
+
+ davinci_mdio: mdio@f00 {
+ compatible = "ti,cpsw-mdio","ti,davinci_mdio";
+ reg = <0x0 0xf00 0x0 0x100>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&k3_clks 18 22>;
+ clock-names = "fck";
+ bus_freq = <1000000>;
+ };
+
+ cpts@3d000 {
+ compatible = "ti,am65-cpts";
+ reg = <0x0 0x3d000 0x0 0x400>;
+ clocks = <&k3_clks 18 2>;
+ clock-names = "cpts";
+ interrupts-extended = <&gic500 GIC_SPI 858 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "cpts";
+ ti,cpts-ext-ts-inputs = <4>;
+ ti,cpts-periodic-outputs = <2>;
+ };
+ };
};
diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c
index 9695b2236e..63bf060616 100644
--- a/arch/arm/mach-k3/common.c
+++ b/arch/arm/mach-k3/common.c
@@ -440,7 +440,7 @@ void spl_board_prepare_for_boot(void)
dcache_disable();
}
-void spl_board_prepare_for_boot_linux(void)
+void spl_board_prepare_for_linux(void)
{
dcache_disable();
}
diff --git a/arch/arm/mach-k3/config.mk b/arch/arm/mach-k3/config.mk
index f6b63db349..f7afef610c 100644
--- a/arch/arm/mach-k3/config.mk
+++ b/arch/arm/mach-k3/config.mk
@@ -48,22 +48,23 @@ ALL-y += tiboot3.bin
endif
ifdef CONFIG_ARM64
+
ifeq ($(CONFIG_TI_SECURE_DEVICE),y)
SPL_ITS := u-boot-spl-k3_HS.its
-$(SPL_ITS): FORCE
- IS_HS=1 \
- $(srctree)/tools/k3_fit_atf.sh \
- $(patsubst %,$(obj)/dts/%.dtb,$(subst ",,$(CONFIG_SPL_OF_LIST))) > $@
-
+$(SPL_ITS): export IS_HS=1
ALL-y += tispl.bin_HS
else
SPL_ITS := u-boot-spl-k3.its
-$(SPL_ITS): FORCE
+ALL-y += tispl.bin
+endif
+
+quiet_cmd_k3_mkits = MKITS $@
+cmd_k3_mkits = \
$(srctree)/tools/k3_fit_atf.sh \
$(patsubst %,$(obj)/dts/%.dtb,$(subst ",,$(CONFIG_SPL_OF_LIST))) > $@
-ALL-y += tispl.bin
-endif
+$(SPL_ITS): FORCE
+ $(call cmd,k3_mkits)
endif
else
generated by cgit v1.2.3 (git 2.39.1) at 2025-05-24 01:17:08 +0000