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-rw-r--r--arch/arc/include/asm/sections.h5
-rw-r--r--arch/arc/lib/relocate.c37
-rw-r--r--arch/arm/cpu/arm926ejs/mxs/mxs.c2
-rw-r--r--arch/arm/cpu/arm926ejs/mxs/spl_boot.c2
-rw-r--r--arch/arm/cpu/armv7/ls102xa/Kconfig1
-rw-r--r--arch/arm/cpu/armv8/fsl-layerscape/Kconfig2
-rw-r--r--arch/arm/include/asm/spl.h3
-rw-r--r--arch/arm/mach-imx/Kconfig2
-rw-r--r--arch/arm/mach-imx/imx8/Kconfig4
-rw-r--r--arch/arm/mach-rockchip/Kconfig2
-rw-r--r--arch/arm/mach-stm32mp/boot_params.c4
-rw-r--r--arch/arm/mach-sunxi/Kconfig4
-rw-r--r--arch/microblaze/include/asm/processor.h5
-rw-r--r--arch/mips/lib/reloc.c2
-rw-r--r--arch/mips/mach-jz47xx/jz4780/jz4780.c2
-rw-r--r--arch/mips/mach-mtmips/mt7621/spl/launch.c2
-rw-r--r--arch/mips/mach-mtmips/mt7621/spl/spl.c2
-rw-r--r--arch/powerpc/cpu/mpc8xx/Kconfig2
-rw-r--r--arch/riscv/cpu/jh7110/spl.c4
-rw-r--r--arch/x86/include/asm/sections.h2
-rw-r--r--arch/x86/lib/relocate.c14
-rw-r--r--arch/x86/lib/spl.c6
-rw-r--r--arch/xtensa/lib/relocate.c4
23 files changed, 51 insertions, 62 deletions
diff --git a/arch/arc/include/asm/sections.h b/arch/arc/include/asm/sections.h
index 1c9c9db138..ffad4a684e 100644
--- a/arch/arc/include/asm/sections.h
+++ b/arch/arc/include/asm/sections.h
@@ -8,7 +8,8 @@
#include <asm-generic/sections.h>
-extern ulong __ivt_start;
-extern ulong __ivt_end;
+extern char __ivt_start[];
+extern char __ivt_end[];
+extern char __text_end[];
#endif /* __ASM_ARC_SECTIONS_H */
diff --git a/arch/arc/lib/relocate.c b/arch/arc/lib/relocate.c
index 7f531c95ee..fd6f4fbc93 100644
--- a/arch/arc/lib/relocate.c
+++ b/arch/arc/lib/relocate.c
@@ -6,32 +6,27 @@
#include <common.h>
#include <elf.h>
#include <log.h>
-#include <asm-generic/sections.h>
+#include <asm/sections.h>
#include <asm/global_data.h>
-extern ulong __image_copy_start;
-extern ulong __ivt_start;
-extern ulong __ivt_end;
-extern ulong __text_end;
-
DECLARE_GLOBAL_DATA_PTR;
int copy_uboot_to_ram(void)
{
- size_t len = (size_t)&__image_copy_end - (size_t)&__image_copy_start;
+ size_t len = (size_t)__image_copy_end - (size_t)__image_copy_start;
if (gd->flags & GD_FLG_SKIP_RELOC)
return 0;
- memcpy((void *)gd->relocaddr, (void *)&__image_copy_start, len);
+ memcpy((void *)gd->relocaddr, (void *)__image_copy_start, len);
return 0;
}
int clear_bss(void)
{
- ulong dst_addr = (ulong)&__bss_start + gd->reloc_off;
- size_t len = (size_t)&__bss_end - (size_t)&__bss_start;
+ ulong dst_addr = (ulong)__bss_start + gd->reloc_off;
+ size_t len = (size_t)__bss_end - (size_t)__bss_start;
memset((void *)dst_addr, 0x00, len);
@@ -43,8 +38,8 @@ int clear_bss(void)
*/
int do_elf_reloc_fixups(void)
{
- Elf32_Rela *re_src = (Elf32_Rela *)(&__rel_dyn_start);
- Elf32_Rela *re_end = (Elf32_Rela *)(&__rel_dyn_end);
+ Elf32_Rela *re_src = (Elf32_Rela *)__rel_dyn_start;
+ Elf32_Rela *re_end = (Elf32_Rela *)__rel_dyn_end;
if (gd->flags & GD_FLG_SKIP_RELOC)
return 0;
@@ -60,8 +55,8 @@ int do_elf_reloc_fixups(void)
offset_ptr_rom = (Elf32_Addr *)re_src->r_offset;
/* Check that the location of the relocation is in .text */
- if (offset_ptr_rom >= (Elf32_Addr *)&__image_copy_start &&
- offset_ptr_rom < (Elf32_Addr *)&__image_copy_end) {
+ if (offset_ptr_rom >= (Elf32_Addr *)__image_copy_start &&
+ offset_ptr_rom < (Elf32_Addr *)__image_copy_end) {
unsigned int val, do_swap = 0;
/* Switch to the in-RAM version */
offset_ptr_ram = (Elf32_Addr *)((ulong)offset_ptr_rom +
@@ -69,11 +64,11 @@ int do_elf_reloc_fixups(void)
#ifdef __LITTLE_ENDIAN__
/* If location in ".text" section swap value */
- if (((u32)offset_ptr_rom >= (u32)&__text_start &&
- (u32)offset_ptr_rom <= (u32)&__text_end)
+ if (((u32)offset_ptr_rom >= (u32)__text_start &&
+ (u32)offset_ptr_rom <= (u32)__text_end)
#if defined(__ARC700__) || defined(__ARC600__)
- || ((u32)offset_ptr_rom >= (u32)&__ivt_start &&
- (u32)offset_ptr_rom <= (u32)&__ivt_end)
+ || ((u32)offset_ptr_rom >= (u32)__ivt_start &&
+ (u32)offset_ptr_rom <= (u32)__ivt_end)
#endif
)
do_swap = 1;
@@ -96,8 +91,8 @@ int do_elf_reloc_fixups(void)
val = (val << 16) | (val >> 16);
/* Check that the target points into executable */
- if (val < (unsigned int)&__image_copy_start ||
- val > (unsigned int)&__image_copy_end) {
+ if (val < (unsigned int)__image_copy_start ||
+ val > (unsigned int)__image_copy_end) {
/* TODO: Use panic() instead of debug()
*
* For some reason GCC might generate
@@ -106,7 +101,7 @@ int do_elf_reloc_fixups(void)
* ----------------------->8--------------------
* static int setup_mon_len(void)
* {
- * gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
+ * gd->mon_len = (ulong)__bss_end - CONFIG_SYS_MONITOR_BASE;
* return 0;
* }
* ----------------------->8--------------------
diff --git a/arch/arm/cpu/arm926ejs/mxs/mxs.c b/arch/arm/cpu/arm926ejs/mxs/mxs.c
index 4d21e3df76..6d6166cb83 100644
--- a/arch/arm/cpu/arm926ejs/mxs/mxs.c
+++ b/arch/arm/cpu/arm926ejs/mxs/mxs.c
@@ -100,7 +100,7 @@ int arch_cpu_init(void)
struct mxs_clkctrl_regs *clkctrl_regs =
(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
- mx28_fixup_vt((uint32_t)&_start);
+ mx28_fixup_vt((uint32_t)_start);
/*
* Enable NAND clock
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
index 5598c552ab..5e7bdb78be 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
@@ -103,7 +103,7 @@ static void mxs_spl_fixup_vectors(void)
*/
/* cppcheck-suppress nullPointer */
- memcpy(0x0, &_start, 0x60);
+ memcpy(0x0, _start, 0x60);
}
static void mxs_spl_console_init(void)
diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig b/arch/arm/cpu/armv7/ls102xa/Kconfig
index 3e292bf70e..46ace7e5fd 100644
--- a/arch/arm/cpu/armv7/ls102xa/Kconfig
+++ b/arch/arm/cpu/armv7/ls102xa/Kconfig
@@ -98,7 +98,6 @@ config SYS_FSL_ERRATUM_A008407
config SYS_FSL_QSPI_SKIP_CLKSEL
bool "Skip setting QSPI clock during SoC init"
- default 0
help
To improve startup times when booting from QSPI flash, the QSPI
frequency can be set very early in the boot process. If this option
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index a8b493e2f8..d46934c2dc 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -739,7 +739,7 @@ config HAS_FSL_XHCI_USB
config SYS_FSL_BOOTROM_BASE
hex
depends on FSL_LSCH2
- default 0
+ default 0x0
config SYS_FSL_BOOTROM_SIZE
hex
diff --git a/arch/arm/include/asm/spl.h b/arch/arm/include/asm/spl.h
index 0ece4b0906..ee79a19c05 100644
--- a/arch/arm/include/asm/spl.h
+++ b/arch/arm/include/asm/spl.h
@@ -34,9 +34,6 @@ enum {
};
#endif
-/* Linker symbols. */
-extern char __bss_start[], __bss_end[];
-
#ifndef CONFIG_DM
extern gd_t gdata;
#endif
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index d94b5828d0..2136ab7e9e 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -181,7 +181,7 @@ config IMX8_ROMAPI
config SPL_IMX_ROMAPI_LOADADDR
hex "Default load address to load image through ROM API"
depends on IMX8_ROMAPI || SPL_BOOTROM_SUPPORT
- default 0
+ default 0x0
config IMX_DCD_ADDR
hex "DCD Blocks location on the image"
diff --git a/arch/arm/mach-imx/imx8/Kconfig b/arch/arm/mach-imx/imx8/Kconfig
index 15f844f503..59d11b3179 100644
--- a/arch/arm/mach-imx/imx8/Kconfig
+++ b/arch/arm/mach-imx/imx8/Kconfig
@@ -34,11 +34,11 @@ config SYS_SOC
config BOOTAUX_RESERVED_MEM_BASE
hex "i.MX auxiliary core dram memory base"
- default 0
+ default 0x0
config BOOTAUX_RESERVED_MEM_SIZE
hex "i.MX auxiliary core dram memory size"
- default 0
+ default 0x0
choice
prompt "i.MX8 board select"
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 49da93d54b..4569a9ce28 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -469,7 +469,7 @@ config ROCKCHIP_STIMER_BASE
config ROCKCHIP_SPL_RESERVE_IRAM
hex "Size of IRAM reserved in SPL"
- default 0
+ default 0x0
help
SPL may need reserve memory for firmware loaded by SPL, whose load
address is in IRAM and may overlay with SPL text area if not
diff --git a/arch/arm/mach-stm32mp/boot_params.c b/arch/arm/mach-stm32mp/boot_params.c
index 24d04dcf0f..158bf40cb9 100644
--- a/arch/arm/mach-stm32mp/boot_params.c
+++ b/arch/arm/mach-stm32mp/boot_params.c
@@ -29,7 +29,7 @@ void *board_fdt_blob_setup(int *err)
return (void *)nt_fw_dtb;
log_debug("%s: DTB not found.\n", __func__);
}
- log_debug("%s: fall back to builtin DTB, %p\n", __func__, &_end);
+ log_debug("%s: fall back to builtin DTB, %p\n", __func__, _end);
- return (void *)&_end;
+ return (void *)_end;
}
diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
index e20c3a3ee9..9d5df2c102 100644
--- a/arch/arm/mach-sunxi/Kconfig
+++ b/arch/arm/mach-sunxi/Kconfig
@@ -568,7 +568,7 @@ config DRAM_EMR1
config DRAM_TPR3
hex "sunxi dram tpr3 value"
- default 0
+ default 0x0
---help---
Set the dram controller tpr3 parameter. This parameter configures
the delay on the command lane and also phase shifts, which are
@@ -579,7 +579,7 @@ config DRAM_TPR3
config DRAM_DQS_GATING_DELAY
hex "sunxi dram dqs_gating_delay value"
- default 0
+ default 0x0
---help---
Set the dram controller dqs_gating_delay parmeter. Each byte
encodes the DQS gating delay for each byte lane. The delay
diff --git a/arch/microblaze/include/asm/processor.h b/arch/microblaze/include/asm/processor.h
index 958018c190..c0423eaf93 100644
--- a/arch/microblaze/include/asm/processor.h
+++ b/arch/microblaze/include/asm/processor.h
@@ -6,11 +6,6 @@
#ifndef __ASM_MICROBLAZE_PROCESSOR_H
#define __ASM_MICROBLAZE_PROCESSOR_H
-/* References to section boundaries */
-
-extern char _end[];
-extern char __text_start[];
-
/* Microblaze board initialization function */
void board_init(void);
diff --git a/arch/mips/lib/reloc.c b/arch/mips/lib/reloc.c
index 67c8af2f35..9cf6809f40 100644
--- a/arch/mips/lib/reloc.c
+++ b/arch/mips/lib/reloc.c
@@ -146,7 +146,7 @@ void relocate_code(ulong start_addr_sp, gd_t *new_gd, ulong relocaddr)
/* Clear the .bss section */
bss_start = (uint8_t *)((unsigned long)__bss_start + off);
- bss_len = (unsigned long)&__bss_end - (unsigned long)__bss_start;
+ bss_len = (unsigned long)__bss_end - (unsigned long)__bss_start;
memset(bss_start, 0, bss_len);
/* Jump to the relocated U-Boot */
diff --git a/arch/mips/mach-jz47xx/jz4780/jz4780.c b/arch/mips/mach-jz47xx/jz4780/jz4780.c
index 15d1eff2ba..4584368ce8 100644
--- a/arch/mips/mach-jz47xx/jz4780/jz4780.c
+++ b/arch/mips/mach-jz47xx/jz4780/jz4780.c
@@ -42,7 +42,7 @@ void board_init_f(ulong dummy)
enable_caches();
/* Clear the BSS */
- memset(__bss_start, 0, (char *)&__bss_end - __bss_start);
+ memset(__bss_start, 0, (size_t)__bss_end - (size_t)__bss_start);
gd->flags |= GD_FLG_SPL_INIT;
diff --git a/arch/mips/mach-mtmips/mt7621/spl/launch.c b/arch/mips/mach-mtmips/mt7621/spl/launch.c
index 37c20a5f56..95dd65913d 100644
--- a/arch/mips/mach-mtmips/mt7621/spl/launch.c
+++ b/arch/mips/mach-mtmips/mt7621/spl/launch.c
@@ -70,7 +70,7 @@ void secondary_cpu_init(void)
cpumask = 0x0f;
/* Make BootROM/TPL redirect Core1's bootup flow to our entry point */
- writel((uintptr_t)&_start, sysc + BOOT_SRAM_BASE_REG);
+ writel((uintptr_t)_start, sysc + BOOT_SRAM_BASE_REG);
bootup_secondary_core();
}
diff --git a/arch/mips/mach-mtmips/mt7621/spl/spl.c b/arch/mips/mach-mtmips/mt7621/spl/spl.c
index aa5b267bb9..25b409e241 100644
--- a/arch/mips/mach-mtmips/mt7621/spl/spl.c
+++ b/arch/mips/mach-mtmips/mt7621/spl/spl.c
@@ -86,7 +86,7 @@ unsigned long spl_nor_get_uboot_base(void)
uint32_t spl_nand_get_uboot_raw_page(void)
{
- const struct stage_header *sh = (const struct stage_header *)&_start;
+ const struct stage_header *sh = (const struct stage_header *)_start;
u32 addr;
addr = image_get_header_size() + be32_to_cpu(sh->stage_size);
diff --git a/arch/powerpc/cpu/mpc8xx/Kconfig b/arch/powerpc/cpu/mpc8xx/Kconfig
index bd2af8dc10..1731c965ad 100644
--- a/arch/powerpc/cpu/mpc8xx/Kconfig
+++ b/arch/powerpc/cpu/mpc8xx/Kconfig
@@ -94,7 +94,7 @@ config SYS_SIUMCR
config SYS_SYPCR
hex "SYPCR register" if !WDT_MPC8xxx
- default 0
+ default 0x0
help
System Protection Control (11-9)
diff --git a/arch/riscv/cpu/jh7110/spl.c b/arch/riscv/cpu/jh7110/spl.c
index 72adcefa0e..7da6c261bc 100644
--- a/arch/riscv/cpu/jh7110/spl.c
+++ b/arch/riscv/cpu/jh7110/spl.c
@@ -77,8 +77,8 @@ void harts_early_init(void)
* If it is not cleared, the ECC part is invalid, and an ECC error
* will be reported when reading data.
*/
- ptr = (ulong *)&__bss_end;
- len = L2_LIM_MEM_END - (ulong)&__bss_end;
+ ptr = (ulong *)__bss_end;
+ len = L2_LIM_MEM_END - (ulong)__bss_end;
remain = len % sizeof(ulong);
len /= sizeof(ulong);
diff --git a/arch/x86/include/asm/sections.h b/arch/x86/include/asm/sections.h
index a6be3604e9..874a43d16c 100644
--- a/arch/x86/include/asm/sections.h
+++ b/arch/x86/include/asm/sections.h
@@ -8,4 +8,6 @@
#include <asm-generic/sections.h>
+extern char __data_end[];
+
#endif
diff --git a/arch/x86/lib/relocate.c b/arch/x86/lib/relocate.c
index 5b1b420a64..da819b9bdd 100644
--- a/arch/x86/lib/relocate.c
+++ b/arch/x86/lib/relocate.c
@@ -26,11 +26,11 @@ DECLARE_GLOBAL_DATA_PTR;
int copy_uboot_to_ram(void)
{
- size_t len = (uintptr_t)&__data_end - (uintptr_t)&__text_start;
+ size_t len = (uintptr_t)__data_end - (uintptr_t)__text_start;
if (gd->flags & GD_FLG_SKIP_RELOC)
return 0;
- memcpy((void *)gd->relocaddr, (void *)&__text_start, len);
+ memcpy((void *)gd->relocaddr, (void *)__text_start, len);
return 0;
}
@@ -38,8 +38,8 @@ int copy_uboot_to_ram(void)
#ifndef CONFIG_EFI_APP
int clear_bss(void)
{
- ulong dst_addr = (ulong)&__bss_start + gd->reloc_off;
- size_t len = (uintptr_t)&__bss_end - (uintptr_t)&__bss_start;
+ ulong dst_addr = (ulong)__bss_start + gd->reloc_off;
+ size_t len = (uintptr_t)__bss_end - (uintptr_t)__bss_start;
if (gd->flags & GD_FLG_SKIP_RELOC)
return 0;
@@ -150,12 +150,12 @@ static void do_elf_reloc_fixups32(unsigned int text_base, uintptr_t size,
*/
int do_elf_reloc_fixups(void)
{
- void *re_src = (void *)(&__rel_dyn_start);
- void *re_end = (void *)(&__rel_dyn_end);
+ void *re_src = (void *)__rel_dyn_start;
+ void *re_end = (void *)__rel_dyn_end;
uint text_base;
/* The size of the region of u-boot that runs out of RAM. */
- uintptr_t size = (uintptr_t)&__bss_end - (uintptr_t)&__text_start;
+ uintptr_t size = (uintptr_t)__bss_end - (uintptr_t)__text_start;
if (gd->flags & GD_FLG_SKIP_RELOC)
return 0;
diff --git a/arch/x86/lib/spl.c b/arch/x86/lib/spl.c
index b6812bb8ca..73512d3d4c 100644
--- a/arch/x86/lib/spl.c
+++ b/arch/x86/lib/spl.c
@@ -138,9 +138,9 @@ static int x86_spl_init(void)
#ifndef CONFIG_SYS_COREBOOT
log_debug("bss\n");
- debug("BSS clear from %lx to %lx len %lx\n", (ulong)&__bss_start,
- (ulong)&__bss_end, (ulong)&__bss_end - (ulong)&__bss_start);
- memset(&__bss_start, 0, (ulong)&__bss_end - (ulong)&__bss_start);
+ debug("BSS clear from %lx to %lx len %lx\n", (ulong)__bss_start,
+ (ulong)__bss_end, (ulong)__bss_end - (ulong)__bss_start);
+ memset(__bss_start, 0, (ulong)__bss_end - (ulong)__bss_start);
# ifndef CONFIG_TPL
/* TODO(sjg@chromium.org): Consider calling cpu_init_r() here */
diff --git a/arch/xtensa/lib/relocate.c b/arch/xtensa/lib/relocate.c
index 3dc8edc801..a499590c75 100644
--- a/arch/xtensa/lib/relocate.c
+++ b/arch/xtensa/lib/relocate.c
@@ -9,8 +9,8 @@
int clear_bss(void)
{
- size_t len = (size_t)&__bss_end - (size_t)&__bss_start;
+ size_t len = (size_t)__bss_end - (size_t)__bss_start;
- memset((void *)&__bss_start, 0x00, len);
+ memset((void *)__bss_start, 0x00, len);
return 0;
}
generated by cgit v1.2.3 (git 2.39.1) at 2025-05-30 16:14:45 +0000