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-rw-r--r--arch/x86/lib/fsp/Makefile1
-rw-r--r--arch/x86/lib/fsp/cmd_fsp.c132
-rw-r--r--arch/x86/lib/fsp/fsp_common.c30
-rw-r--r--arch/x86/lib/fsp/fsp_dram.c6
4 files changed, 168 insertions, 1 deletions
diff --git a/arch/x86/lib/fsp/Makefile b/arch/x86/lib/fsp/Makefile
index 5b12c12d7a..3ea4880a30 100644
--- a/arch/x86/lib/fsp/Makefile
+++ b/arch/x86/lib/fsp/Makefile
@@ -4,6 +4,7 @@
# SPDX-License-Identifier: GPL-2.0+
#
+obj-y += cmd_fsp.o
obj-y += fsp_car.o
obj-y += fsp_common.o
obj-y += fsp_dram.o
diff --git a/arch/x86/lib/fsp/cmd_fsp.c b/arch/x86/lib/fsp/cmd_fsp.c
new file mode 100644
index 0000000000..4959edf11b
--- /dev/null
+++ b/arch/x86/lib/fsp/cmd_fsp.c
@@ -0,0 +1,132 @@
+/*
+ * Copyright (C) 2014-2015, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <command.h>
+#include <asm/fsp/fsp_support.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static char *hob_type[] = {
+ "reserved",
+ "Hand-off",
+ "Mem Alloc",
+ "Res Desc",
+ "GUID Ext",
+ "FV",
+ "CPU",
+ "Mem Pool",
+ "reserved",
+ "FV2",
+ "Load PEIM",
+ "Capsule",
+};
+
+static int do_hdr(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+ struct fsp_header *hdr = find_fsp_header();
+ u32 img_addr = hdr->img_base;
+ char *sign = (char *)&hdr->sign;
+ int i;
+
+ printf("FSP : binary 0x%08x, header 0x%08x\n",
+ CONFIG_FSP_ADDR, (int)hdr);
+ printf("Header : sign ");
+ for (i = 0; i < sizeof(hdr->sign); i++)
+ printf("%c", *sign++);
+ printf(", size %d, rev %d\n", hdr->hdr_len, hdr->hdr_rev);
+ printf("Image : rev %d.%d, id ",
+ (hdr->img_rev >> 8) & 0xff, hdr->img_rev & 0xff);
+ for (i = 0; i < ARRAY_SIZE(hdr->img_id); i++)
+ printf("%c", hdr->img_id[i]);
+ printf(", addr 0x%08x, size %d\n", img_addr, hdr->img_size);
+ printf("VPD : addr 0x%08x, size %d\n",
+ hdr->cfg_region_off + img_addr, hdr->cfg_region_size);
+ printf("\nNumber of APIs Supported : %d\n", hdr->api_num);
+ printf("\tTempRamInit : 0x%08x\n", hdr->fsp_tempram_init + img_addr);
+ printf("\tFspInit : 0x%08x\n", hdr->fsp_init + img_addr);
+ printf("\tFspNotify : 0x%08x\n", hdr->fsp_notify + img_addr);
+
+ return 0;
+}
+
+static int do_hob(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+ const struct hob_header *hdr;
+ uint type;
+ char *desc;
+ int i = 0;
+
+ hdr = gd->arch.hob_list;
+
+ printf("HOB list address: 0x%08x\n\n", (unsigned int)hdr);
+
+ printf("# | Address | Type | Len | ");
+ printf("%42s\n", "GUID");
+ printf("---|----------|-----------|------|-");
+ printf("------------------------------------------\n");
+ while (!end_of_hob(hdr)) {
+ printf("%-2d | %08x | ", i, (unsigned int)hdr);
+ type = hdr->type;
+ if (type == HOB_TYPE_UNUSED)
+ desc = "*Unused*";
+ else if (type == HOB_TYPE_EOH)
+ desc = "*EOH*";
+ else if (type >= 0 && type <= ARRAY_SIZE(hob_type))
+ desc = hob_type[type];
+ else
+ desc = "*Invalid*";
+ printf("%-9s | %-4d | ", desc, hdr->len);
+
+ if (type == HOB_TYPE_MEM_ALLOC || type == HOB_TYPE_RES_DESC ||
+ type == HOB_TYPE_GUID_EXT) {
+ struct efi_guid *guid = (struct efi_guid *)(hdr + 1);
+ int j;
+
+ printf("%08x-%04x-%04x", guid->data1,
+ guid->data2, guid->data3);
+ for (j = 0; j < ARRAY_SIZE(guid->data4); j++)
+ printf("-%02x", guid->data4[j]);
+ } else {
+ printf("%42s", "Not Available");
+ }
+ printf("\n");
+ hdr = get_next_hob(hdr);
+ i++;
+ }
+
+ return 0;
+}
+
+static cmd_tbl_t fsp_commands[] = {
+ U_BOOT_CMD_MKENT(hdr, 0, 1, do_hdr, "", ""),
+ U_BOOT_CMD_MKENT(hob, 0, 1, do_hob, "", ""),
+};
+
+static int do_fsp(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+ cmd_tbl_t *fsp_cmd;
+ int ret;
+
+ if (argc < 2)
+ return CMD_RET_USAGE;
+ fsp_cmd = find_cmd_tbl(argv[1], fsp_commands, ARRAY_SIZE(fsp_commands));
+ argc -= 2;
+ argv += 2;
+ if (!fsp_cmd || argc > fsp_cmd->maxargs)
+ return CMD_RET_USAGE;
+
+ ret = fsp_cmd->cmd(fsp_cmd, flag, argc, argv);
+
+ return cmd_process_error(fsp_cmd, ret);
+}
+
+U_BOOT_CMD(
+ fsp, 2, 1, do_fsp,
+ "Show Intel Firmware Support Package (FSP) related information",
+ "hdr - Print FSP header information\n"
+ "fsp hob - Print FSP Hand-Off Block (HOB) information"
+);
diff --git a/arch/x86/lib/fsp/fsp_common.c b/arch/x86/lib/fsp/fsp_common.c
index 658f32d583..c78df94b80 100644
--- a/arch/x86/lib/fsp/fsp_common.c
+++ b/arch/x86/lib/fsp/fsp_common.c
@@ -7,6 +7,7 @@
#include <common.h>
#include <errno.h>
#include <asm/io.h>
+#include <asm/mrccache.h>
#include <asm/post.h>
#include <asm/processor.h>
#include <asm/fsp/fsp_support.h>
@@ -54,15 +55,42 @@ void board_final_cleanup(void)
return;
}
+static __maybe_unused void *fsp_prepare_mrc_cache(void)
+{
+ struct mrc_data_container *cache;
+ struct mrc_region entry;
+ int ret;
+
+ ret = mrccache_get_region(NULL, &entry);
+ if (ret)
+ return NULL;
+
+ cache = mrccache_find_current(&entry);
+ if (!cache)
+ return NULL;
+
+ debug("%s: mrc cache at %p, size %x checksum %04x\n", __func__,
+ cache->data, cache->data_size, cache->checksum);
+
+ return cache->data;
+}
+
int x86_fsp_init(void)
{
+ void *nvs;
+
if (!gd->arch.hob_list) {
+#ifdef CONFIG_ENABLE_MRC_CACHE
+ nvs = fsp_prepare_mrc_cache();
+#else
+ nvs = NULL;
+#endif
/*
* The first time we enter here, call fsp_init().
* Note the execution does not return to this function,
* instead it jumps to fsp_continue().
*/
- fsp_init(CONFIG_FSP_TEMP_RAM_ADDR, BOOT_FULL_CONFIG, NULL);
+ fsp_init(CONFIG_FSP_TEMP_RAM_ADDR, BOOT_FULL_CONFIG, nvs);
} else {
/*
* The second time we enter here, adjust the size of malloc()
diff --git a/arch/x86/lib/fsp/fsp_dram.c b/arch/x86/lib/fsp/fsp_dram.c
index e51ca96eb7..fcfe693ce5 100644
--- a/arch/x86/lib/fsp/fsp_dram.c
+++ b/arch/x86/lib/fsp/fsp_dram.c
@@ -7,6 +7,7 @@
#include <common.h>
#include <asm/fsp/fsp_support.h>
#include <asm/e820.h>
+#include <asm/mrccache.h>
#include <asm/post.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -32,6 +33,11 @@ int dram_init(void)
gd->ram_size = ram_size;
post_code(POST_DRAM);
+#ifdef CONFIG_ENABLE_MRC_CACHE
+ gd->arch.mrc_output = fsp_get_nvs_data(gd->arch.hob_list,
+ &gd->arch.mrc_output_len);
+#endif
+
return 0;
}