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-rw-r--r--arch/x86/include/asm/arch-tangier/acpi/southcluster.asl87
-rw-r--r--arch/x86/include/asm/string.h31
2 files changed, 110 insertions, 8 deletions
diff --git a/arch/x86/include/asm/arch-tangier/acpi/southcluster.asl b/arch/x86/include/asm/arch-tangier/acpi/southcluster.asl
index e166e510cb..baad98b1c7 100644
--- a/arch/x86/include/asm/arch-tangier/acpi/southcluster.asl
+++ b/arch/x86/include/asm/arch-tangier/acpi/southcluster.asl
@@ -320,6 +320,93 @@ Device (PCI0)
})
}
}
+
+ Device (IPC1)
+ {
+ Name (_ADR, 0x00130000)
+
+ Method (_STA, 0, NotSerialized)
+ {
+ Return (STA_VISIBLE)
+ }
+
+ Device (PMIC)
+ {
+ Name (_ADR, Zero)
+ Name (_HID, "INTC100E")
+ Name (_CID, "INTC100E")
+ Name (_DDN, "Basin Cove PMIC")
+ Name (_DEP, Package ()
+ {
+ IPC1
+ })
+
+ Method (_STA, 0, NotSerialized)
+ {
+ Return (STA_VISIBLE)
+ }
+
+ Method (_CRS, 0, Serialized)
+ {
+ Name (RBUF, ResourceTemplate()
+ {
+ /*
+ * Shadow registers in SRAM for PMIC:
+ * SRAM PMIC register
+ * --------------------
+ * 0x00- Unknown
+ * 0x03 THRMIRQ (0x04)
+ * 0x04 BCUIRQ (0x05)
+ * 0x05 ADCIRQ (0x06)
+ * 0x06 CHGRIRQ0 (0x07)
+ * 0x07 CHGRIRQ1 (0x08)
+ * 0x08- Unknown
+ * 0x0a PBSTATUS (0x27)
+ * 0x0b- Unknown
+ */
+ Memory32Fixed(ReadWrite, 0xFFFFF610, 0x00000010)
+ Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 30 }
+ Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 23 }
+ Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 52 }
+ Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 51 }
+ Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 50 }
+ Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 27 }
+ Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 49 }
+ })
+ Return (RBUF)
+ }
+
+ OperationRegion (PMOP, 0x8D, Zero, 0x0100)
+ Field (PMOP, DWordAcc, NoLock, Preserve)
+ {
+ SEL1, 32,
+ SEL2, 32,
+ VCCL, 32,
+ VNNL, 32,
+ AONL, 32,
+ CNTC, 32,
+ CNTN, 32,
+ AONN, 32,
+ CNT1, 32,
+ CNT2, 32,
+ CNT3, 32,
+ FLEX, 32,
+ PRG1, 32,
+ PRG2, 32,
+ PRG3, 32,
+ VLDO, 32,
+ }
+
+ Name (AVBL, Zero)
+ Method (_REG, 2, NotSerialized)
+ {
+ If ((Arg0 == 0x8D))
+ {
+ AVBL = Arg1
+ }
+ }
+ }
+ }
}
Device (FLIS)
diff --git a/arch/x86/include/asm/string.h b/arch/x86/include/asm/string.h
index 38afd23684..c15b264a5c 100644
--- a/arch/x86/include/asm/string.h
+++ b/arch/x86/include/asm/string.h
@@ -9,22 +9,37 @@
extern char *strncpy(char *__dest, __const__ char *__src, __kernel_size_t __n);
#undef __HAVE_ARCH_STRRCHR
-extern char * strrchr(const char * s, int c);
+extern char *strrchr(const char *s, int c);
#undef __HAVE_ARCH_STRCHR
-extern char * strchr(const char * s, int c);
+extern char *strchr(const char *s, int c);
+
+#ifdef CONFIG_X86_64
+
+#undef __HAVE_ARCH_MEMCPY
+extern void *memcpy(void *, const void *, __kernel_size_t);
+
+#undef __HAVE_ARCH_MEMMOVE
+extern void *memmove(void *, const void *, __kernel_size_t);
+
+#undef __HAVE_ARCH_MEMSET
+extern void *memset(void *, int, __kernel_size_t);
+
+#else
#define __HAVE_ARCH_MEMCPY
-extern void * memcpy(void *, const void *, __kernel_size_t);
+extern void *memcpy(void *, const void *, __kernel_size_t);
#define __HAVE_ARCH_MEMMOVE
-extern void * memmove(void *, const void *, __kernel_size_t);
-
-#undef __HAVE_ARCH_MEMCHR
-extern void * memchr(const void *, int, __kernel_size_t);
+extern void *memmove(void *, const void *, __kernel_size_t);
#define __HAVE_ARCH_MEMSET
-extern void * memset(void *, int, __kernel_size_t);
+extern void *memset(void *, int, __kernel_size_t);
+
+#endif /* CONFIG_X86_64 */
+
+#undef __HAVE_ARCH_MEMCHR
+extern void *memchr(const void *, int, __kernel_size_t);
#undef __HAVE_ARCH_MEMZERO
extern void memzero(void *ptr, __kernel_size_t n);