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-rw-r--r--arch/riscv/cpu/jh7110/Kconfig1
-rw-r--r--arch/riscv/dts/jh7110.dtsi9
-rw-r--r--arch/riscv/include/asm/sbi.h1
-rw-r--r--arch/riscv/lib/sbi.c16
4 files changed, 27 insertions, 0 deletions
diff --git a/arch/riscv/cpu/jh7110/Kconfig b/arch/riscv/cpu/jh7110/Kconfig
index 8469ee7de5..e5549a01b8 100644
--- a/arch/riscv/cpu/jh7110/Kconfig
+++ b/arch/riscv/cpu/jh7110/Kconfig
@@ -28,3 +28,4 @@ config STARFIVE_JH7110
imply SPL_LOAD_FIT
imply SPL_OPENSBI
imply SPL_RISCV_ACLINT
+ imply SPL_SYS_MALLOC_CLEAR_ON_INIT
diff --git a/arch/riscv/dts/jh7110.dtsi b/arch/riscv/dts/jh7110.dtsi
index 081b833331..ec237a46ff 100644
--- a/arch/riscv/dts/jh7110.dtsi
+++ b/arch/riscv/dts/jh7110.dtsi
@@ -163,6 +163,15 @@
};
};
+ timer {
+ compatible = "riscv,timer";
+ interrupts-extended = <&cpu0_intc 5>,
+ <&cpu1_intc 5>,
+ <&cpu2_intc 5>,
+ <&cpu3_intc 5>,
+ <&cpu4_intc 5>;
+ };
+
osc: oscillator {
compatible = "fixed-clock";
clock-output-names = "osc";
diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
index 009a26885c..bf4c9af622 100644
--- a/arch/riscv/include/asm/sbi.h
+++ b/arch/riscv/include/asm/sbi.h
@@ -170,5 +170,6 @@ int sbi_get_mvendorid(long *mvendorid);
int sbi_get_marchid(long *marchid);
int sbi_get_mimpid(long *mimpid);
void sbi_srst_reset(unsigned long type, unsigned long reason);
+int sbi_dbcn_write_byte(unsigned char ch);
#endif
diff --git a/arch/riscv/lib/sbi.c b/arch/riscv/lib/sbi.c
index 8724e3a460..55a3bc3b5c 100644
--- a/arch/riscv/lib/sbi.c
+++ b/arch/riscv/lib/sbi.c
@@ -204,6 +204,22 @@ void sbi_srst_reset(unsigned long type, unsigned long reason)
0, 0, 0, 0);
}
+/**
+ * sbi_dbcn_write_byte() - write byte to debug console
+ *
+ * @ch: byte to be written
+ * Return: SBI error code (SBI_SUCCESS = 0 on success)
+ */
+int sbi_dbcn_write_byte(unsigned char ch)
+{
+ struct sbiret ret;
+
+ ret = sbi_ecall(SBI_EXT_DBCN,
+ SBI_EXT_DBCN_CONSOLE_WRITE_BYTE,
+ ch, 0, 0, 0, 0, 0);
+ return ret.error;
+}
+
#ifdef CONFIG_SBI_V01
/**