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-rw-r--r--arch/riscv/cpu/cpu.c4
-rw-r--r--arch/riscv/cpu/fu540/dram.c2
-rw-r--r--arch/riscv/cpu/fu740/dram.c2
-rw-r--r--arch/riscv/cpu/generic/dram.c2
-rw-r--r--arch/riscv/cpu/start.S17
5 files changed, 16 insertions, 11 deletions
diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c
index 3ffcbbd23f..52ab02519f 100644
--- a/arch/riscv/cpu/cpu.c
+++ b/arch/riscv/cpu/cpu.c
@@ -19,15 +19,17 @@
* The variables here must be stored in the data section since they are used
* before the bss section is available.
*/
-#ifndef CONFIG_XIP
+#if !CONFIG_IS_ENABLED(XIP)
u32 hart_lottery __section(".data") = 0;
+#ifdef CONFIG_AVAILABLE_HARTS
/*
* The main hart running U-Boot has acquired available_harts_lock until it has
* finished initialization of global data.
*/
u32 available_harts_lock = 1;
#endif
+#endif
static inline bool supports_extension(char ext)
{
diff --git a/arch/riscv/cpu/fu540/dram.c b/arch/riscv/cpu/fu540/dram.c
index 1fdc7837b8..44e11bd56c 100644
--- a/arch/riscv/cpu/fu540/dram.c
+++ b/arch/riscv/cpu/fu540/dram.c
@@ -21,7 +21,7 @@ int dram_init_banksize(void)
return fdtdec_setup_memory_banksize();
}
-ulong board_get_usable_ram_top(ulong total_size)
+phys_size_t board_get_usable_ram_top(phys_size_t total_size)
{
/*
* Ensure that we run from first 4GB so that all
diff --git a/arch/riscv/cpu/fu740/dram.c b/arch/riscv/cpu/fu740/dram.c
index 1dc77efeca..d6d4a41d25 100644
--- a/arch/riscv/cpu/fu740/dram.c
+++ b/arch/riscv/cpu/fu740/dram.c
@@ -20,7 +20,7 @@ int dram_init_banksize(void)
return fdtdec_setup_memory_banksize();
}
-ulong board_get_usable_ram_top(ulong total_size)
+phys_size_t board_get_usable_ram_top(phys_size_t total_size)
{
#ifdef CONFIG_64BIT
/*
diff --git a/arch/riscv/cpu/generic/dram.c b/arch/riscv/cpu/generic/dram.c
index 1fdc7837b8..44e11bd56c 100644
--- a/arch/riscv/cpu/generic/dram.c
+++ b/arch/riscv/cpu/generic/dram.c
@@ -21,7 +21,7 @@ int dram_init_banksize(void)
return fdtdec_setup_memory_banksize();
}
-ulong board_get_usable_ram_top(ulong total_size)
+phys_size_t board_get_usable_ram_top(phys_size_t total_size)
{
/*
* Ensure that we run from first 4GB so that all
diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S
index b7f21ab63e..4687bca3c9 100644
--- a/arch/riscv/cpu/start.S
+++ b/arch/riscv/cpu/start.S
@@ -122,7 +122,7 @@ call_board_init_f_0:
call_harts_early_init:
jal harts_early_init
-#ifndef CONFIG_XIP
+#if !CONFIG_IS_ENABLED(XIP)
/*
* Pick hart to initialize global data and run U-Boot. The other harts
* wait for initialization to complete.
@@ -152,22 +152,24 @@ call_harts_early_init:
/* save the boot hart id to global_data */
SREG tp, GD_BOOT_HART(gp)
-#ifndef CONFIG_XIP
+#if !CONFIG_IS_ENABLED(XIP)
+#ifdef CONFIG_AVAILABLE_HARTS
la t0, available_harts_lock
amoswap.w.rl zero, zero, 0(t0)
+#endif
wait_for_gd_init:
- la t0, available_harts_lock
- li t1, 1
-1: amoswap.w.aq t1, t1, 0(t0)
- bnez t1, 1b
-
/*
* Set the global data pointer only when gd_t has been initialized.
* This was already set by arch_setup_gd on the boot hart, but all other
* harts' global data pointers gets set here.
*/
mv gp, s0
+#ifdef CONFIG_AVAILABLE_HARTS
+ la t0, available_harts_lock
+ li t1, 1
+1: amoswap.w.aq t1, t1, 0(t0)
+ bnez t1, 1b
/* register available harts in the available_harts mask */
li t1, 1
@@ -177,6 +179,7 @@ wait_for_gd_init:
SREG t2, GD_AVAILABLE_HARTS(gp)
amoswap.w.rl zero, zero, 0(t0)
+#endif
/*
* Continue on hart lottery winner, others branch to