diff options
Diffstat (limited to 'arch/powerpc')
-rw-r--r-- | arch/powerpc/cpu/mpc8260/ether_fcc.c | 13 | ||||
-rw-r--r-- | arch/powerpc/cpu/mpc85xx/Kconfig | 18 | ||||
-rw-r--r-- | arch/powerpc/cpu/mpc85xx/cpu_init.c | 4 | ||||
-rw-r--r-- | arch/powerpc/cpu/mpc85xx/ether_fcc.c | 13 | ||||
-rw-r--r-- | arch/powerpc/cpu/mpc85xx/mp.c | 2 | ||||
-rw-r--r-- | arch/powerpc/cpu/mpc85xx/start.S | 12 | ||||
-rw-r--r-- | arch/powerpc/cpu/mpc86xx/config.mk | 2 | ||||
-rw-r--r-- | arch/powerpc/cpu/mpc8xx/fec.c | 40 | ||||
-rw-r--r-- | arch/powerpc/cpu/mpc8xxx/fsl_pamu.c | 8 | ||||
-rw-r--r-- | arch/powerpc/cpu/mpc8xxx/pamu_table.c | 8 | ||||
-rw-r--r-- | arch/powerpc/cpu/ppc4xx/Kconfig | 1 | ||||
-rw-r--r-- | arch/powerpc/cpu/ppc4xx/miiphy.c | 11 | ||||
-rw-r--r-- | arch/powerpc/cpu/ppc4xx/start.S | 68 | ||||
-rw-r--r-- | arch/powerpc/include/asm/arch-mpc85xx/gpio.h | 6 | ||||
-rw-r--r-- | arch/powerpc/include/asm/fsl_secure_boot.h | 45 | ||||
-rw-r--r-- | arch/powerpc/include/asm/immap_85xx.h | 2 | ||||
-rw-r--r-- | arch/powerpc/include/asm/status_led.h | 2 |
17 files changed, 194 insertions, 61 deletions
diff --git a/arch/powerpc/cpu/mpc8260/ether_fcc.c b/arch/powerpc/cpu/mpc8260/ether_fcc.c index a11ad1e9d0..072eb76150 100644 --- a/arch/powerpc/cpu/mpc8260/ether_fcc.c +++ b/arch/powerpc/cpu/mpc8260/ether_fcc.c @@ -379,8 +379,17 @@ int fec_initialize(bd_t *bis) #if (defined(CONFIG_MII) || defined(CONFIG_CMD_MII)) \ && defined(CONFIG_BITBANGMII) - miiphy_register(dev->name, - bb_miiphy_read, bb_miiphy_write); + int retval; + struct mii_dev *mdiodev = mdio_alloc(); + if (!mdiodev) + return -ENOMEM; + strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN); + mdiodev->read = bb_miiphy_read; + mdiodev->write = bb_miiphy_write; + + retval = mdio_register(mdiodev); + if (retval < 0) + return retval; #endif } diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index 0b89157fca..9bcbda006d 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -17,6 +17,7 @@ config TARGET_SOCRATES config TARGET_B4860QDS bool "Support B4860QDS" select SUPPORT_SPL + select PHYS_64BIT config TARGET_BSC9131RDB bool "Support BSC9131RDB" @@ -30,18 +31,23 @@ config TARGET_C29XPCIE bool "Support C29XPCIE" select SUPPORT_SPL select SUPPORT_TPL + select PHYS_64BIT config TARGET_P3041DS bool "Support P3041DS" + select PHYS_64BIT config TARGET_P4080DS bool "Support P4080DS" + select PHYS_64BIT config TARGET_P5020DS bool "Support P5020DS" + select PHYS_64BIT config TARGET_P5040DS bool "Support P5040DS" + select PHYS_64BIT config TARGET_MPC8536DS bool "Support MPC8536DS" @@ -96,46 +102,57 @@ config TARGET_P1_TWR config TARGET_P2041RDB bool "Support P2041RDB" + select PHYS_64BIT config TARGET_QEMU_PPCE500 bool "Support qemu-ppce500" + select PHYS_64BIT config TARGET_T102XQDS bool "Support T102xQDS" select SUPPORT_SPL + select PHYS_64BIT config TARGET_T102XRDB bool "Support T102xRDB" select SUPPORT_SPL + select PHYS_64BIT config TARGET_T1040QDS bool "Support T1040QDS" + select PHYS_64BIT config TARGET_T104XRDB bool "Support T104xRDB" select SUPPORT_SPL + select PHYS_64BIT config TARGET_T208XQDS bool "Support T208xQDS" select SUPPORT_SPL + select PHYS_64BIT config TARGET_T208XRDB bool "Support T208xRDB" select SUPPORT_SPL + select PHYS_64BIT config TARGET_T4240QDS bool "Support T4240QDS" select SUPPORT_SPL + select PHYS_64BIT config TARGET_T4240RDB bool "Support T4240RDB" select SUPPORT_SPL + select PHYS_64BIT config TARGET_CONTROLCENTERD bool "Support controlcenterd" config TARGET_KMP204X bool "Support kmp204x" + select PHYS_64BIT config TARGET_XPEDITE520X bool "Support xpedite520x" @@ -151,6 +168,7 @@ config TARGET_UCP1020 config TARGET_CYRUS bool "Support Varisys Cyrus" + select PHYS_64BIT endchoice diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c index 61f5639e0d..ace42799f7 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -439,7 +439,7 @@ ulong cpu_init_f(void) #ifdef CONFIG_SYS_DCSRBAR_PHYS ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); #endif -#if defined(CONFIG_SECURE_BOOT) +#if defined(CONFIG_SECURE_BOOT) && !defined(CONFIG_SYS_RAMBOOT) struct law_entry law; #endif #ifdef CONFIG_MPC8548 @@ -459,7 +459,7 @@ ulong cpu_init_f(void) disable_tlb(14); disable_tlb(15); -#if defined(CONFIG_SECURE_BOOT) +#if defined(CONFIG_SECURE_BOOT) && !defined(CONFIG_SYS_RAMBOOT) /* Disable the LAW created for NOR flash by the PBI commands */ law = find_law(CONFIG_SYS_PBI_FLASH_BASE); if (law.index != -1) diff --git a/arch/powerpc/cpu/mpc85xx/ether_fcc.c b/arch/powerpc/cpu/mpc85xx/ether_fcc.c index 51f1beef51..7708f059ca 100644 --- a/arch/powerpc/cpu/mpc85xx/ether_fcc.c +++ b/arch/powerpc/cpu/mpc85xx/ether_fcc.c @@ -441,8 +441,17 @@ int fec_initialize(bd_t *bis) #if (defined(CONFIG_MII) || defined(CONFIG_CMD_MII)) \ && defined(CONFIG_BITBANGMII) - miiphy_register(dev->name, - bb_miiphy_read, bb_miiphy_write); + int retval; + struct mii_dev *mdiodev = mdio_alloc(); + if (!mdiodev) + return -ENOMEM; + strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN); + mdiodev->read = bb_miiphy_read; + mdiodev->write = bb_miiphy_write; + + retval = mdio_register(mdiodev); + if (retval < 0) + return retval; #endif } diff --git a/arch/powerpc/cpu/mpc85xx/mp.c b/arch/powerpc/cpu/mpc85xx/mp.c index 88c8e65930..0addf8493c 100644 --- a/arch/powerpc/cpu/mpc85xx/mp.c +++ b/arch/powerpc/cpu/mpc85xx/mp.c @@ -30,7 +30,7 @@ u32 get_my_id() */ int hold_cores_in_reset(int verbose) { - /* Default to no, overriden by 'y', 'yes', 'Y', 'Yes', or '1' */ + /* Default to no, overridden by 'y', 'yes', 'Y', 'Yes', or '1' */ if (getenv_yesno("mp_holdoff") == 1) { if (verbose) { puts("Secondary cores are being held in reset.\n"); diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S index 4c51225868..c3e12349f7 100644 --- a/arch/powerpc/cpu/mpc85xx/start.S +++ b/arch/powerpc/cpu/mpc85xx/start.S @@ -1069,17 +1069,23 @@ create_init_ram_area: #elif !defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_SECURE_BOOT) /* create a temp mapping in AS = 1 for Flash mapping * created by PBL for ISBC code - */ + */ create_tlb1_entry 15, \ 1, BOOKE_PAGESZ_1M, \ CONFIG_SYS_MONITOR_BASE & 0xfff00000, MAS2_I|MAS2_G, \ CONFIG_SYS_PBI_FLASH_WINDOW & 0xfff00000, MAS3_SX|MAS3_SW|MAS3_SR, \ 0, r6 -#elif defined(CONFIG_RAMBOOT_PBL) && defined(CONFIG_SECURE_BOOT) +/* + * For Targets without CONFIG_SPL like P3, P5 + * and for targets with CONFIG_SPL like T1, T2, T4, only for + * u-boot-spl i.e. CONFIG_SPL_BUILD + */ +#elif defined(CONFIG_RAMBOOT_PBL) && defined(CONFIG_SECURE_BOOT) && \ + (!defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)) /* create a temp mapping in AS = 1 for mapping CONFIG_SYS_MONITOR_BASE * to L3 Address configured by PBL for ISBC code - */ + */ create_tlb1_entry 15, \ 1, BOOKE_PAGESZ_1M, \ CONFIG_SYS_MONITOR_BASE & 0xfff00000, MAS2_I|MAS2_G, \ diff --git a/arch/powerpc/cpu/mpc86xx/config.mk b/arch/powerpc/cpu/mpc86xx/config.mk index 69a0b96ead..aefb0f1fb4 100644 --- a/arch/powerpc/cpu/mpc86xx/config.mk +++ b/arch/powerpc/cpu/mpc86xx/config.mk @@ -5,4 +5,4 @@ # SPDX-License-Identifier: GPL-2.0+ # -PLATFORM_CPPFLAGS += -mstring -maltivec -mabi=altivec -msoft-float +PLATFORM_CPPFLAGS += -mcpu=7400 -mstring -maltivec -mabi=altivec -msoft-float diff --git a/arch/powerpc/cpu/mpc8xx/fec.c b/arch/powerpc/cpu/mpc8xx/fec.c index f1ae358466..0940906b1d 100644 --- a/arch/powerpc/cpu/mpc8xx/fec.c +++ b/arch/powerpc/cpu/mpc8xx/fec.c @@ -6,10 +6,12 @@ */ #include <common.h> -#include <malloc.h> +#include <command.h> #include <commproc.h> +#include <malloc.h> #include <net.h> -#include <command.h> + +#include <phy.h> DECLARE_GLOBAL_DATA_PTR; @@ -47,10 +49,9 @@ DECLARE_GLOBAL_DATA_PTR; static int mii_discover_phy(struct eth_device *dev); #endif -int fec8xx_miiphy_read(const char *devname, unsigned char addr, - unsigned char reg, unsigned short *value); -int fec8xx_miiphy_write(const char *devname, unsigned char addr, - unsigned char reg, unsigned short value); +int fec8xx_miiphy_read(struct mii_dev *bus, int addr, int devad, int reg); +int fec8xx_miiphy_write(struct mii_dev *bus, int addr, int devad, int reg, + u16 value); static struct ether_fcc_info_s { @@ -170,8 +171,17 @@ int fec_initialize(bd_t *bis) eth_register(dev); #if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) - miiphy_register(dev->name, - fec8xx_miiphy_read, fec8xx_miiphy_write); + int retval; + struct mii_dev *mdiodev = mdio_alloc(); + if (!mdiodev) + return -ENOMEM; + strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN); + mdiodev->read = fec8xx_miiphy_read; + mdiodev->write = fec8xx_miiphy_write; + + retval = mdio_register(mdiodev); + if (retval < 0) + return retval; #endif } return 1; @@ -894,9 +904,9 @@ void mii_init (void) * Otherwise they hang in mii_send() !!! Sorry! *****************************************************************************/ -int fec8xx_miiphy_read(const char *devname, unsigned char addr, - unsigned char reg, unsigned short *value) +int fec8xx_miiphy_read(struct mii_dev *bus, int addr, int devad, int reg) { + unsigned short value = 0; short rdreg; /* register working value */ #ifdef MII_DEBUG @@ -904,15 +914,15 @@ int fec8xx_miiphy_read(const char *devname, unsigned char addr, #endif rdreg = mii_send(mk_mii_read(addr, reg)); - *value = rdreg; + value = rdreg; #ifdef MII_DEBUG - printf ("0x%04x\n", *value); + printf ("0x%04x\n", value); #endif - return 0; + return value; } -int fec8xx_miiphy_write(const char *devname, unsigned char addr, - unsigned char reg, unsigned short value) +int fec8xx_miiphy_write(struct mii_dev *bus, int addr, int devad, int reg, + u16 value) { #ifdef MII_DEBUG printf ("miiphy_write(0x%x) @ 0x%x = ", reg, addr); diff --git a/arch/powerpc/cpu/mpc8xxx/fsl_pamu.c b/arch/powerpc/cpu/mpc8xxx/fsl_pamu.c index 9421f1ebf6..ede8e66210 100644 --- a/arch/powerpc/cpu/mpc8xxx/fsl_pamu.c +++ b/arch/powerpc/cpu/mpc8xxx/fsl_pamu.c @@ -239,15 +239,23 @@ int pamu_init(void) spaact_size = sizeof(struct paace) * NUM_SPAACT_ENTRIES; /* Allocate space for Primary PAACT Table */ +#if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_PPAACT_ADDR)) + ppaact = (void *)CONFIG_SPL_PPAACT_ADDR; +#else ppaact = memalign(PAMU_TABLE_ALIGNMENT, ppaact_size); if (!ppaact) return -1; +#endif memset(ppaact, 0, ppaact_size); /* Allocate space for Secondary PAACT Table */ +#if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SPAACT_ADDR)) + sec = (void *)CONFIG_SPL_SPAACT_ADDR; +#else sec = memalign(PAMU_TABLE_ALIGNMENT, spaact_size); if (!sec) return -1; +#endif memset(sec, 0, spaact_size); ppaact_phys = virt_to_phys((void *)ppaact); diff --git a/arch/powerpc/cpu/mpc8xxx/pamu_table.c b/arch/powerpc/cpu/mpc8xxx/pamu_table.c index 26c5ea4fd7..a8e6f51777 100644 --- a/arch/powerpc/cpu/mpc8xxx/pamu_table.c +++ b/arch/powerpc/cpu/mpc8xxx/pamu_table.c @@ -28,6 +28,14 @@ void construct_pamu_addr_table(struct pamu_addr_tbl *tbl, int *num_entries) i++; #endif +#if (defined(CONFIG_SPL_BUILD) && (CONFIG_SYS_INIT_L3_VADDR)) + tbl->start_addr[i] = + (uint64_t)virt_to_phys((void *)CONFIG_SYS_INIT_L3_VADDR); + tbl->size[i] = 256 * 1024; /* 256K CPC flash */ + tbl->end_addr[i] = tbl->start_addr[i] + tbl->size[i] - 1; + + i++; +#endif debug("PAMU address\t\t\tsize\n"); for (j = 0; j < i ; j++) debug("%llx \t\t\t%llx\n", tbl->start_addr[j], tbl->size[j]); diff --git a/arch/powerpc/cpu/ppc4xx/Kconfig b/arch/powerpc/cpu/ppc4xx/Kconfig index 36af1b9419..92a330dc63 100644 --- a/arch/powerpc/cpu/ppc4xx/Kconfig +++ b/arch/powerpc/cpu/ppc4xx/Kconfig @@ -30,6 +30,7 @@ config TARGET_CANYONLANDS config TARGET_KATMAI bool "Support katmai" + select PHYS_64BIT config TARGET_KILAUEA bool "Support kilauea" diff --git a/arch/powerpc/cpu/ppc4xx/miiphy.c b/arch/powerpc/cpu/ppc4xx/miiphy.c index 10147de089..f0fc098059 100644 --- a/arch/powerpc/cpu/ppc4xx/miiphy.c +++ b/arch/powerpc/cpu/ppc4xx/miiphy.c @@ -318,8 +318,7 @@ static int emac_miiphy_command(u8 addr, u8 reg, int cmd, u16 value) return 0; } -int emac4xx_miiphy_read (const char *devname, unsigned char addr, unsigned char reg, - unsigned short *value) +int emac4xx_miiphy_read(struct mii_dev *bus, int addr, int devad, int reg) { unsigned long sta_reg; unsigned long emac_reg; @@ -330,17 +329,15 @@ int emac4xx_miiphy_read (const char *devname, unsigned char addr, unsigned char return -1; sta_reg = in_be32((void *)EMAC0_STACR + emac_reg); - *value = sta_reg >> 16; - - return 0; + return sta_reg >> 16; } /***********************************************************/ /* write a phy reg and return the value with a rc */ /***********************************************************/ -int emac4xx_miiphy_write (const char *devname, unsigned char addr, unsigned char reg, - unsigned short value) +int emac4xx_miiphy_write(struct mii_dev *bus, int addr, int devad, int reg, + u16 value) { return emac_miiphy_command(addr, reg, EMAC_STACR_WRITE, value); } diff --git a/arch/powerpc/cpu/ppc4xx/start.S b/arch/powerpc/cpu/ppc4xx/start.S index b432b18c74..7633abc1a1 100644 --- a/arch/powerpc/cpu/ppc4xx/start.S +++ b/arch/powerpc/cpu/ppc4xx/start.S @@ -144,7 +144,7 @@ #endif /* - * Unless otherwise overriden, enable two 128MB cachable instruction regions + * Unless otherwise overridden, enable two 128MB cachable instruction regions * at CONFIG_SYS_SDRAM_BASE and another 128MB cacheable instruction region covering * NOR flash at CONFIG_SYS_FLASH_BASE. Disable all cacheable data regions. */ @@ -743,8 +743,16 @@ _start: /*----------------------------------------------------------------*/ /* Setup the stack in internal SRAM */ /*----------------------------------------------------------------*/ - lis r1,CONFIG_SYS_INIT_RAM_ADDR@h - ori r1,r1,CONFIG_SYS_INIT_SP_OFFSET@l + lis r1, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE)@h + ori r1, r1, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE)@l + /* + * Reserve space for globals and store address for initialization + * with board_init_f_init_reserve() in r14 + */ + mr r3, r1 + bl board_init_f_alloc_reserve + mr r1, r3 + mr r14, r3 li r0,0 stwu r0,-4(r1) stwu r0,-4(r1) /* Terminate call chain */ @@ -760,13 +768,9 @@ _start: #endif bl cpu_init_f /* run low-level CPU init code (from Flash) */ - mr r3, r1 - bl board_init_f_alloc_reserve - mr r1, r3 + /* address for globals was stored in r14 */ + mr r3, r14 bl board_init_f_init_reserve - li r0,0 - stwu r0, -4(r1) - stwu r0, -4(r1) li r3, 0 bl board_init_f /* NOTREACHED - board_init_f() does not return */ @@ -831,8 +835,16 @@ _start: * for their primordial stack, setup stack here directly after the * SDRAM is initialized in ext_bus_cntlr_init. */ - lis r1, CONFIG_SYS_INIT_RAM_ADDR@h - ori r1,r1,CONFIG_SYS_INIT_SP_OFFSET /* set up the stack in SDRAM */ + lis r1, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE)@h + ori r1, r1, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE)@l + /* + * Reserve space for globals and store address for initialization + * with board_init_f_init_reserve() in r14 + */ + mr r3, r1 + bl board_init_f_alloc_reserve + mr r1, r3 + mr r14, r3 li r0, 0 /* Make room for stack frame header and */ stwu r0, -4(r1) /* clear final stack frame so that */ @@ -972,8 +984,16 @@ _start: * Load the initial stack pointer and data area and convert the size, * in bytes, to the number of words to initialize to a known value. */ - lis r1, CONFIG_SYS_INIT_RAM_ADDR@h - ori r1, r1, CONFIG_SYS_INIT_SP_OFFSET@l + lis r1, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE)@h + ori r1, r1, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE)@l + /* + * Reserve space for globals and store address for initialization + * with board_init_f_init_reserve() in r14 + */ + mr r3, r1 + bl board_init_f_alloc_reserve + mr r1, r3 + mr r14, r3 lis r4, (CONFIG_SYS_INIT_RAM_SIZE >> 2)@h ori r4, r4, (CONFIG_SYS_INIT_RAM_SIZE >> 2)@l @@ -993,6 +1013,7 @@ _start: * Make room for stack frame header and clear final stack frame so * that stack backtraces terminate cleanly. */ + li r0, 0 stwu r0, -4(r1) stwu r0, -4(r1) @@ -1011,10 +1032,16 @@ _start: /* * Stack in OCM. */ - - /* Set up Stack at top of OCM */ - lis r1, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)@h - ori r1, r1, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)@l + lis r1, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE)@h + ori r1, r1, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE)@l + /* + * Reserve space for globals and store address for initialization + * with board_init_f_init_reserve() in r14 + */ + mr r3, r1 + bl board_init_f_alloc_reserve + mr r1, r3 + mr r14, r3 /* Set up a zeroized stack frame so that backtrace works right */ li r0, 0 @@ -1035,12 +1062,9 @@ _start: GET_GOT /* initialize GOT access */ bl cpu_init_f /* run low-level CPU init code (from Flash) */ - mr r3, r1 - bl board_init_f_alloc_reserve - mr r1, r3 + /* address for globals was stored in r14 */ + mr r3, r14 bl board_init_f_init_reserve - stwu r0, -4(r1) - stwu r0, -4(r1) li r3, 0 bl board_init_f /* run first part of init code (from Flash) */ /* NOTREACHED - board_init_f() does not return */ diff --git a/arch/powerpc/include/asm/arch-mpc85xx/gpio.h b/arch/powerpc/include/asm/arch-mpc85xx/gpio.h index 41b6677bba..76faa22c8b 100644 --- a/arch/powerpc/include/asm/arch-mpc85xx/gpio.h +++ b/arch/powerpc/include/asm/arch-mpc85xx/gpio.h @@ -18,4 +18,10 @@ #include <asm/mpc85xx_gpio.h> #endif +struct mpc85xx_gpio_plat { + ulong addr; + unsigned long size; + uint ngpios; +}; + #endif diff --git a/arch/powerpc/include/asm/fsl_secure_boot.h b/arch/powerpc/include/asm/fsl_secure_boot.h index 826f9c960e..2e937f0364 100644 --- a/arch/powerpc/include/asm/fsl_secure_boot.h +++ b/arch/powerpc/include/asm/fsl_secure_boot.h @@ -35,7 +35,9 @@ defined(CONFIG_T104xD4RDB) || \ defined(CONFIG_PPC_T1023) || \ defined(CONFIG_PPC_T1024) +#ifndef CONFIG_SYS_RAMBOOT #define CONFIG_SYS_CPC_REINIT_F +#endif #define CONFIG_KEY_REVOCATION #undef CONFIG_SYS_INIT_L3_ADDR #define CONFIG_SYS_INIT_L3_ADDR 0xbff00000 @@ -43,7 +45,13 @@ #if defined(CONFIG_RAMBOOT_PBL) #undef CONFIG_SYS_INIT_L3_ADDR -#define CONFIG_SYS_INIT_L3_ADDR 0xbff00000 +#ifdef CONFIG_SYS_INIT_L3_VADDR +#define CONFIG_SYS_INIT_L3_ADDR \ + (CONFIG_SYS_INIT_L3_VADDR & ~0xFFF00000) | \ + 0xbff00000 +#else +#define CONFIG_SYS_INIT_L3_ADDR 0xbff00000 +#endif #endif #if defined(CONFIG_C29XPCIE) @@ -72,6 +80,32 @@ #ifdef CONFIG_CHAIN_OF_TRUST +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SPL_DM 1 +#define CONFIG_SPL_CRYPTO_SUPPORT +#define CONFIG_SPL_HASH_SUPPORT +#define CONFIG_SPL_RSA +#define CONFIG_SPL_DRIVERS_MISC_SUPPORT +/* + * PPAACT and SPAACT table for PAMU must be placed on DDR after DDR init + * due to space crunch on CPC and thus malloc will not work. + */ +#define CONFIG_SPL_PPAACT_ADDR 0x2e000000 +#define CONFIG_SPL_SPAACT_ADDR 0x2f000000 +#define CONFIG_SPL_JR0_LIODN_S 454 +#define CONFIG_SPL_JR0_LIODN_NS 458 +/* + * Define the key hash for U-Boot here if public/private key pair used to + * sign U-boot are different from the SRK hash put in the fuse + * Example of defining KEY_HASH is + * #define CONFIG_SPL_UBOOT_KEY_HASH \ + * "41066b564c6ffcef40ccbc1e0a5d0d519604000c785d97bbefd25e4d288d1c8b" + * else leave it defined as NULL + */ + +#define CONFIG_SPL_UBOOT_KEY_HASH NULL +#endif /* ifdef CONFIG_SPL_BUILD */ + #define CONFIG_CMD_ESBC_VALIDATE #define CONFIG_CMD_BLOB #define CONFIG_FSL_SEC_MON @@ -82,7 +116,9 @@ #define CONFIG_FSL_CAAM #endif -/* fsl_setenv_chain_of_trust() must be called from +#ifndef CONFIG_SPL_BUILD +/* + * fsl_setenv_chain_of_trust() must be called from * board_late_init() */ #ifndef CONFIG_BOARD_LATE_INIT @@ -92,10 +128,10 @@ /* If Boot Script is not on NOR and is required to be copied on RAM */ #ifdef CONFIG_BOOTSCRIPT_COPY_RAM #define CONFIG_BS_HDR_ADDR_RAM 0x00010000 -#define CONFIG_BS_HDR_ADDR_FLASH 0x00800000 +#define CONFIG_BS_HDR_ADDR_DEVICE 0x00800000 #define CONFIG_BS_HDR_SIZE 0x00002000 #define CONFIG_BS_ADDR_RAM 0x00012000 -#define CONFIG_BS_ADDR_FLASH 0x00802000 +#define CONFIG_BS_ADDR_DEVICE 0x00802000 #define CONFIG_BS_SIZE 0x00001000 #define CONFIG_BOOTSCRIPT_HDR_ADDR CONFIG_BS_HDR_ADDR_RAM @@ -119,5 +155,6 @@ #endif /* #ifdef CONFIG_BOOTSCRIPT_COPY_RAM */ #include <config_fsl_chain_trust.h> +#endif /* #ifndef CONFIG_SPL_BUILD */ #endif /* #ifdef CONFIG_CHAIN_OF_TRUST */ #endif diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index c045a24d1a..7a878be3e9 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -1579,7 +1579,7 @@ typedef struct cpc_corenet { #define CPC_HDBCR0_CDQ_SPEC_DIS 0x08000000 #define CPC_HDBCR0_TAG_ECC_SCRUB_DIS 0x01000000 #define CPC_HDBCR0_DATA_ECC_SCRUB_DIS 0x00400000 -#define CPC_HDBCR0_SPLRU_LEVEL_EN 0x003c0000 +#define CPC_HDBCR0_SPLRU_LEVEL_EN 0x001e0000 #endif /* CONFIG_SYS_FSL_CPC */ /* Global Utilities Block */ diff --git a/arch/powerpc/include/asm/status_led.h b/arch/powerpc/include/asm/status_led.h index 441619042d..260a8319ce 100644 --- a/arch/powerpc/include/asm/status_led.h +++ b/arch/powerpc/include/asm/status_led.h @@ -7,7 +7,7 @@ #ifndef __ASM_STATUS_LED_H__ #define __ASM_STATUS_LED_H__ -/* if not overriden */ +/* if not overridden */ #ifndef CONFIG_BOARD_SPECIFIC_LED # if defined(CONFIG_8xx) # include <mpc8xx.h> |