diff options
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/cpu/arm926ejs/omap/Makefile | 10 | ||||
| -rw-r--r-- | arch/arm/cpu/arm926ejs/omap/cpuinfo.c | 242 | ||||
| -rw-r--r-- | arch/arm/cpu/arm926ejs/omap/reset.S | 29 | ||||
| -rw-r--r-- | arch/arm/cpu/arm926ejs/omap/timer.c | 152 | ||||
| -rw-r--r-- | arch/arm/cpu/armv8/start.S | 4 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-mx7ulp/clock.h | 2 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-omap5/clock.h | 7 | ||||
| -rw-r--r-- | arch/arm/include/asm/spl.h | 2 | ||||
| -rw-r--r-- | arch/arm/mach-at91/arm926ejs/at91sam9x5_devices.c | 2 | ||||
| -rw-r--r-- | arch/arm/mach-kirkwood/include/mach/config.h | 1 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/omap3/Kconfig | 54 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/omap5/Kconfig | 17 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/omap5/hwinit.c | 13 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/vc.c | 14 | ||||
| -rw-r--r-- | arch/arm/mach-uniphier/clk/clk-ld11.c | 2 | ||||
| -rw-r--r-- | arch/arm/mach-uniphier/clk/clk-ld4.c | 2 | ||||
| -rw-r--r-- | arch/arm/mach-uniphier/clk/clk-pro4.c | 2 |
17 files changed, 90 insertions, 465 deletions
diff --git a/arch/arm/cpu/arm926ejs/omap/Makefile b/arch/arm/cpu/arm926ejs/omap/Makefile deleted file mode 100644 index add923276c..0000000000 --- a/arch/arm/cpu/arm926ejs/omap/Makefile +++ /dev/null @@ -1,10 +0,0 @@ -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y = timer.o -obj-$(CONFIG_DISPLAY_CPUINFO) += cpuinfo.o -obj-y += reset.o diff --git a/arch/arm/cpu/arm926ejs/omap/cpuinfo.c b/arch/arm/cpu/arm926ejs/omap/cpuinfo.c deleted file mode 100644 index 587d99a2bb..0000000000 --- a/arch/arm/cpu/arm926ejs/omap/cpuinfo.c +++ /dev/null @@ -1,242 +0,0 @@ -/* - * OMAP1 CPU identification code - * - * Copyright (C) 2004 Nokia Corporation - * Written by Tony Lindgren <tony@atomide.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <common.h> -#include <command.h> -#include <linux/compiler.h> - -#if defined(CONFIG_OMAP) - -#define omap_readw(x) *(volatile unsigned short *)(x) -#define omap_readl(x) *(volatile unsigned long *)(x) - -#define OMAP_DIE_ID_0 0xfffe1800 -#define OMAP_DIE_ID_1 0xfffe1804 -#define OMAP_PRODUCTION_ID_0 0xfffe2000 -#define OMAP_PRODUCTION_ID_1 0xfffe2004 -#define OMAP32_ID_0 0xfffed400 -#define OMAP32_ID_1 0xfffed404 - -struct omap_id { - u16 jtag_id; /* Used to determine OMAP type */ - u8 die_rev; /* Processor revision */ - u32 omap_id; /* OMAP revision */ - u32 type; /* Cpu id bits [31:08], cpu class bits [07:00] */ -}; - -/* Register values to detect the OMAP version */ -static struct omap_id omap_ids[] = { - { .jtag_id = 0xb574, .die_rev = 0x2, .omap_id = 0x03310315, .type = 0x03100000}, - { .jtag_id = 0x355f, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x07300100}, - { .jtag_id = 0xb55f, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x07300300}, - { .jtag_id = 0xb470, .die_rev = 0x0, .omap_id = 0x03310100, .type = 0x15100000}, - { .jtag_id = 0xb576, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x16100000}, - { .jtag_id = 0xb576, .die_rev = 0x2, .omap_id = 0x03320100, .type = 0x16110000}, - { .jtag_id = 0xb576, .die_rev = 0x3, .omap_id = 0x03320100, .type = 0x16100c00}, - { .jtag_id = 0xb576, .die_rev = 0x0, .omap_id = 0x03320200, .type = 0x16100d00}, - { .jtag_id = 0xb613, .die_rev = 0x0, .omap_id = 0x03320300, .type = 0x1610ef00}, - { .jtag_id = 0xb613, .die_rev = 0x0, .omap_id = 0x03320300, .type = 0x1610ef00}, - { .jtag_id = 0xb576, .die_rev = 0x1, .omap_id = 0x03320100, .type = 0x16110000}, - { .jtag_id = 0xb58c, .die_rev = 0x2, .omap_id = 0x03320200, .type = 0x16110b00}, - { .jtag_id = 0xb58c, .die_rev = 0x3, .omap_id = 0x03320200, .type = 0x16110c00}, - { .jtag_id = 0xb65f, .die_rev = 0x0, .omap_id = 0x03320400, .type = 0x16212300}, - { .jtag_id = 0xb65f, .die_rev = 0x1, .omap_id = 0x03320400, .type = 0x16212300}, - { .jtag_id = 0xb65f, .die_rev = 0x1, .omap_id = 0x03320500, .type = 0x16212300}, - { .jtag_id = 0xb5f7, .die_rev = 0x0, .omap_id = 0x03330000, .type = 0x17100000}, - { .jtag_id = 0xb5f7, .die_rev = 0x1, .omap_id = 0x03330100, .type = 0x17100000}, - { .jtag_id = 0xb5f7, .die_rev = 0x2, .omap_id = 0x03330100, .type = 0x17100000}, -}; - -/* - * Get OMAP type from PROD_ID. - * 1710 has the PROD_ID in bits 15:00, not in 16:01 as documented in TRM. - * 1510 PROD_ID is empty, and 1610 PROD_ID does not make sense. - * Undocumented register in TEST BLOCK is used as fallback; This seems to - * work on 1510, 1610 & 1710. The official way hopefully will work in future - * processors. - */ -static u16 omap_get_jtag_id(void) -{ - u32 prod_id, omap_id; - - prod_id = omap_readl(OMAP_PRODUCTION_ID_1); - omap_id = omap_readl(OMAP32_ID_1); - - /* Check for unusable OMAP_PRODUCTION_ID_1 on 1611B/5912 and 730 */ - if (((prod_id >> 20) == 0) || (prod_id == omap_id)) - prod_id = 0; - else - prod_id &= 0xffff; - - if (prod_id) - return prod_id; - - /* Use OMAP32_ID_1 as fallback */ - prod_id = ((omap_id >> 12) & 0xffff); - - return prod_id; -} - -/* - * Get OMAP revision from DIE_REV. - * Early 1710 processors may have broken OMAP_DIE_ID, it contains PROD_ID. - * Undocumented register in the TEST BLOCK is used as fallback. - * REVISIT: This does not seem to work on 1510 - */ -static u8 omap_get_die_rev(void) -{ - u32 die_rev; - - die_rev = omap_readl(OMAP_DIE_ID_1); - - /* Check for broken OMAP_DIE_ID on early 1710 */ - if (((die_rev >> 12) & 0xffff) == omap_get_jtag_id()) - die_rev = 0; - - die_rev = (die_rev >> 17) & 0xf; - if (die_rev) - return die_rev; - - die_rev = (omap_readl(OMAP32_ID_1) >> 28) & 0xf; - - return die_rev; -} - -static unsigned long dpll1(void) -{ - unsigned short pll_ctl_val = omap_readw(DPLL_CTL_REG); - unsigned long rate; - - rate = CONFIG_SYS_CLK_FREQ; /* Base xtal rate */ - if (pll_ctl_val & 0x10) { - /* PLL enabled, apply multiplier and divisor */ - if (pll_ctl_val & 0xf80) - rate *= (pll_ctl_val & 0xf80) >> 7; - rate /= ((pll_ctl_val & 0x60) >> 5) + 1; - } else { - /* PLL disabled, apply bypass divisor */ - switch (pll_ctl_val & 0xc) { - case 0: - break; - case 0x4: - rate /= 2; - break; - default: - rate /= 4; - break; - } - } - - return rate; -} - -static unsigned long armcore(void) -{ - unsigned short arm_ckctl = omap_readw(ARM_CKCTL); - - return (dpll1() >> ((arm_ckctl & 0x0030) >> 4)); -} - -int print_cpuinfo (void) -{ - int i; - u16 jtag_id; - u8 die_rev; - u32 omap_id; - u8 cpu_type; - __maybe_unused u32 system_serial_high; - __maybe_unused u32 system_serial_low; - u32 system_rev = 0; - - jtag_id = omap_get_jtag_id(); - die_rev = omap_get_die_rev(); - omap_id = omap_readl(OMAP32_ID_0); - -#ifdef DEBUG - printf("OMAP_DIE_ID_0: 0x%08x\n", omap_readl(OMAP_DIE_ID_0)); - printf("OMAP_DIE_ID_1: 0x%08x DIE_REV: %i\n", - omap_readl(OMAP_DIE_ID_1), - (omap_readl(OMAP_DIE_ID_1) >> 17) & 0xf); - printf("OMAP_PRODUCTION_ID_0: 0x%08x\n", omap_readl(OMAP_PRODUCTION_ID_0)); - printf("OMAP_PRODUCTION_ID_1: 0x%08x JTAG_ID: 0x%04x\n", - omap_readl(OMAP_PRODUCTION_ID_1), - omap_readl(OMAP_PRODUCTION_ID_1) & 0xffff); - printf("OMAP32_ID_0: 0x%08x\n", omap_readl(OMAP32_ID_0)); - printf("OMAP32_ID_1: 0x%08x\n", omap_readl(OMAP32_ID_1)); - printf("JTAG_ID: 0x%04x DIE_REV: %i\n", jtag_id, die_rev); -#endif - - system_serial_high = omap_readl(OMAP_DIE_ID_0); - system_serial_low = omap_readl(OMAP_DIE_ID_1); - - /* First check only the major version in a safe way */ - for (i = 0; i < ARRAY_SIZE(omap_ids); i++) { - if (jtag_id == (omap_ids[i].jtag_id)) { - system_rev = omap_ids[i].type; - break; - } - } - - /* Check if we can find the die revision */ - for (i = 0; i < ARRAY_SIZE(omap_ids); i++) { - if (jtag_id == omap_ids[i].jtag_id && die_rev == omap_ids[i].die_rev) { - system_rev = omap_ids[i].type; - break; - } - } - - /* Finally check also the omap_id */ - for (i = 0; i < ARRAY_SIZE(omap_ids); i++) { - if (jtag_id == omap_ids[i].jtag_id - && die_rev == omap_ids[i].die_rev - && omap_id == omap_ids[i].omap_id) { - system_rev = omap_ids[i].type; - break; - } - } - - /* Add the cpu class info (7xx, 15xx, 16xx, 24xx) */ - cpu_type = system_rev >> 24; - - switch (cpu_type) { - case 0x07: - system_rev |= 0x07; - break; - case 0x03: - case 0x15: - system_rev |= 0x15; - break; - case 0x16: - case 0x17: - system_rev |= 0x16; - break; - case 0x24: - system_rev |= 0x24; - break; - default: - printf("Unknown OMAP cpu type: 0x%02x\n", cpu_type); - } - - printf("CPU: OMAP%04x", system_rev >> 16); - if ((system_rev >> 8) & 0xff) - printf("%x", (system_rev >> 8) & 0xff); -#ifdef DEBUG - printf(" revision %i handled as %02xxx id: %08x%08x", - die_rev, system_rev & 0xff, system_serial_low, system_serial_high); -#endif - printf(" at %ld.%01ld MHz (DPLL1=%ld.%01ld MHz)\n", - armcore() / 1000000, (armcore() / 100000) % 10, - dpll1() / 1000000, (dpll1() / 100000) % 10); - - return 0; -} - -#endif /* #if defined(CONFIG_OMAP) */ diff --git a/arch/arm/cpu/arm926ejs/omap/reset.S b/arch/arm/cpu/arm926ejs/omap/reset.S deleted file mode 100644 index 1c557b0d91..0000000000 --- a/arch/arm/cpu/arm926ejs/omap/reset.S +++ /dev/null @@ -1,29 +0,0 @@ -/* - * armboot - Startup Code for ARM926EJS CPU-core - * - * Copyright (c) 2003 Texas Instruments - * - * ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------ - * - * Copyright (c) 2001 Marius Gröger <mag@sysgo.de> - * Copyright (c) 2002 Alex Züpke <azu@sysgo.de> - * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de> - * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com> - * Copyright (c) 2003 Kshitij <kshitij@ti.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - - .align 5 -.globl reset_cpu -reset_cpu: - ldr r1, rstctl1 /* get clkm1 reset ctl */ - mov r3, #0x0 - strh r3, [r1] /* clear it */ - mov r3, #0x8 - strh r3, [r1] /* force dsp+arm reset */ -_loop_forever: - b _loop_forever - -rstctl1: - .word 0xfffece10 diff --git a/arch/arm/cpu/arm926ejs/omap/timer.c b/arch/arm/cpu/arm926ejs/omap/timer.c deleted file mode 100644 index b9715656c8..0000000000 --- a/arch/arm/cpu/arm926ejs/omap/timer.c +++ /dev/null @@ -1,152 +0,0 @@ -/* - * (C) Copyright 2003 - * Texas Instruments <www.ti.com> - * - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH <www.elinos.com> - * Marius Groeger <mgroeger@sysgo.de> - * - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH <www.elinos.com> - * Alex Zuepke <azu@sysgo.de> - * - * (C) Copyright 2002-2004 - * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> - * - * (C) Copyright 2004 - * Philippe Robin, ARM Ltd. <philippe.robin@arm.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <asm/io.h> - -#define TIMER_CLOCK (CONFIG_SYS_CLK_FREQ / (2 << CONFIG_SYS_PTV)) -#define TIMER_LOAD_VAL 0xffffffff - -/* macro to read the 32 bit timer */ -#define READ_TIMER readl(CONFIG_SYS_TIMERBASE+8) \ - / (TIMER_CLOCK / CONFIG_SYS_HZ) - -DECLARE_GLOBAL_DATA_PTR; - -#define timestamp gd->arch.tbl -#define lastdec gd->arch.lastinc - -int timer_init (void) -{ - int32_t val; - - /* Start the decrementer ticking down from 0xffffffff */ - *((int32_t *) (CONFIG_SYS_TIMERBASE + LOAD_TIM)) = TIMER_LOAD_VAL; - val = MPUTIM_ST | MPUTIM_AR | MPUTIM_CLOCK_ENABLE | (CONFIG_SYS_PTV << MPUTIM_PTV_BIT); - *((int32_t *) (CONFIG_SYS_TIMERBASE + CNTL_TIMER)) = val; - - /* init the timestamp and lastdec value */ - reset_timer_masked(); - - return 0; -} - -/* - * timer without interrupts - */ -ulong get_timer (ulong base) -{ - return get_timer_masked () - base; -} - -/* delay x useconds AND preserve advance timestamp value */ -void __udelay (unsigned long usec) -{ - ulong tmo, tmp; - - if(usec >= 1000){ /* if "big" number, spread normalization to seconds */ - tmo = usec / 1000; /* start to normalize for usec to ticks per sec */ - tmo *= CONFIG_SYS_HZ; /* find number of "ticks" to wait to achieve target */ - tmo /= 1000; /* finish normalize. */ - }else{ /* else small number, don't kill it prior to HZ multiply */ - tmo = usec * CONFIG_SYS_HZ; - tmo /= (1000*1000); - } - - tmp = get_timer (0); /* get current timestamp */ - if( (tmo + tmp + 1) < tmp ) /* if setting this fordward will roll time stamp */ - reset_timer_masked (); /* reset "advancing" timestamp to 0, set lastdec value */ - else - tmo += tmp; /* else, set advancing stamp wake up time */ - - while (get_timer_masked () < tmo)/* loop till event */ - /*NOP*/; -} - -void reset_timer_masked (void) -{ - /* reset time */ - lastdec = READ_TIMER; /* capure current decrementer value time */ - timestamp = 0; /* start "advancing" time stamp from 0 */ -} - -ulong get_timer_masked (void) -{ - ulong now = READ_TIMER; /* current tick value */ - - if (lastdec >= now) { /* normal mode (non roll) */ - /* normal mode */ - timestamp += lastdec - now; /* move stamp fordward with absoulte diff ticks */ - } else { /* we have overflow of the count down timer */ - /* nts = ts + ld + (TLV - now) - * ts=old stamp, ld=time that passed before passing through -1 - * (TLV-now) amount of time after passing though -1 - * nts = new "advancing time stamp"...it could also roll and cause problems. - */ - timestamp += lastdec + (TIMER_LOAD_VAL / (TIMER_CLOCK / - CONFIG_SYS_HZ)) - now; - } - lastdec = now; - - return timestamp; -} - -/* waits specified delay value and resets timestamp */ -void udelay_masked (unsigned long usec) -{ - ulong tmo; - ulong endtime; - signed long diff; - - if (usec >= 1000) { /* if "big" number, spread normalization to seconds */ - tmo = usec / 1000; /* start to normalize for usec to ticks per sec */ - tmo *= CONFIG_SYS_HZ; /* find number of "ticks" to wait to achieve target */ - tmo /= 1000; /* finish normalize. */ - } else { /* else small number, don't kill it prior to HZ multiply */ - tmo = usec * CONFIG_SYS_HZ; - tmo /= (1000*1000); - } - - endtime = get_timer_masked () + tmo; - - do { - ulong now = get_timer_masked (); - diff = endtime - now; - } while (diff >= 0); -} - -/* - * This function is derived from PowerPC code (read timebase as long long). - * On ARM it just returns the timer value. - */ -unsigned long long get_ticks(void) -{ - return get_timer(0); -} - -/* - * This function is derived from PowerPC code (timebase clock frequency). - * On ARM it returns the number of timer ticks per second. - */ -ulong get_tbclk (void) -{ - return CONFIG_SYS_HZ; -} diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S index 62d97f7e88..354468b905 100644 --- a/arch/arm/cpu/armv8/start.S +++ b/arch/arm/cpu/armv8/start.S @@ -86,12 +86,12 @@ save_boot_params_ret: 0: /* - * Enalbe SMPEN bit for coherency. + * Enable SMPEN bit for coherency. * This register is not architectural but at the moment * this bit should be set for A53/A57/A72. */ #ifdef CONFIG_ARMV8_SET_SMPEN - mrs x0, S3_1_c15_c2_1 /* cpuactlr_el1 */ + mrs x0, S3_1_c15_c2_1 /* cpuectlr_el1 */ orr x0, x0, #0x40 msr S3_1_c15_c2_1, x0 #endif diff --git a/arch/arm/include/asm/arch-mx7ulp/clock.h b/arch/arm/include/asm/arch-mx7ulp/clock.h index 170a9b3a7c..6424fafe14 100644 --- a/arch/arm/include/asm/arch-mx7ulp/clock.h +++ b/arch/arm/include/asm/arch-mx7ulp/clock.h @@ -34,7 +34,7 @@ u32 imx_get_i2cclk(unsigned i2c_num); #ifdef CONFIG_MXC_OCOTP void enable_ocotp_clk(unsigned char enable); #endif -#ifdef CONFIG_USB_EHCI +#ifdef CONFIG_USB_EHCI_HCD void enable_usboh3_clk(unsigned char enable); #endif void init_clk_usdhc(u32 index); diff --git a/arch/arm/include/asm/arch-omap5/clock.h b/arch/arm/include/asm/arch-omap5/clock.h index 7ea7199f2b..0c99bbdc93 100644 --- a/arch/arm/include/asm/arch-omap5/clock.h +++ b/arch/arm/include/asm/arch-omap5/clock.h @@ -370,13 +370,6 @@ #define DPLL_NO_LOCK 0 #define DPLL_LOCK 1 -/* - * MAX value for PRM_RSTTIME[9:0]RSTTIME1 stored is 0x3ff. - * 0x3ff is in the no of FUNC_32K_CLK cycles. Converting cycles - * into microsec and passing the value. - */ -#define CONFIG_DEFAULT_OMAP_RESET_TIME_MAX_USEC 31219 - #if defined(CONFIG_DRA7XX) #define V_OSCK 20000000 /* Clock output from T2 */ #else diff --git a/arch/arm/include/asm/spl.h b/arch/arm/include/asm/spl.h index a0bda28104..5d7f7e6ec5 100644 --- a/arch/arm/include/asm/spl.h +++ b/arch/arm/include/asm/spl.h @@ -7,7 +7,7 @@ #ifndef _ASM_SPL_H_ #define _ASM_SPL_H_ -#if defined(CONFIG_OMAP) \ +#if defined(CONFIG_ARCH_OMAP2PLUS) \ || defined(CONFIG_EXYNOS4) || defined(CONFIG_EXYNOS5) \ || defined(CONFIG_EXYNOS4210) /* Platform-specific defines */ diff --git a/arch/arm/mach-at91/arm926ejs/at91sam9x5_devices.c b/arch/arm/mach-at91/arm926ejs/at91sam9x5_devices.c index 8de086efd6..a939b1fb8d 100644 --- a/arch/arm/mach-at91/arm926ejs/at91sam9x5_devices.c +++ b/arch/arm/mach-at91/arm926ejs/at91sam9x5_devices.c @@ -161,7 +161,7 @@ void at91_spi1_hw_init(unsigned long cs_mask) } #endif -#if defined(CONFIG_USB_OHCI_NEW) || defined(CONFIG_USB_EHCI) +#if defined(CONFIG_USB_OHCI_NEW) || defined(CONFIG_USB_EHCI_HCD) void at91_uhp_hw_init(void) { /* Enable VBus on UHP ports */ diff --git a/arch/arm/mach-kirkwood/include/mach/config.h b/arch/arm/mach-kirkwood/include/mach/config.h index b786df0aaf..c7beb58e80 100644 --- a/arch/arm/mach-kirkwood/include/mach/config.h +++ b/arch/arm/mach-kirkwood/include/mach/config.h @@ -89,7 +89,6 @@ * USB/EHCI */ #ifdef CONFIG_CMD_USB -#define CONFIG_USB_EHCI_MARVELL #define CONFIG_EHCI_IS_TDI #endif /* CONFIG_CMD_USB */ diff --git a/arch/arm/mach-omap2/omap3/Kconfig b/arch/arm/mach-omap2/omap3/Kconfig index 933fcba37c..7b298d671d 100644 --- a/arch/arm/mach-omap2/omap3/Kconfig +++ b/arch/arm/mach-omap2/omap3/Kconfig @@ -1,5 +1,21 @@ if OMAP34XX +# We only enable the clocks for the GPIO banks that a given board requies. +config OMAP3_GPIO_2 + bool + +config OMAP3_GPIO_3 + bool + +config OMAP3_GPIO_4 + bool + +config OMAP3_GPIO_5 + bool + +config OMAP3_GPIO_6 + bool + choice prompt "OMAP3 board select" optional @@ -9,18 +25,28 @@ config TARGET_AM3517_EVM config TARGET_MT_VENTOUX bool "TeeJet Mt.Ventoux" + select OMAP3_GPIO_4 + select OMAP3_GPIO_5 if USB_EHCI_HCD config TARGET_OMAP3_BEAGLE bool "TI OMAP3 BeagleBoard" select DM select DM_SERIAL select DM_GPIO + select OMAP3_GPIO_5 + select OMAP3_GPIO_6 config TARGET_CM_T35 bool "CompuLab CM-T3530 and CM-T3730 boards" + select OMAP3_GPIO_2 + select OMAP3_GPIO_5 + select OMAP3_GPIO_6 if LED_STATUS config TARGET_CM_T3517 bool "CompuLab CM-T3517 boards" + select OMAP3_GPIO_2 + select OMAP3_GPIO_5 + select OMAP3_GPIO_6 if LED_STATUS config TARGET_DEVKIT8000 bool "TimLL OMAP3 Devkit8000" @@ -36,12 +62,20 @@ config TARGET_OMAP3_IGEP00X0 select DM select DM_SERIAL select DM_GPIO + select OMAP3_GPIO_3 + select OMAP3_GPIO_5 + select OMAP3_GPIO_6 config TARGET_OMAP3_OVERO bool "OMAP35xx Gumstix Overo" select DM select DM_SERIAL select DM_GPIO + select OMAP3_GPIO_2 + select OMAP3_GPIO_3 + select OMAP3_GPIO_4 + select OMAP3_GPIO_5 + select OMAP3_GPIO_6 config TARGET_OMAP3_ZOOM1 bool "TI Zoom1" @@ -54,16 +88,22 @@ config TARGET_AM3517_CRANE config TARGET_OMAP3_PANDORA bool "OMAP3 Pandora" + select OMAP3_GPIO_4 + select OMAP3_GPIO_6 config TARGET_ECO5PK bool "ECO5PK" + select OMAP3_GPIO_5 if USB_EHCI_HCD config TARGET_TRICORDER bool "Tricorder" + select OMAP3_GPIO_2 config TARGET_MCX bool "MCX" select BOARD_LATE_INIT + select OMAP3_GPIO_2 if USB_EHCI_HCD + select OMAP3_GPIO_5 if USB_EHCI_HCD config TARGET_OMAP3_LOGIC bool "OMAP3 Logic" @@ -71,15 +111,24 @@ config TARGET_OMAP3_LOGIC select DM select DM_SERIAL select DM_GPIO + select OMAP3_GPIO_4 + select OMAP3_GPIO_6 config TARGET_NOKIA_RX51 bool "Nokia RX51" config TARGET_TAO3530 bool "TAO3530" + select OMAP3_GPIO_2 + select OMAP3_GPIO_3 + select OMAP3_GPIO_4 + select OMAP3_GPIO_5 + select OMAP3_GPIO_6 config TARGET_TWISTER bool "Twister" + select OMAP3_GPIO_2 + select OMAP3_GPIO_5 if USB_EHCI_HCD config TARGET_OMAP3_CAIRO bool "QUIPOS CAIRO" @@ -92,6 +141,11 @@ config TARGET_SNIPER select DM select DM_SERIAL select DM_GPIO + select OMAP3_GPIO_2 + select OMAP3_GPIO_3 + select OMAP3_GPIO_4 + select OMAP3_GPIO_5 + select OMAP3_GPIO_6 endchoice diff --git a/arch/arm/mach-omap2/omap5/Kconfig b/arch/arm/mach-omap2/omap5/Kconfig index c89c438305..1a66abdeb2 100644 --- a/arch/arm/mach-omap2/omap5/Kconfig +++ b/arch/arm/mach-omap2/omap5/Kconfig @@ -63,6 +63,23 @@ config TI_SECURE_EMIF_PROTECTED_REGION_SIZE using hardware memory firewalls. This value must be smaller than the TI_SECURE_EMIF_TOTAL_REGION_SIZE value. +config OMAP_PLATFORM_RESET_TIME_MAX_USEC + int "Something" + range 0 31219 + default 31219 + help + Most OMAPs' provide a way to specify the time for which the reset + should be held low while the voltages and Oscillator outputs + stabilize. + This time is mostly board and PMIC dependent. Hence the boards are + expected to specify a pre-computed time using the above option. + This value can be computed using a summation of the below 3 + parameters + 1: Time taken by the Osciallator to stop and restart + 2: PMIC OTP time + 3: Voltage ramp time, which can be derived using the PMIC slew rate + and value of voltage ramp needed. + if TARGET_DRA7XX_EVM || TARGET_AM57XX_EVM menu "Voltage Domain OPP selections" diff --git a/arch/arm/mach-omap2/omap5/hwinit.c b/arch/arm/mach-omap2/omap5/hwinit.c index 839d79d102..afe59e0b58 100644 --- a/arch/arm/mach-omap2/omap5/hwinit.c +++ b/arch/arm/mach-omap2/omap5/hwinit.c @@ -414,12 +414,13 @@ void setup_warmreset_time(void) { u32 rst_time, rst_val; -#ifndef CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC - rst_time = CONFIG_DEFAULT_OMAP_RESET_TIME_MAX_USEC; -#else - rst_time = CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC; -#endif - rst_time = usec_to_32k(rst_time) << RSTTIME1_SHIFT; + /* + * MAX value for PRM_RSTTIME[9:0]RSTTIME1 stored is 0x3ff. + * 0x3ff is in the no of FUNC_32K_CLK cycles. Converting cycles + * into microsec and passing the value. + */ + rst_time = usec_to_32k(CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC) + << RSTTIME1_SHIFT; if (rst_time > RSTTIME1_MASK) rst_time = RSTTIME1_MASK; diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c index a68f1d145d..b7f79800de 100644 --- a/arch/arm/mach-omap2/vc.c +++ b/arch/arm/mach-omap2/vc.c @@ -19,14 +19,6 @@ #include <asm/arch/sys_proto.h> #include <asm/arch/clock.h> -/* - * Define Master code if there are multiple masters on the I2C_SR bus. - * Normally not required - */ -#ifndef CONFIG_OMAP_VC_I2C_HS_MCODE -#define CONFIG_OMAP_VC_I2C_HS_MCODE 0x0 -#endif - /* Register defines and masks for VC IP Block */ /* PRM_VC_CFG_I2C_MODE */ #define PRM_VC_CFG_I2C_MODE_DFILTEREN_BIT (0x1 << 6) @@ -84,8 +76,10 @@ static void omap_vc_init(u16 speed_khz) (cycles_low << PRM_VC_CFG_I2C_CLK_SCLL_SHIFT); writel(val, (*prcm)->prm_vc_cfg_i2c_clk); - val = CONFIG_OMAP_VC_I2C_HS_MCODE << - PRM_VC_CFG_I2C_MODE_HSMCODE_SHIFT; + /* + * Master code if there are multiple masters on the I2C_SR bus. + */ + val = 0x0 << PRM_VC_CFG_I2C_MODE_HSMCODE_SHIFT; /* No HS mode for now */ val &= ~PRM_VC_CFG_I2C_MODE_HSMODEEN_BIT; writel(val, (*prcm)->prm_vc_cfg_i2c_mode); diff --git a/arch/arm/mach-uniphier/clk/clk-ld11.c b/arch/arm/mach-uniphier/clk/clk-ld11.c index 36aa787984..0266e7e66b 100644 --- a/arch/arm/mach-uniphier/clk/clk-ld11.c +++ b/arch/arm/mach-uniphier/clk/clk-ld11.c @@ -33,7 +33,7 @@ void uniphier_ld11_clk_init(void) /* TODO: use "mmc-pwrseq-emmc" */ writel(1, SDCTRL_EMMC_HW_RESET); -#ifdef CONFIG_USB_EHCI +#ifdef CONFIG_USB_EHCI_HCD { /* FIXME: the current clk driver can not handle parents */ u32 tmp; diff --git a/arch/arm/mach-uniphier/clk/clk-ld4.c b/arch/arm/mach-uniphier/clk/clk-ld4.c index 62b6927732..def87c1aac 100644 --- a/arch/arm/mach-uniphier/clk/clk-ld4.c +++ b/arch/arm/mach-uniphier/clk/clk-ld4.c @@ -31,7 +31,7 @@ void uniphier_ld4_clk_init(void) #ifdef CONFIG_UNIPHIER_ETH tmp |= SC_CLKCTRL_CEN_ETHER; #endif -#ifdef CONFIG_USB_EHCI +#ifdef CONFIG_USB_EHCI_HCD tmp |= SC_CLKCTRL_CEN_MIO | SC_CLKCTRL_CEN_STDMAC; #endif #ifdef CONFIG_NAND_DENALI diff --git a/arch/arm/mach-uniphier/clk/clk-pro4.c b/arch/arm/mach-uniphier/clk/clk-pro4.c index 92b73384ab..19be4f3145 100644 --- a/arch/arm/mach-uniphier/clk/clk-pro4.c +++ b/arch/arm/mach-uniphier/clk/clk-pro4.c @@ -46,7 +46,7 @@ void uniphier_pro4_clk_init(void) #ifdef CONFIG_UNIPHIER_ETH tmp |= SC_CLKCTRL_CEN_ETHER; #endif -#ifdef CONFIG_USB_EHCI +#ifdef CONFIG_USB_EHCI_HCD tmp |= SC_CLKCTRL_CEN_MIO | SC_CLKCTRL_CEN_STDMAC; #endif #ifdef CONFIG_NAND_DENALI |