3 files changed, 18 insertions, 3 deletions
diff --git a/arch/arm/cpu/armv8/Makefile b/arch/arm/cpu/armv8/Makefile
index f7b4a5ee46..d85ddde430 100644
--- a/arch/arm/cpu/armv8/Makefile
+++ b/arch/arm/cpu/armv8/Makefile
@@ -9,14 +9,16 @@ obj-y	+= cpu.o
 ifndef CONFIG_$(SPL_TPL_)TIMER
 obj-$(CONFIG_SYS_ARCH_TIMER) += generic_timer.o
 endif
+ifndef CONFIG_$(SPL_)SYS_DCACHE_OFF
 obj-y	+= cache_v8.o
+obj-y	+= cache.o
+endif
 ifdef CONFIG_SPL_BUILD
 obj-$(CONFIG_ARMV8_SPL_EXCEPTION_VECTORS) += exceptions.o
 else
 obj-y	+= exceptions.o
 obj-y	+= exception_level.o
 endif
-obj-y	+= cache.o
 obj-y	+= tlb.o
 obj-y	+= transition.o
 ifndef CONFIG_ARMV8_PSCI
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index ce552944b7..5fe83699f4 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -628,7 +628,18 @@ void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size,
 				     enum dcache_option option);
 
 #ifdef CONFIG_SYS_NONCACHED_MEMORY
-void noncached_init(void);
+/**
+ * noncached_init() - Initialize non-cached memory region
+ *
+ * Initialize non-cached memory area. This memory region will be typically
+ * located right below the malloc() area and mapped uncached in the MMU.
+ *
+ * It is called during the generic post-relocation init sequence.
+ *
+ * Return: 0 if OK
+ */
+int noncached_init(void);
+
 phys_addr_t noncached_alloc(size_t size, size_t align);
 #endif /* CONFIG_SYS_NONCACHED_MEMORY */
 
diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c
index ee7d14b2d3..bdde9cdad5 100644
--- a/arch/arm/lib/cache.c
+++ b/arch/arm/lib/cache.c
@@ -86,7 +86,7 @@ void noncached_set_region(void)
 #endif
 }
 
-void noncached_init(void)
+int noncached_init(void)
 {
 	phys_addr_t start, end;
 	size_t size;
@@ -103,6 +103,8 @@ void noncached_init(void)
 	noncached_next = start;
 
 	noncached_set_region();
+
+	return 0;
 }
 
 phys_addr_t noncached_alloc(size_t size, size_t align)